CN221225485U

CN221225485U - LVDS topological structure of display module PCB and electronic equipment

Info

Publication number: CN221225485U
Application number: CN202323070962.8U
Authority: CN
Inventors: 黄素玲
Original assignee: Truly Semiconductors Ltd
Current assignee: Truly Semiconductors Ltd
Priority date: 2023-11-14
Filing date: 2023-11-14
Publication date: 2024-06-25
Anticipated expiration: 2033-11-14

Abstract

The utility model discloses an LVDS topological structure of a display module PCB, which comprises the following steps: the device comprises a module interface, a connecting bus, a series resistor, a parallel resistor and a plurality of LCD interfaces; the LCD interfaces are respectively connected with the module interfaces through the connecting buses and comprise at least one LCD interface with the closest transmission distance to the module interfaces and at least one LCD interface with the farthest transmission distance to the module interfaces; the LCD interface with the nearest transmission distance to the module interface is connected with the series resistor in series; the LCD interface with the furthest transmission distance with the module interface is connected with the parallel resistor in parallel. According to the utility model, the impedance of the transmission line is increased by serially connecting the matching resistor with the LCD interface close to the input end of the module interface, and the matching resistor is connected in parallel with the furthest end so as to reduce the impedance of the transmission line, thereby reducing signal reflection.

Description

LVDS topological structure of display module PCB and electronic equipment

Technical Field

The utility model relates to the field of communication, in particular to an LVDS topological structure of a display module PCB and electronic equipment.

Background

The application of the LVDS technology in the communication field is increasingly popular, and the LVDS technology is also applied as the size of the vehicle-mounted display screen of our department is larger, and is different from the small-size display screen, and the large-size display screen LVDS is of a multi-branch topological structure. The operational experience of many projects, LVDS multi-leg topologies, require consideration of signal integrity issues, terminating the resistor at the leg receiver. For example, chinese patent application number 202223123712.1 discloses a multi-adaptive LVDS display signal transmission circuit, comprising: the signal source outputs LVDS video stream signals; the LVDS source terminal receives the LVDS video stream signal, carries out serial processing on the LVDS video stream signal and outputs a serial signal; the LVDS terminal receives the serial signal and deserializes the serial signal, and recovers the serial signal into an LVDS video stream signal; the transmission link is used for transmitting the serial signal output by the LVDS source terminal to the LVDS terminal; and the LVDS display screen is used for receiving the LVDS video stream signals and displaying corresponding contents on the screen. The signal source is a system on a chip or a host device with an image processor, and is used for directly outputting LVDS video stream signals. The signal source comprises a system-on-chip or a host device with an image processor, and a format conversion circuit, wherein the system-on-chip or the host device with the image processor outputs a non-LVDS format video stream signal, and the format conversion circuit converts the non-LVDS format video stream signal into an LVDS video stream signal. The transmission link uses an FPD-LinkIII high-speed serial bus. The LVDS video stream signals include video signals, audio signals, control signals and data signals. The LVDS source terminal adopts a DS90UB947 chip, and the LVDS terminal adopts a DS90UB948 chip. The power supply module is characterized by further comprising a power supply module, wherein the power supply module adopts an XL1507 chip and supplies power in a wide range from 4.5V to 40V. The LED backlight module further comprises a backlight driving module, wherein the backlight driving module adopts a MAX25511 chip. The utility model has strong adaptability, and the system structure does not change along with the change of the mode of outputting the video signal by the signal source.

However, with the increase of the connection distance of the display screen of the terminal, the LVDS multi-branch topological structure needs to consider the signal integrity problem, and the LVDS anti-interference and anti-attenuation characteristics are poor for the signal reflection problem of the load end in long-distance signal transmission.

Disclosure of utility model

In order to solve the defects in the prior art, the utility model provides an LVDS topological structure of a display module PCB.

The technical problems to be solved by the utility model are realized by the following technical scheme: an LVDS topology of a display module PCB, comprising: the device comprises a module interface, a connecting bus, a series resistor, a parallel resistor and a plurality of LCD interfaces;

The LCD interfaces are respectively connected with the module interfaces through the connecting buses and comprise at least one LCD interface with the closest transmission distance to the module interfaces and at least one LCD interface with the farthest transmission distance to the module interfaces;

the LCD interface with the nearest transmission distance to the module interface is connected with the series resistor in series;

The LCD interface with the furthest transmission distance with the module interface is connected with the parallel resistor in parallel.

Further, the connection bus includes a first connection line, a common connection point, and a plurality of second connection lines, the first connection line is connected between the module interface and the common connection point, and each second connection line is connected between the corresponding LCD interface and the common connection point.

Further, the plurality of LCD interfaces are located on the same side of the common connection point, and only one LCD interface closest to the transmission distance of the module interface among the plurality of LCD interfaces is located, and only one LCD interface farthest to the transmission distance of the module interface is located.

Further, the plurality of LCD interfaces are divided into a first group of LCD interfaces and a second group of LCD interfaces, wherein the first group of LCD interfaces are positioned on one side of the common connection point, and the second group of LCD interfaces are positioned on the other side of the common connection point; two LCD interfaces with the closest transmission distance to the module interface are arranged in the plurality of LCD interfaces, one is arranged in the first group of LCD interfaces, and the other is arranged in the second group of LCD interfaces; two LCD interfaces with the farthest transmission distance with the module interface are arranged in the plurality of LCD interfaces, one is arranged in the first group of LCD interfaces, and the other is arranged in the second group of LCD interfaces.

Further, at least one of the other LCD interfaces is also connected in series with the series resistor in addition to the nearest and farthest LCD interfaces.

Further, the series resistor is connected in series between the corresponding LCD interface and the connection bus.

Further, the parallel resistors are connected in parallel to two ends of the corresponding LCD interface.

Further, the LCD interfaces include a first LCD interface, a second LCD interface, a third LCD interface, and a fourth LCD interface.

Further, the first set of LCD interfaces includes a first LCD interface and a second LCD interface, and the second set of LCD interfaces includes a third LCD interface and a fourth LCD interface.

An electronic device comprising the LVDS topology of any one of the display module PCBs described above.

The utility model has the following beneficial effects: an LVDS topology of a display module PCB, comprising: the device comprises a module interface, a connecting bus, a series resistor, a parallel resistor and a plurality of LCD interfaces; the LCD interfaces are respectively connected with the module interfaces through the connecting buses and comprise at least one LCD interface with the closest transmission distance to the module interfaces and at least one LCD interface with the farthest transmission distance to the module interfaces; the LCD interface with the nearest transmission distance to the module interface is connected with the series resistor in series; the LCD interface with the furthest transmission distance with the module interface is connected with the parallel resistor in parallel. According to the utility model, the impedance of the transmission line is increased by serially connecting the matching resistor with the LCD interface close to the input end of the module interface, and the matching resistor is connected in parallel with the furthest end so as to reduce the impedance of the transmission line, thereby reducing signal reflection.

Drawings

In order to more clearly illustrate the solution of the present application, a brief description will be given below of the drawings required for the description of the embodiments, it being obvious that the drawings in the following description are some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of the structure of the present utility model;

FIG. 2 is a schematic diagram of a connection bus of the present utility model;

FIG. 3 is a schematic view of another embodiment of the present utility model;

FIG. 4 is a schematic diagram of an LCD interface structure according to the present utility model.

1. A module interface; 2. a connection bus; 21. a first connecting line; 22. a common connection point; 23. a second connecting line; 3. a series resistor; 4. a parallel resistor; 5. an LCD interface; 51. a first set of LCD interfaces; 52. a second set of LCD interfaces; 511. a first LCD interface; 512. a second LCD interface; 521. a third LCD interface; 522. and a fourth LCD interface.

Detailed Description

The present utility model is described in detail below with reference to the drawings and the embodiments, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present utility model and should not be construed as limiting the utility model.

In the description of the present utility model, it should be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate orientations or positional relationships based on the orientation or positional relationships shown in the drawings, merely to facilitate describing the present utility model and simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present utility model.

Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", or a third "may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the present utility model, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," "disposed," and the like are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, or can be communicated between two elements or the interaction relationship between the two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.

Examples

As shown in fig. 1, an LVDS topology of a display module PCB includes: the module interface 1, the connecting bus 2, the series resistor 3, the parallel resistor 4 and the LCD interfaces 5; the plurality of LCD interfaces 5 are respectively connected with the module interfaces 1 through the connecting bus 2 and comprise at least one LCD interface 5 with the closest transmission distance to the module interfaces 1 and at least one LCD interface 5 with the farthest transmission distance to the module interfaces 1; the LCD interface 5 with the closest transmission distance to the module interface 1 is connected with the series resistor 3 in series; the parallel resistor 4 is connected in parallel with the LCD interface 5 with the furthest transmission distance from the module interface 1.

In order to solve the signal integrity problem and ensure the stability and reliability of signal transmission, the LCD interface 5 with the closest transmission distance to the module interface 1 is connected with the series resistor 3 in series to increase the impedance of a transmission line, and the LCD interface 5 with the farthest transmission distance to the module interface 1 is connected with the parallel resistor 4 in parallel to reduce the impedance of the transmission line, thereby reducing the signal reflection.

According to the series terminal matching resistor theory, under the condition that the impedance of a signal source end is lower than the characteristic impedance of a transmission line, a resistor is connected in series before the signal source end and the transmission line, so that the output impedance of the source end is matched with the characteristic impedance of the transmission line, and the signal reflected from a load end is restrained from being reflected again.

According to the theory of parallel terminal matching resistance, under the condition that the impedance of a signal source end is very small, the input impedance of a load end is matched with the characteristic impedance of a transmission line by adding the parallel resistance, so that the purpose of eliminating the reflection of the load end is achieved.

The LVDS topology structure refers to a circuit structure adopted by LVDS signals in a transmission process. LVDS topologies are generally divided into two types, single-arm and multi-arm.

The single-branch topological structure refers to that LVDS signals reach a terminal from a source end through a transmission line, the signal lines and the ground line adopt differential transmission modes respectively, the voltage difference between the signal lines is the LVDS signals, and the ground line plays roles of shielding and reference level. In a single-branch topology, to ensure signal integrity, it is often necessary to add matching resistors at the terminals to reduce signal reflection.

The multi-branch topological structure refers to that LVDS signals reach a terminal from a source end through a plurality of transmission lines, each transmission line adopts a differential transmission mode, the voltage difference between the signal lines is the LVDS signals, and the ground wire plays roles of shielding and reference level. In a multi-branch topology, to ensure signal integrity, it is often necessary to add a matching resistor at each terminal to reduce signal reflection. The multi-branch topological structure can realize long-distance transmission and high-speed transmission, and is suitable for occasions such as large-size display screens and the like which need high-quality signal transmission.

Finally, the LVDS topological structure can be selected according to specific application scenes so as to ensure the stability and reliability of signal transmission.

Further, as shown in fig. 2, the connection bus 2 includes a first connection line 21, a common connection point 22, and a plurality of second connection lines 23, wherein the first connection line 21 is connected between the module interface 1 and the common connection point 22, and each of the second connection lines 23 is connected between the corresponding LCD interface 5 and the common connection point 22.

Further, the plurality of LCD interfaces 5 are located on the same side of the common connection point 22, and only one LCD interface 5 closest to the transmission distance of the module interface 1 among the plurality of LCD interfaces 5 is located, and only one LCD interface 5 farthest to the transmission distance of the module interface 1 is located.

Examples

As an optimization scheme of the first embodiment, as shown in fig. 3, the plurality of LCD interfaces 5 are divided into a first group of LCD interfaces 51 and a second group of LCD interfaces 52, wherein the first group of LCD interfaces 51 is located on one side of the common connection point 22, and the second group of LCD interfaces 52 is located on the other side of the common connection point 22; two LCD interfaces 5 of the plurality of LCD interfaces 5 closest to the transmission distance of the module interface 1 are located, one in the first set of LCD interfaces 51 and one in the second set of LCD interfaces 52; two LCD interfaces 5 of the plurality of LCD interfaces 5 are located at the farthest transmission distance from the module interface 1, one in the first set of LCD interfaces 51 and one in the second set of LCD interfaces 52.

Further, in addition to the nearest and farthest LCD interfaces 5, at least one of the other LCD interfaces 5 is also connected in series with the series resistor 3.

Further, the series resistor 3 is connected in series between the corresponding LCD interface 5 and the connection bus 2.

The series terminal matching resistor is connected in series between the source end of the signal and the transmission line under the condition that the impedance of the source end of the signal is lower than the characteristic impedance of the transmission line, so that the output impedance of the source end is matched with the characteristic impedance of the transmission line, and the signal reflected from the load end is restrained from being reflected again.

Further, the parallel resistors 4 are connected in parallel to two ends of the corresponding LCD interface 5.

The parallel terminal matching resistor is used for matching the input impedance of the load end with the characteristic impedance of the transmission line by adding the parallel resistor under the condition that the impedance of the signal source end is very small, so that the purpose of eliminating the reflection of the load end is achieved.

As shown in fig. 4, the LCD interface 5 includes a first LCD interface 511, a second LCD interface 512, a third LCD interface 521, and a fourth LCD interface 522.

Wherein the first set of LCD interfaces 51 includes a first LCD interface 511 and a second LCD interface 512, and the second set of LCD interfaces 52 includes a third LCD interface 521 and a fourth LCD interface 522.

Examples

The utility model also provides an electronic device, including the LVDS topology structure of the display module PCB according to the first embodiment or the second embodiment, including: the module interface 1, the connecting bus 2, the series resistor 3, the parallel resistor 4 and the LCD interfaces 5; the plurality of LCD interfaces 5 are respectively connected with the module interfaces 1 through the connecting bus 2 and comprise at least one LCD interface 5 with the closest transmission distance to the module interfaces 1 and at least one LCD interface 5 with the farthest transmission distance to the module interfaces 1; the LCD interface 5 with the closest transmission distance to the module interface 1 is connected with the series resistor 3 in series; the parallel resistor 4 is connected in parallel with the LCD interface 5 with the furthest transmission distance from the module interface 1.

Finally, it should be noted that the foregoing embodiments are merely for illustrating the technical solution of the embodiments of the present utility model and are not intended to limit the embodiments of the present utility model, and although the embodiments of the present utility model have been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solution of the embodiments of the present utility model may be modified or replaced with the same, and the modified or replaced technical solution may not deviate from the scope of the technical solution of the embodiments of the present utility model.

Claims

1. LVDS topological structure of display module assembly PCB, its characterized in that includes: the device comprises a module interface (1), a connecting bus (2), a series resistor (3), a parallel resistor (4) and a plurality of LCD interfaces (5);

The LCD interfaces (5) are respectively connected with the module interfaces (1) through the connecting buses (2) and comprise at least one LCD interface (5) with the closest transmission distance to the module interfaces (1) and at least one LCD interface (5) with the farthest transmission distance to the module interfaces (1);

The LCD interface (5) with the closest transmission distance with the module interface (1) is connected with the series resistor (3) in series;

the LCD interface (5) with the farthest transmission distance with the module interface (1) is connected with the parallel resistor (4) in parallel.

2. The LVDS topology of a display module PCB of claim 1, wherein: the connecting bus (2) comprises a first connecting line (21), a common connecting point (22) and a plurality of second connecting lines (23), wherein the first connecting line (21) is connected between the module interface (1) and the common connecting point (22), and each second connecting line (23) is connected between the corresponding LCD interface (5) and the common connecting point (22).

3. The LVDS topology of a display module PCB of claim 2, wherein: the LCD interfaces (5) are located on the same side of the common connection point (22), and only one LCD interface (5) closest to the transmission distance of the module interface (1) in the LCD interfaces (5) is located, and only one LCD interface (5) farthest to the transmission distance of the module interface (1) is located.

4. The LVDS topology of a display module PCB of claim 2, wherein: the plurality of LCD interfaces (5) are divided into a first group of LCD interfaces (51) and a second group of LCD interfaces (52), wherein the first group of LCD interfaces (51) are positioned on one side of the common connection point (22), and the second group of LCD interfaces (52) are positioned on the other side of the common connection point (22); two LCD interfaces (5) with the closest transmission distance to the module interface (1) in the plurality of LCD interfaces (5), one in the first group of LCD interfaces (51) and one in the second group of LCD interfaces (52); two LCD interfaces (5) with the farthest transmission distance from the module interface (1) are arranged in the plurality of LCD interfaces (5), one is arranged in the first group of LCD interfaces (51), and the other is arranged in the second group of LCD interfaces (52).

5. The LVDS topology of a display module PCB of claim 1, wherein: in addition to the nearest and the farthest LCD interfaces (5), at least one of the other LCD interfaces (5) is also connected in series with the series resistor (3).

6. The LVDS topology of a display module PCB of claim 1, wherein: the series resistor (3) is connected in series between the corresponding LCD interface (5) and the connection bus (2).

7. The LVDS topology of a display module PCB of claim 1, wherein: the parallel resistors (4) are connected in parallel to two ends of the corresponding LCD interface (5).

8. The LVDS topology of a display module PCB of claim 1, wherein: the LCD interface (5) includes a first LCD interface (511), a second LCD interface (512), a third LCD interface (521), and a fourth LCD interface (522).

9. The LVDS topology of claim 4, wherein: the first set of LCD interfaces (51) includes a first LCD interface (511) and a second LCD interface (512), and the second set of LCD interfaces (52) includes a third LCD interface (521) and a fourth LCD interface (522).

10. An electronic device comprising the LVDS topology of the display module PCB of any one of claims 1-9.