CN220574073U

CN220574073U - Chip screening device and chip screening system

Info

Publication number: CN220574073U
Application number: CN202322059436.5U
Authority: CN
Inventors: 李尊健; 朱伟强; 韩婷婷; 田密; ***
Original assignee: Nanjing Suirui Technology Co ltd
Current assignee: Nanjing Suirui Technology Co ltd
Priority date: 2023-08-02
Filing date: 2023-08-02
Publication date: 2024-03-12
Anticipated expiration: 2033-08-02

Abstract

The application provides a chip screening device, which comprises a test seat, a test board, a fixing seat, a shell, a signal input interface, a signal output interface, a VDD interface, a GND interface, an input cable and an output cable, wherein the test seat, the test board and the fixing seat are sequentially arranged inside the shell up and down, the signal input interface, the signal output interface, the VDD interface and the GND interface are respectively arranged on the shell; the test seat is used for bearing a chip, and the test board is used for receiving test signals from the signal input interface through the input cable and outputting feedback signals to the signal output interface through the output cable.

Description

Chip screening device and chip screening system

Technical Field

The present utility model relates to the field of semiconductor testing, and in particular, to a chip screening apparatus and a chip screening system.

Background

In the field of semiconductor testing, screening testing of chips is an important link. The test flow of the chip can be divided into three types according to different test stages: wafer testing, package testing, and system level testing. Wherein, the packaging test is a screening test of the packaged chips.

The package testing may be implemented in a factory or laboratory. In factories, packaging tests can be usually performed by using automatic test equipment, while in laboratory tests, a test bench is usually required to be built on site, and the consistency of experimental results is low.

Disclosure of Invention

The application provides a chip screening device and chip screening system, can guarantee laboratory testing result's uniformity. The first aspect of the application discloses a chip screening device, which comprises a test seat, a test board, a fixed seat, a shell, a signal input interface, a signal output interface, a VDD interface, a GND interface, an input cable and an output cable, wherein the test seat, the test board and the fixed seat are sequentially arranged in the shell up and down, the signal input interface, the signal output interface, the VDD interface and the GND interface are respectively arranged on the shell; the test seat is used for bearing a chip, and the test board is used for receiving test signals from the signal input interface through the input cable and outputting feedback signals to the signal output interface through the output cable.

In a possible implementation of the first aspect, the signal input interface and the signal output interface are four-hole flange interfaces.

In a possible implementation of the first aspect, the four-hole flange interface is an SMA connector.

In a possible implementation manner of the first aspect, the shape of the housing is a rectangle, where the signal input interface and the signal output interface are disposed at opposite positions of a short side of the rectangle, and the VDD interface and the GND interface are disposed on a same side long side of the rectangle.

In a possible implementation manner of the first aspect, the fixing base includes an insulating resin block and a metal base disposed above and below.

In one possible implementation of the first aspect, the test board, the test socket, the insulating resin block, and the metal base are provided with screw holes penetrating up and down at the same position.

In a possible implementation of the first aspect, the upper cover of the housing has an opening for receiving the test socket so as to protrude from the upper cover.

In a possible implementation of the first aspect, the housing and the upper cover are connected by a screw or a snap.

In a possible implementation of the first aspect, the housing is an aluminum box.

A second aspect of the present application discloses a semiconductor device inspection system including a communication device, a tester, and a chip screening apparatus of the first aspect of the present application.

The application provides a chip sieving mechanism and chip sieving system, the shell plays the guard action to chip sieving mechanism to the fixed between the test board, the test seat and the chip of waiting to filter. When the chip is screened, only signals need to be input to the signal input interface of the chip screening device, and feedback signals are output from the signal output interface. The mode of fixing helps protecting signal input interface and signal output interface like this to need not to build test platform repeatedly so as to guarantee testing result's uniformity. In addition, the screening integration of the chip is fixed in the shell, and can be directly used during screening, so that the testing efficiency is improved.

Drawings

FIG. 1 is a schematic diagram of a chip screening apparatus 100 according to one embodiment of the present application;

FIG. 2 is a schematic structural view of the housing 101 in a top view of one embodiment of the present application;

FIG. 3 is a schematic view of an upper cover of a housing according to one embodiment of the present application

Detailed Description

The present application is further described below with reference to specific embodiments and figures. It is to be understood that the illustrative embodiments of the present disclosure, including but not limited to chip screening apparatus and chip screening systems, are described herein in terms of specific embodiments only to illustrate the present application and not to limit the present application. Furthermore, for ease of description, only some, but not all, of the structures or processes associated with the present application are shown in the drawings.

Further advantages and effects of the present application will be readily apparent to those skilled in the art from the present disclosure, by describing embodiments of the present application with specific examples. While the description of the present application will be presented in conjunction with the preferred embodiments, it is not intended that the features of this application be limited to only this implementation. Rather, the purpose of the description in connection with the embodiments is to cover other alternatives or modifications, which may be extended by the claims based on the application. The following description contains many specific details in order to provide a thorough understanding of the present application. The present application may be practiced without these specific details. Furthermore, some specific details are omitted from the description in order to avoid obscuring the focus of the application. It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be combined with each other.

It should be noted that in this specification, like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.

For the purpose of making the objects, technical solutions and advantages of the present application more apparent, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

In the semiconductor field, screening test of chips is one of important links. The purpose of the chip screening test is to reject failed and potentially failed chips in the design and production process and prevent defective products from flowing into customers. The test flow of the chip can be divided into three types according to different test stages: wafer testing, package testing, and system level testing. Wafer testing tests each die (die) in a wafer. After wafer testing, the acceptable die may be marked on the wafer, which is then diced and packaged to obtain individual chips. The package test is a screening test performed on a packaged chip. The system level test refers to testing the chip in a simulated terminal usage scenario.

ATE testing is typically performed in the factory, and laboratory screening tests can be used to verify the accuracy of the ATE, as well as for reliability tests to compare whether there is a change in chip performance before and after reliability is achieved. In ATE testing, a Load Board (Load Board) is a mechanical and circuit interface for connecting test equipment and a semiconductor device under test, and is mainly used for yield testing after back-end chip packaging in semiconductor manufacturing. Through the test at this stage, the chips with bad functions can be removed, and the subsequent electronic products are prevented from being scrapped due to the bad chips. To achieve factory testing and laboratory testing with as little error as possible in test results, the same test load board is typically chosen.

A socket is a connector socket that connects a chip and a test load board. In laboratory tests, operations such as aligning a test load board with a test seat, connecting a cable, and adding wires are required to be performed at first in each test, which is equivalent to that a test platform is required to be built again in each test, and therefore consistency of test results and low test efficiency cannot be ensured.

To solve the above-mentioned problems, an embodiment of the present application provides a chip screening apparatus 100, see fig. 1. The apparatus 100 includes: housing 101, test board 102, test seat 103, and fixing seat 107. The housing 101 is provided at both ends with a signal input interface 104, a signal output interface 105, a vdd interface 108, a gnd interface 109, and input and output cables 106-1 and 106-2. A test seat 103 is arranged above the test board 102, and the test seat 103 is used for bearing chips to be screened. The test board 102 is configured to receive radio frequency test signals from the signal input interface 104 via the input cable 106-1 and to output feedback signals to the signal output interface 105 via the output cable 106-2.

In fig. 1, a housing 101 plays a protective role for a chip screening apparatus 100, and positions between a test board 102, a test seat 103 and a chip to be screened are fixed. In addition, the fixing base 107 may fix the test board 102 and the test base 103 to the bottom of the housing 101. The test board 102 and the test seat 103 are fixed together, so that additional fixing of the test seat is not needed in the test process, and the test convenience is improved.

In the screening, only a signal is input to the signal input interface of the chip screening apparatus 100, and a feedback signal is output from the signal output interface. The mode of fixing helps protecting signal input interface and signal output interface like this to need not to build test platform repeatedly so as to guarantee testing result's uniformity. In addition, the screening integration of the chip is fixed in the shell, and can be directly used during screening, so that the testing efficiency is improved.

In some examples, the signal input interface and the signal output interface in fig. 1 may be flange interfaces, such as four-hole flange interfaces. Flange (Flange) refers to a protruding edge on a structural or mechanical part perpendicular to the axis of the part. The flange interface may be used to connect the ends of two part shafts to ensure that the centerlines of the two shafts are on the same axis. The flange interface and the test board 102 may be connected by radio frequency cables. In some examples, the flange interface may be an SMA connector. SMA is a threaded radio frequency coaxial connector with a characteristic impedance of 50 ohms.

In other examples, the signal input interface and the signal output interface may also be any of an N-type connector, a TNC-type connector, a BNC-type connector, an SMB-type connector, and an SMC-type connector.

Fig. 2 shows a schematic structural view of the housing 101 in a top view of one embodiment of the present application. In fig. 2, the housing 101 has a rectangular shape, the signal input interface 104 and the signal output interface 105 are disposed at opposite positions of the short sides of the rectangle, and the VDD interface 108 and the GND interface 109 are disposed on the same long side of the rectangle. Thus, each interface is fixed on the housing 101, so that an input signal enters from the left side of the housing 101 when chip screening is performed, a feedback signal is output from the right side of the housing 101, and a power-on wire and a ground wire are connected through the interface above the housing 101 so that corresponding signal paths are fixed.

Those skilled in the art will appreciate that the shape of the housing 101 is not limited thereto, and the shape of the housing 101 may be designed according to actual needs. In some embodiments, the shape of the housing 101 may also be square, circular, or any other irregular shape.

In some examples, the anchor mount 107 includes an insulating resin 107-1 and a metal base 107-2 disposed up and down. Thus, the test socket 103, the test board 102, the insulating resin block 107-1, and the pair of upper and lower metal bases Ji Diefang of the metal base 107-2 are provided at the bottom of the casing 101. In addition, the test seat 103, the test board 102, the insulating resin block 107-1 and the metal base 107-2 may be provided with screw holes penetrating up and down at the same position at four corners for fixing, which is beneficial for fixing the test seat 103 and the test board 102 together.

Fig. 3 shows a schematic view of the upper cover of the housing of one embodiment of the present application. In fig. 3, the upper cover 1011 of the housing 101 has an opening 1012, and the opening 1012 is for receiving the test socket so as to protrude from the upper cover. In this way, the upper cover 1011 of the housing 101 does not need to be opened during detection, and only the device to be tested needs to be replaced in the protruding test seat, so that the test operation is simplified.

The upper cover and the rest of the housing may be secured therebetween in a variety of ways. In some embodiments, the housing and the upper cover may be connected by welding. In other embodiments, the housing and the upper cover are connected by screws or snaps. The detachable connection mode can be beneficial to the transformation or maintenance of the chip screening device in the subsequent process.

In some embodiments, the material of the housing 101 may be metal. In some examples the material of the housing 101 is stainless steel. In other examples, the housing 101 is an aluminum box. In other embodiments, the housing 101 may be made of a metallic material filled in a non-conductive substrate. The substrate may be silica gel or plastic and the filled metal material may be sheet metal, metal powder, or metal fibers. In other embodiments, the housing 101 may be made of a metallic material plated or coated in a non-conductive substrate.

One embodiment of the present application provides a chip screening system including a communication device, a tester, and a chip screening apparatus of the present application.

It should be noted that numerous specific details are provided in the description provided herein. However, it is understood that embodiments of the present application may be practiced without some or all of these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

Similarly, in the above description of exemplary embodiments of the application, various features of the application are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the application and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be construed as reflecting the intention that: i.e., the claimed application requires more features than are expressly recited in each claim. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this application.

Those skilled in the art will appreciate that the modules in the apparatus of the embodiments may be adaptively changed and arranged in one or more apparatuses different from the embodiments. The modules or units or components of the embodiments may be combined into one module or unit or component and, furthermore, they may be divided into a plurality of sub-modules or sub-units or sub-components. Any combination of all features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or units of any method or apparatus so disclosed, may be used in combination, except insofar as at least some of such features and/or processes or units are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.

Furthermore, those skilled in the art will appreciate that while some embodiments described herein include some features but not others included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the present application and form different embodiments. For example, in the claims, any of the claimed embodiments may be used in any combination.

Claims

1. The chip screening device is characterized by comprising a test seat, a test board, a fixed seat, a shell, a signal input interface, a signal output interface, a VDD interface, a GND interface, an input cable and an output cable, wherein,

the test seat, the test board and the fixing seat are sequentially arranged in the shell up and down, the signal input interface, the signal output interface, the VDD interface and the GND interface are respectively arranged on the shell;

the test seat is used for bearing a chip, and the test board is used for receiving test signals from the signal input interface through the input cable and outputting feedback signals to the signal output interface through the output cable.

2. The chip screening apparatus of claim 1, wherein the signal input interface and the signal output interface are quad-port flange interfaces.

3. The chip screening apparatus of claim 2, wherein the four-hole flange interface is an SMA connector.

4. The chip sorting apparatus according to claim 1, wherein the housing has a rectangular shape, wherein the signal input interface and the signal output interface are provided at opposite positions of a short side of the rectangle, and the VDD interface and the GND interface are provided on the same side long side of the rectangle.

5. The chip screening device according to claim 4, wherein the fixing base comprises an insulating resin block and a metal base arranged up and down.

6. The chip screening device according to claim 5, wherein the test plate, the test seat, the insulating resin block, and the metal base are provided with screw holes penetrating up and down at the same position.

7. The chip sorting apparatus of claim 1, wherein the upper cover of the housing has an opening for receiving the test socket so as to protrude from the upper cover.

8. The chip screening apparatus according to claim 7, wherein the housing and the upper cover are connected by screws or snap-fit.

9. The chip screening apparatus according to claim 1, wherein the housing is an aluminum case.

10. A chip screening system comprising a communication device, a tester, and the chip screening apparatus of any one of claims 1 to 9.