CN220570347U - One drags many quick charge circuit and wire rod - Google Patents
One drags many quick charge circuit and wire rod Download PDFInfo
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- CN220570347U CN220570347U CN202322241460.0U CN202322241460U CN220570347U CN 220570347 U CN220570347 U CN 220570347U CN 202322241460 U CN202322241460 U CN 202322241460U CN 220570347 U CN220570347 U CN 220570347U
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Abstract
The application relates to the technical field of wires, and discloses a one-to-many quick charge circuit and wire, and the circuit includes: the device comprises an input interface, a CC signal line switching module, a voltage switching module, a ground wire detection module, a voltage reduction module, a first output interface and at least one second output interface; the input interface is connected with the first output interface; the CC signal line switching module is connected with an EN pin of the first output interface; the input interface is connected with the second output interface through a voltage switching module or a voltage reducing module, and is used for supplying power to the powered device accessed by the second output interface through the voltage switching module or the voltage reducing module when the powered device accessed by the second output interface. The application provides a simple quick charge circuit, and then realizes that first output interface is in the quick charge state always, and the second output interface can both normally charge.
Description
Technical Field
The application relates to the technical field of wires, in particular to a one-to-many quick charging circuit and a wire.
Background
With the development of the age, people have higher and higher requirements on time, in accessory industries such as mobile phones, notebooks and the like, a data line or a charging line is used as a bridge between powered equipment and charging equipment, and the effect of quick charging is generally required, and now only a single wire (such as an A end to B end form) can be used for quick charging, but a single interface is inconvenient for a user to charge different interface equipment, in addition, the existing charger supports multiple output, and the disadvantage is that a plurality of wires with different or same interfaces are required to be matched, once the wires are used simultaneously, the number of the wires is increased, and the charging compatibility of the equipment can be affected due to improper matching, so that the charging of the equipment is affected.
Along with the increase of the requirements of quick charging and charging of different devices, a plurality of wires (such as an end A to an end B and an end C) are adopted to meet the charging function of the devices at present, but the wires in the prior art have larger volume and higher cost, software is required to be used for processing logic distribution of multi-port charging, and the problem of incompatibility in charging is easily caused due to high complexity.
Disclosure of Invention
In view of this, the embodiment of the application provides a one-to-many quick charging circuit and a wire, so that the effects of quick charging and simultaneous charging of different devices can be realized.
In a first aspect, embodiments of the present application provide a multi-split fast charge circuit, including:
the device comprises an input interface, a CC signal line switching module, a voltage switching module, a ground wire detection module, a voltage reduction module, a first output interface and at least one second output interface;
the input interface is connected with the first output interface, wherein the first output interface is a TYPE-C terminal interface, and at least one of pins A12, B12, A1 and B1 in the TYPE-C terminal interface is used as a C port insertion detection pin of TYPE-C for identifying whether power receiving equipment is accessed;
the CC signal line switching module is connected with at least one of pins A12, B12, A1 and B1 of the first output interface, and is used for switching the CC signals of the power supply equipment of the input interface and the power receiving equipment of the first output interface and the power supply voltage of the power receiving equipment when at least one of pins A12, B12, A1 and B1 is accessed by the power receiving equipment, so that the power receiving equipment of the first output interface is charged rapidly;
the input interface is connected with the second output interface through the voltage switching module or the voltage reducing module, and is used for supplying power to the powered device connected with the second output interface through the voltage switching module or the voltage reducing module if the powered device connected with the second output interface is connected with the second output interface.
In some embodiments, the input interface includes a first Vbus pin, a first GND pin, and a first CC pin;
the first output interface comprises a second Vbus pin, a second GND pin, a second CC pin and an EN pin, wherein the EN pin is at least one pin of A12, B12, A1 and B1 pins in the TYPE-C terminal interface;
the first Vbus pin is connected with the second Vbus pin;
a first transistor is connected between the first CC pin and the second CC pin;
the first GND pin is grounded; the second GND pin is grounded.
In some embodiments, the CC signal line switching module includes a Vbus connection unit, a CC signal connection unit;
one end of the Vbus connection unit is connected to a Vbus line between the first Vbus pin and the second Vbus pin, and the other end of the Vbus connection unit is connected to the EN pin of the first output interface; the Vbus connection unit is configured to realize fast charging of the powered device of the first output interface by Vbus power supply when the CC signal connection unit is not turned on when the powered device of the first output interface is connected;
one end of the CC signal connection unit is connected to a CC line between the first CC pin and the second CC pin, and the other end of the CC signal connection unit is connected to the Vbus connection unit.
In some embodiments, the CC signal line switching module further comprises a first capacitor;
the CC signal connection unit comprises a third resistor and a second transistor; the emitter terminal of the second transistor is connected to the CC line, and the base terminal of the second transistor is connected to the Vbus connection unit; one end of the third resistor is connected with the collector end of the second transistor, and the other end of the third resistor is connected with the base end of the second transistor;
the first capacitor is connected with the third resistor in parallel, and is used for conducting the second transistor in a delay mode when the third transistor is closed.
In some embodiments, the ground detection module further comprises a fourth resistor and a fifth resistor; one end of the fourth resistor is grounded, and the other end of the fourth resistor is connected with the grid end of the first transistor;
the source terminal of the first transistor is connected with the first CC pin of the input interface; the drain terminal of the first transistor is connected with the second CC pin of the first output interface;
one end of the fifth resistor is connected to the gate end of the first transistor, and the other end of the fifth resistor is connected with a voltage supply end.
In some embodiments, the buck module includes a buck chip and an auxiliary line unit;
an EN pin of the buck chip is connected with the first Vbus pin of the input interface;
one end of the auxiliary circuit unit is connected with an LX pin of the buck chip, and the other end of the auxiliary circuit unit is connected with an FB pin of the buck chip; the other end of the auxiliary line unit is connected to the second output interface.
In some embodiments, the voltage switching module includes a voltage switching auxiliary unit, a fourth transistor, and a voltage regulator;
a source terminal of the fourth transistor is connected to a Vbus line between the input interface and the first output interface; the drain terminal of the fourth transistor is connected with the second output interface; the grid electrode of the fourth transistor is grounded;
one end of the voltage switching auxiliary unit is connected to the Vbus line between the input interface and the first output interface, one end of the voltage switching auxiliary unit is connected with the voltage stabilizing tube, and one end of the voltage switching auxiliary unit is connected with the gate end of the fourth transistor.
In some embodiments, the voltage switching module further comprises: a ninth resistor and a tenth resistor;
the voltage switching auxiliary unit comprises an eighth resistor and a fifth transistor;
the grid end of the fourth transistor is grounded through the ninth resistor;
one end of the eighth resistor is connected to a Vbus line between the input interface and the first output interface, and the other end of the eighth resistor is connected to a line between the drain terminal of the fourth transistor and a ninth resistor;
an emitter terminal of the fifth transistor is connected to a Vbus line between the input interface and the first output interface; a collector terminal of the fifth transistor is connected to a line between a drain terminal of the fourth transistor and a ninth resistor; the base electrode end of the fifth transistor is connected with one end of the voltage stabilizing tube; the other end of the voltage stabilizing tube is connected with one end of a tenth resistor; the other end of the tenth resistor is connected with the grounding end of the ninth resistor.
In some embodiments, the second output interface v+ pin is connected with the fourth transistor; and the second output interface V-pin is grounded.
In a second aspect, embodiments of the present application provide a multi-split fast charging wire, including the multi-split fast charging circuit described above.
The embodiment of the application has the following beneficial effects: according to the fast charging circuit, the fast charging circuit is simple, the powered device of the first output interface can be charged rapidly in any state, and the powered device of the second output interface can be charged normally.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered limiting the scope, and that other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a one-to-many fast charging circuit according to an embodiment of the present application;
FIG. 2 shows a schematic circuit diagram of a one-drive-multiple fast charge circuit according to an embodiment of the present application;
FIG. 3 is a schematic flow diagram of a one-to-many fast charging circuit according to an embodiment of the present application;
fig. 4 shows a physical structure diagram of a TYPE-C terminal interface according to an embodiment of the present application.
Description of main reference numerals:
10-an input interface; a 20-CC signal line switching module; 30-a voltage switching module; 40-ground wire detection module; 50-a depressurization module; 60-a first output interface; 70-a second output interface; a 21-Vbus connection unit; a 22-CC signal connection unit; 51-an auxiliary line unit; 31-a voltage switching auxiliary unit.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments.
The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, are intended to be within the scope of the present application.
In the following, the terms "comprises", "comprising", "having" and their cognate terms may be used in various embodiments of the present application are intended only to refer to a particular feature, number, step, operation, element, component, or combination of the foregoing, and should not be interpreted as first excluding the existence of or increasing the likelihood of one or more other features, numbers, steps, operations, elements, components, or combinations of the foregoing. Furthermore, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which various embodiments of this application belong. The terms (such as those defined in commonly used dictionaries) will be interpreted as having a meaning that is identical to the meaning of the context in the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein in connection with the various embodiments.
Some embodiments of the present application are described in detail below with reference to the accompanying drawings. The embodiments described below and features of the embodiments may be combined with each other without conflict.
The one-to-many fast charging circuit is described below in connection with some specific embodiments.
Fig. 1 shows a schematic structural diagram of a one-to-many fast charging circuit according to an embodiment of the present application. The one-to-many fast charging circuit illustratively includes: an input interface 10, a CC signal line switching module 20, a voltage switching module 30, a ground wire detection module 40, a step-down module 50, a first output interface 60, at least one second output interface 70; the input interface 10 is connected to the first output interface 60.
Specifically, the input interface 10 includes a first Vbus pin, a first GND pin, and a first CC pin; the first output interface 60 includes a second Vbus pin, a second GND pin, a second CC pin, and an EN pin; the first Vbus pin and the second Vbus pin are connected through a Vbus line; a first transistor Q1 is connected between the first CC pin and the second CC pin, wherein the first transistor Q1 is an Nmos tube; the first GND pin is grounded; the second GND pin is grounded.
Further, the input interface 10 and the second output interface 70 are connected through the voltage switching module 30 or the voltage step-down module 50. And when the second output interface 70 has a powered device connected thereto, the power supply terminal connected to the input interface 10 supplies power to the powered device connected to the second output interface 70 through the voltage switching module 30 or the voltage step-down module 50.
The input interface 10 is connected to the first output interface 60, where the first output interface 60 is a TYPE-C terminal interface, as shown in fig. 4, and at least one of pins a12, B12, A1, and B1 in the TYPE-C terminal interface is used as a C port insertion detection pin of the TYPE-C, for identifying whether a powered device is accessed. Note that, the TYPE-C terminal in the present application is a terminal structure in the prior art, and fig. 4 is a standard physical structure of the TYPE-C terminal in the prior art.
The CC signal line switching module is connected to at least one of pins a12, B12, A1, and B1 of the first output interface 60, and if the powered device of at least one of four pins a12, B12, A1, and B1 is connected, the CC signal line switching module is configured to switch a CC signal of the power supply device of the input interface and the powered device of the first output interface and a power supply voltage of the powered device, so that the powered device of the first output interface is quickly charged. Note that, the EN pin in fig. 3 is at least one pin of the a12, B12, A1, and B1 pins in the TYPE-C terminal interface.
Specifically, as shown in fig. 2, in some embodiments, the CC signal line switching module 20 includes a Vbus connection unit 21 and a CC signal connection unit 22. One end of the Vbus connection unit 21 is connected to a Vbus line between the first Vbus pin and the second Vbus pin, and the other end of the Vbus connection unit 21 is connected to the EN pin of the first output interface 60; the Vbus connection unit 21 is configured to enable the powered device of the first output interface 60 to be rapidly charged by Vbus when the CC signal connection unit 22 is not turned on if the powered device of the first output interface 60 is connected; one end of the CC signal connection unit 22 is connected to a CC line between the first CC pin and the second CC pin, and the other end of the CC signal connection unit 22 is connected to the Vbus connection unit 21.
Specifically, the Vbus connection unit 21 includes a third transistor Q3 and a second resistor R2; the CC signal connection unit 22 includes a third resistor R3 and a second transistor Q2; the CC signal line switch module 20 further includes a first resistor; and a first capacitance C1; one end of the first resistor R1 is connected to the first CC pin; the other end of the first resistor R1 is connected to the emitter end of the second transistor; the base electrode terminal of the second transistor Q2 is connected to the collector electrode terminal of the third transistor Q3; one end of the second resistor R2 is connected to the first Vbus pin, and the other end of the second resistor R2 is connected to the emitter end of the third transistor Q3; the base terminal of the third transistor Q3 is connected to the EN pin of the first output interface 60; one end of the third resistor R3 is connected with the collector end of the second transistor Q2, and the other end of the third resistor R3 is connected with the base end of the second transistor Q2; the first capacitor C1 is connected in parallel with the third resistor R3, and is used for conducting the second transistor in a delay manner when the third transistor is turned on.
Further, the ground wire detection module 40 further includes a fourth resistor R4 and a fifth resistor R5; one end of the fourth resistor R4 is grounded, and the other end of the fourth resistor R4 is connected with the gate end of the first transistor Q1; wherein the first transistor Q1 is an Nmos transistor; the source terminal of the first transistor Q1 is connected with the first CC pin of the input interface; the drain terminal of the first transistor Q1 is connected with a second CC pin of the first output interface; one end of the fifth resistor R5 is connected to the gate end of the first transistor Q1, and the other end of the fifth resistor R5 is connected to the 5V voltage supply end.
Further, the step-down module 50 includes a step-down chip U1 and an auxiliary line unit 51; the EN pin of the buck chip U1 is connected with the first Vbus pin of the input interface 10; one end of the auxiliary circuit unit 51 is connected with an LX pin of the buck chip U1, and the other end of the auxiliary circuit unit 51 is connected with an FB pin of the buck chip U1; the other end of the auxiliary line unit 51 is connected to the second output interface 70.
Specifically, the auxiliary line unit 51 includes an inductor L1, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth resistor R6, and a seventh resistor R7; the buck module 50 further includes a second capacitor C2; the EN pin of the buck chip U1 is connected with the first Vbus pin; one end of the inductor L1 is connected with an LX pin of the buck chip U1; a third capacitor C3 is connected between the BT pin of the buck chip U1 and one end of the inductor L1; the other end of the inductor L1 is connected to the second output interface 70; the connection end of the inductor L1 and the second output interface 70 is grounded through a fourth capacitor C4; the VIN pin of the buck chip U1 is grounded through the second capacitor C2; the GND pin of the buck chip U1 is grounded; the FB pin of the buck chip U1 is grounded through a seventh resistor R7; one end of the fifth capacitor C5 is connected to the inductor L1 through a sixth resistor R6, and the other end of the fifth capacitor C5 is connected to the second output interface 70.
Further, the voltage switching module 30 includes a voltage switching auxiliary unit 31, a fourth transistor Q4, and a regulator D1; the source terminal of the fourth transistor Q4 is connected to the Vbus line between the input interface 10 and the first output interface 60; the drain terminal of the fourth transistor Q4 is connected to the second output interface 70; the gate electrode of the fourth transistor Q4 is grounded; one end of the voltage switching auxiliary unit 31 is connected to the Vbus line between the input interface 10 and the first output interface 60, one end of the voltage switching auxiliary unit 31 is connected to the voltage stabilizing tube D1, and one end of the voltage switching auxiliary unit 31 is connected to the gate terminal of the fourth transistor Q1.
Specifically, the voltage switching module 30 further includes a ninth resistor R9 and a tenth resistor R10; the voltage switching auxiliary unit 31 includes an eighth resistor R8 and a fifth transistor Q5; wherein the fourth transistor Q4 is a Pmos transistor; the source terminal of the fourth transistor Q4 is connected to the Vbus line between the input interface 10 and the first output interface 60; the drain terminal of the fourth transistor Q4 is connected to the second output interface 70; the gate terminal of the fourth transistor Q4 is grounded through the ninth resistor R9; one end of the eighth resistor R8 is connected to the Vbus line between the input interface 10 and the first output interface 60, and the other end of the eighth resistor R8 is connected to the line between the drain end of the fourth transistor Q4 and the ninth resistor R9; an emitter terminal of the fifth transistor Q5 is connected to a Vbus line between the input interface 10 and the first output interface 60; a collector terminal of the fifth transistor Q5 is connected to a line between a drain terminal of the fourth transistor Q4 and a ninth resistor R9; the base electrode end of the fifth transistor Q5 is connected with one end of the voltage stabilizing tube; the other end of the voltage stabilizing tube is connected with one end of a tenth resistor R10; the other end of the tenth resistor R10 is connected with the grounding end of the ninth resistor R9.
Further, the second transistor Q2, the third transistor Q3 and the fifth transistor Q5 are PNP transistors. The v+ pin of the second output interface 70 is connected to the fourth transistor Q4; the V-pin of the second output interface 70 is grounded.
The workflow of the above-described one-to-many fast charge circuit including two second output interfaces 70 will be described below with reference to fig. 3.
A: the input interface 10 is connected to the power supply terminal, the voltage of the emitter terminal of the second transistor Q2 (PNP triode) is equal to 3.3V of the voltage of the power supply terminal CC (3.3V is the power supply voltage of the power supply terminal IC, and the IC is a current source inside), because the third resistor R3 is connected in parallel to two ends (the collector terminal and the base terminal) of the second transistor Q2 (PNP triode) and one end of the third resistor R3 is grounded, when other devices are not connected, the base terminal of the second transistor Q2 (PNP triode) is clamped at 0V by the third resistor R3, after the second transistor Q2 is turned on, the first resistor R1 and the second transistor Q2 form a loop, and the voltage of the CC line for connecting the first CC pin of the input interface 10 and the second CC pin of the first output interface 60 is pulled down to 1.7V. At this time, the power supply device outputs a voltage of 5V, the voltage of the Vbus line is 5V, the circuit is powered normally, and since one end of the voltage reducing module 50 is connected to the Vbus line, the voltage reducing module 50 outputs a voltage of 5V, and at this time, the first transistor Q1 (Nmos transistor) is also turned on. The main function of the process A is to insert a multi-split quick charging wire into a charger and then to be in a standby state.
In this application, the input interface 10, the first output interface 60, and the second output interface 70 are all TYPE-C terminal interfaces.
B: when the first output interface 60 has the power receiving device connected thereto, when the devices connected thereto are connected to the first output interface 60 (a 12, B12, A1, B1, a12, B1 of the first output interface 60 are all GND in the TYPE-C terminal interface), the GND (ground) of the power receiving device will be shorted to the a12/B12/A1/B1 of the first output interface 60, the base voltage of the third transistor Q3 (PNP transistor) is pulled down to 0V, at this time, the emitter voltage of the third transistor Q3 is 5V, the third transistor Q3 is turned on, so that the voltage at the base terminal of the second transistor Q2 is vbus×r3/(the voltage of the third resistor R2+r3), at this time, the base terminal voltage of the second transistor Q2 will be 0.7V or higher than the voltage of the CC line, and the first output interface 60 is turned off, and the voltage at the base terminal of the second transistor Q2 is charged normally. It should be noted that, in the present application, one or two pins of a12, B12, A1 or B1 pins in the TYPE-C terminal interface are used as a C port insertion detection pin of the TYPE-C, for identifying whether a powered device is accessed.
C: when the powered device of the first output interface 60 is removed, that is, at least one of pins a12, B12, A1, and B1 in the TYPE-C terminal interface is used as a C-port removal detection pin of the TYPE-C to identify whether the powered device is removed, if the base end of the third transistor Q3 is suspended after the powered device is removed, the third transistor Q3 is closed, and the second transistor Q2 is opened, the voltage of the CC line for connecting the first CC pin of the input interface 10 and the second CC pin of the first output interface 60 is pulled down to 1.7V. At this time, the power supply device outputs a voltage of 5V, the voltage of the Vbus line is 5V, the circuit is powered normally, and at this time, the first transistor Q1 is also turned on.
It should be noted that, the third resistor R3 is connected in parallel to the first capacitor C1, and the purpose of the first capacitor C1 is to set the third transistor Q3 to be closed, when the second transistor Q2 is turned on, there is a delay of more than 200ms, when the third transistor Q3 is turned on, the first capacitor C1 charges to Vbus x the voltage of the third resistor R3/(the voltage of the second resistor R2+the voltage of the third resistor R3), the third transistor Q3 is closed, and when the capacitor of the first capacitor C1 discharges to 1V, the second transistor Q2 is turned on.
D: when the two second output interfaces 70 have powered devices attached, and the first output interface 60 has no powered devices attached, since in a, it is already known that the output voltage of the step-down module 50 is 5V and the voltage of Vbus is also 5V, the voltage of Vgs of the fifth transistor Q5 in the circuit of the voltage switching module 30 is divided into negative voltages by the eighth resistor R8 and the ninth resistor R9 (since the gate of the fifth transistor Q5 is 0V and the source is 5V, the Vgs is-5V), and the on condition is satisfied at this time. When the fifth transistor Q5 cannot meet the conduction condition, the powered device connected to the two output interfaces is powered by Vbus, and the powered device normally receives 5V charging, so that the problem that when a voltage difference exists between the input and output of the voltage reduction module 50, the powered device is low in power supply voltage and small in charging current is solved.
E: when two second output interfaces 70 are connected with power receiving equipment, the first output interface 60 is also connected with the power receiving equipment, when the voltage of Vbus is smaller than 6.2V, under the flow of A and B, the voltage stabilizing tube stabilizes the voltage of the base end of the fifth transistor Q5 at 5.6V, the fifth transistor Q5 cannot meet the conduction condition, at the moment, the first output interface 60 and the two second output interfaces 70 are powered by the Vbus, the voltage is not reduced through the circuit of the voltage reducing module 50, the loss is reduced, and the problem that the power supply equipment is easily pulled down by multiple charges is solved.
F: when two second output interfaces 70 have power receiving equipment connected, the first output interface 60 is connected with the power receiving equipment, when the voltage of Vbus is greater than 6.2V, under the flow of a and B, the voltage stabilizing tube stabilizes the voltage of the base terminal of the fifth transistor Q5 at 5.6V, the charging voltage of the first output interface 60 is greater than 6.2V, the fifth transistor Q5 meets the conducting condition, the fifth transistor Q5 is conducted, the GS (G is the gate of the fourth transistor Q4, S is the source of the fourth transistor Q4) voltage of the fourth transistor Q4 is clamped at 0V, the fourth transistor Q4 is turned off, the first output interface 60 is powered by Vbus, the two second output interfaces 70 are powered by the voltage reducing module 50, and normal charging is achieved.
According to the power receiving device, the input interface 10, the CC signal line switching module 20, the voltage switching module 30, the ground wire detection module 40, the voltage reduction module 50, the first output interface 60 and the at least one second output interface 70 can enable the power receiving device of the first output interface 60 to be charged rapidly in any state, and the power receiving device of the second output interface 70 can be charged normally.
In a second aspect, the present application provides a one-to-many fast charging wire, which includes the one-to-many fast charging circuit described above. It will be appreciated that the options of the one-to-many fast charging circuit in the above embodiment are equally applicable to the present embodiment, and thus the description thereof will not be repeated here.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application.
Claims (10)
1. A one-to-many fast charge circuit, comprising: the device comprises an input interface, a CC signal line switching module, a voltage switching module, a ground wire detection module, a voltage reduction module, a first output interface and at least one second output interface;
the input interface is connected with the first output interface, wherein the first output interface is a TYPE-C terminal interface, and at least one of pins A12, B12, A1 and B1 in the TYPE-C terminal interface is used as a C port insertion detection pin of TYPE-C for identifying whether power receiving equipment is accessed;
the CC signal line switching module is connected with at least one of pins A12, B12, A1 and B1 of the first output interface, and is used for switching the CC signals of the power supply equipment of the input interface and the power receiving equipment of the first output interface and the power supply voltage of the power receiving equipment when at least one of pins A12, B12, A1 and B1 is accessed by the power receiving equipment, so that the power receiving equipment of the first output interface is charged rapidly;
the input interface is connected with the second output interface through the voltage switching module or the voltage reducing module, and is used for supplying power to the powered device connected with the second output interface through the voltage switching module or the voltage reducing module if the powered device connected with the second output interface is connected with the second output interface.
2. The one-to-many fast charging circuit of claim 1, wherein,
the input interface comprises a first Vbus pin, a first GND pin and a first CC pin;
the first output interface comprises a second Vbus pin, a second GND pin, a second CC pin and an EN pin, wherein the EN pin is at least one pin of A12, B12, A1 and B1 pins in the TYPE-C terminal interface;
the first Vbus pin is connected with the second Vbus pin;
a first transistor is connected between the first CC pin and the second CC pin;
the first GND pin is grounded; the second GND pin is grounded.
3. The one-to-multiple fast charging circuit according to claim 2, wherein the CC signal line switching module comprises a Vbus connection unit and a CC signal connection unit;
one end of the Vbus connection unit is connected to a Vbus line between the first Vbus pin and the second Vbus pin, and the other end of the Vbus connection unit is connected to the EN pin of the first output interface; the Vbus connection unit is configured to realize fast charging of the powered device of the first output interface by Vbus power supply when the CC signal connection unit is not turned on when the powered device of the first output interface is connected;
one end of the CC signal connection unit is connected to a CC line between the first CC pin and the second CC pin, and the other end of the CC signal connection unit is connected to the Vbus connection unit.
4. The one-to-many fast charge circuit of claim 3, wherein the CC signal line switching module further comprises a first capacitor;
the CC signal connection unit comprises a third resistor and a second transistor; the emitter terminal of the second transistor is connected to the CC line, and the base terminal of the second transistor is connected to the Vbus connection unit; one end of the third resistor is connected with the collector end of the second transistor, and the other end of the third resistor is connected with the base end of the second transistor;
the first capacitor is connected with the third resistor in parallel, and is used for conducting the second transistor in a delay mode when the third transistor is closed.
5. The one-to-many fast charge circuit of claim 2, wherein the ground detection module further comprises a fourth resistor and a fifth resistor; one end of the fourth resistor is grounded, and the other end of the fourth resistor is connected with the grid end of the first transistor;
the source terminal of the first transistor is connected with the first CC pin of the input interface; the drain terminal of the first transistor is connected with the second CC pin of the first output interface;
one end of the fifth resistor is connected to the gate end of the first transistor, and the other end of the fifth resistor is connected with a voltage supply end.
6. The one-to-many fast charging circuit according to claim 3 or 4, wherein the buck module comprises a buck chip and an auxiliary line unit;
an EN pin of the buck chip is connected with the first Vbus pin of the input interface;
one end of the auxiliary circuit unit is connected with an LX pin of the buck chip, and the other end of the auxiliary circuit unit is connected with an FB pin of the buck chip; the other end of the auxiliary line unit is connected to the second output interface.
7. The one-to-multiple fast charging circuit of claim 6, wherein the voltage switching module comprises a voltage switching auxiliary unit, a fourth transistor and a voltage regulator;
a source terminal of the fourth transistor is connected to a Vbus line between the input interface and the first output interface; the drain terminal of the fourth transistor is connected with the second output interface; the grid electrode of the fourth transistor is grounded;
one end of the voltage switching auxiliary unit is connected to the Vbus line between the input interface and the first output interface, one end of the voltage switching auxiliary unit is connected with the voltage stabilizing tube, and one end of the voltage switching auxiliary unit is connected with the gate end of the fourth transistor.
8. The one-to-many fast charging circuit of claim 7, wherein the voltage switching module further comprises: a ninth resistor and a tenth resistor;
the voltage switching auxiliary unit comprises an eighth resistor and a fifth transistor;
the grid end of the fourth transistor is grounded through the ninth resistor;
one end of the eighth resistor is connected to a Vbus line between the input interface and the first output interface, and the other end of the eighth resistor is connected to a line between the drain terminal of the fourth transistor and a ninth resistor;
an emitter terminal of the fifth transistor is connected to a Vbus line between the input interface and the first output interface; a collector terminal of the fifth transistor is connected to a line between a drain terminal of the fourth transistor and a ninth resistor; the base electrode end of the fifth transistor is connected with one end of the voltage stabilizing tube; the other end of the voltage stabilizing tube is connected with one end of a tenth resistor; the other end of the tenth resistor is connected with the grounding end of the ninth resistor.
9. A one-to-many fast charge circuit according to claim 7 or 8, wherein the second output interface v+ pin is connected to the fourth transistor; and the second output interface V-pin is grounded.
10. A one-to-many fast charge wire comprising a one-to-many fast charge circuit as claimed in any one of claims 1 to 9.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322241460.0U CN220570347U (en) | 2023-08-18 | 2023-08-18 | One drags many quick charge circuit and wire rod |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322241460.0U CN220570347U (en) | 2023-08-18 | 2023-08-18 | One drags many quick charge circuit and wire rod |
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| CN220570347U true CN220570347U (en) | 2024-03-08 |
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| CN202322241460.0U Active CN220570347U (en) | 2023-08-18 | 2023-08-18 | One drags many quick charge circuit and wire rod |
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