CN220290214U - Main board for fault self-checking - Google Patents
Main board for fault self-checking Download PDFInfo
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- CN220290214U CN220290214U CN202321961255.5U CN202321961255U CN220290214U CN 220290214 U CN220290214 U CN 220290214U CN 202321961255 U CN202321961255 U CN 202321961255U CN 220290214 U CN220290214 U CN 220290214U
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Abstract
The embodiment of the utility model discloses a fault self-checking main board, which comprises a main board body, wherein a processor, a south bridge chip, an SIO chip, a power supply circuit and a fault self-checking positioning circuit are arranged on the main board body; the fault self-checking and positioning circuit is connected with the processor, the south bridge chip, the SIO chip and the power supply circuit; the fault self-checking and positioning circuit detects the high and low levels of signals output by the south bridge chip, the SIO chip and the power supply circuit and carries out corresponding on-off prompt. The fault self-checking and positioning circuit is directly integrated on the main board, and important signals and voltage on the main board can be detected without externally connecting a Debug card; the fault self-checking and positioning circuit is irrelevant to the platform or the function of the main board application and is controlled only by the high and low levels of the corresponding signals or voltages, so that the problem that the existing Debug card cannot be compatible with fault detection of various platforms is solved.
Description
Technical Field
The utility model relates to the technical field of electronics, in particular to a mainboard for fault self-checking.
Background
In order to test whether signals output by the important modules are normal or not conveniently, the code running of a Debug card (an external card with a hardware Debug function) is usually supported through a TPM (Trusted Platform Module) function on the main board, namely, when the Debug card is inserted into a slot of the main board and the computer is started, various codes are displayed on a display screen on the Debug card according to the starting progress, and the faults of the main board can be detected according to the codes. For example, code 01 represents a processor test, indicating that the CPU itself did not pass the test. However, in the actual debugging process, many platforms (such as the Feiteng platform) cannot support the TPM function, namely, the Debug card is not supported, so that many problems exist in the Debug card and the problem signals cannot be quickly located, and the difficulty of locating and searching the problem signals is greatly increased. In addition, when the Debug card is used, the plug operation is required, and pin faults or poor contact can occur in frequent plug operation, so that fault detection of the main board can be misled, and an error detection result is given out.
Disclosure of Invention
Aiming at the technical problems, the embodiment of the utility model provides a fault self-checking mainboard to solve the problem that the existing Debug card cannot be compatible with fault detection of various platforms.
The embodiment of the utility model provides a fault self-checking mainboard, which comprises a mainboard body, wherein a processor, a south bridge chip, an SIO chip and a power supply circuit are arranged on the mainboard body;
the fault self-checking and positioning circuit detects the high and low levels of signals output by the south bridge chip, the SIO chip and the power supply circuit and carries out corresponding on-off prompt.
Optionally, in the fault self-checking motherboard, the signals output by the south bridge chip, the SIO chip and the power circuit include a first type signal, a second type signal, a third type signal, a fourth type signal and a fifth type signal:
the first type of signals comprise +3VSB voltage and +5VSB voltage output by a power circuit and RSMRST_L signals output to the SIO chip by the south bridge chip;
the second type of signals are switching pulse signals, and the switching pulse signals comprise FP_PWRBDTN_L signals and SIO_PWRBDN_L signals which are output to the south bridge chip by the SIO chip;
the third type of signals are starting time sequence signals, and the third type of signals comprise +12V voltage, +VCC3 voltage, +VCC voltage and VCCIO voltage output by a power circuit; the south bridge chip outputs an SLP3_L signal and an SLP4_L signal to the SIO chip, the SIO chip outputs an ATX_PWRGD signal to the power supply circuit, and the south bridge chip outputs a PCH_PWROK signal to the processor; the SIO chip outputs a PWRGD3 signal, a PROCPWRGD signal and a SIO_PCIRST1_L signal to the south bridge and the processor;
the fourth type of signals are power supply working signals which are output to a power supply circuit by the SIO chip;
the fifth type of signals are power-on enabling signals which are output by the power supply circuit and are generated when the main board is plugged in.
Optionally, in the fault self-checking motherboard, the fault self-checking positioning circuit includes a plug-in detection module, a switch detection module, a time sequence detection module, a power supply detection module and a loop module; the loop module is connected with the plug-in detection module, the switch detection module, the time sequence detection module and the power supply circuit;
the plug-in detection module detects the level state of the first type of signals and carries out corresponding indication lamp on-off prompt;
the switch detection module detects the level state of the switch pulse signal and carries out corresponding indication lamp on-off prompt;
the time sequence detection module detects the level state of the starting time sequence signal and carries out corresponding indication lamp on-off prompt;
the power supply detection module detects the level state of a power supply working signal and carries out corresponding indication lamp on-off prompt;
the loop module controls the on-off of the plug-in detection module, the switch detection module, the time sequence detection module, the power supply detection module and the grounding loop according to the power-on enabling signal.
Optionally, in the fault self-checking motherboard, the plug-in detection module includes a first indicator light, a second indicator light, a third indicator light, a first resistor, a second resistor and a third resistor;
the positive electrode of the first indicator lamp is connected with one end of a first resistor, the other end of the first resistor is input with +3VSB voltage, the positive electrode of the second indicator lamp is connected with one end of a second resistor, the other end of the second resistor is input with an RSMRST_L signal, the positive electrode of the third indicator lamp is connected with one end of a third resistor, and the other end of the third resistor is input with +5VSB voltage; the negative electrode of the first indicator lamp, the negative electrode of the second indicator lamp and the negative electrode of the third indicator lamp are all connected with the loop module.
Optionally, in the fault self-checking motherboard, the switch detection module includes a fourth indicator light, a fifth indicator light, a fourth resistor and a fifth resistor;
the positive electrode of the fourth indicator lamp is connected with one end of the fourth resistor, the other end of the fourth resistor is input with an FP_PWRBDN_L signal, the positive electrode of the fifth indicator lamp is connected with one end of the fifth resistor, the other end of the fifth resistor is input with an SIO_PWRBDN_L signal, and the negative electrode of the fourth indicator lamp and the negative electrode of the fifth indicator lamp are both connected with the loop module.
Optionally, in the fault self-checking motherboard, the timing detection module includes a sixth indicator to a sixteenth indicator, and a sixth resistor to a sixteenth resistor; the positive electrode of the sixth indicator lamp is connected with one end of a sixth resistor, the other end of the sixth resistor is input with an SLP3_L signal, the positive electrode of the seventh indicator lamp is connected with one end of a seventh resistor, the other end of the seventh resistor is input with an SLP4_L signal, the positive electrode of the eighth indicator lamp is connected with one end of the eighth resistor, the other end of the eighth resistor is input with +12V voltage, the positive electrode of the ninth indicator lamp is connected with one end of the ninth resistor, the other end of the ninth resistor is input with +VCC3 voltage, the positive electrode of the tenth indicator lamp is connected with one end of the tenth resistor, the other end of the tenth resistor is input with +VCC voltage, the positive electrode of the eleventh indicator lamp is connected with one end of the eleventh resistor, the other end of the eleventh resistor is input with an ATX_PWD signal, the positive electrode of the twelfth indicator lamp is connected with one end of the twelfth resistor, the other end of the twelfth resistor is input with PCH_PWROK signal, the positive electrode of the thirteenth indicator lamp is connected with one end of the thirteenth resistor, the other end of the thirteenth resistor is input with +12V voltage, the positive electrode of the other end of the thirteenth resistor is connected with one end of the fourteenth resistor, the positive electrode of the fourteenth indicator lamp is connected with the fourteenth resistor is input with the sixteenth signal of the sixteenth resistor; and the negative electrode of the sixth indicator lamp to the negative electrode of the sixteenth indicator lamp are connected with the loop module.
Optionally, in the fault self-checking motherboard, the power supply detection module includes a seventeenth indicator light and a seventeenth resistor;
the negative electrode of the seventeenth indicator light is connected with one end of the seventeenth resistor, the other end of the seventeenth resistor is input with a power supply working signal, and the positive electrode of the seventeenth indicator light is input with +5VSB voltage.
Optionally, in the fault self-checking motherboard, the loop module includes a first switching tube and an eighteenth resistor;
the grid electrode of the first switch tube is connected with one end of an eighteenth resistor, the other end of the eighteenth resistor is input with a power-on enabling signal, the source electrode of the first switch tube is grounded, and the drain electrode of the first switch tube is connected with the negative electrode of the first indicator lamp to the negative electrode of the sixteenth indicator lamp.
Optionally, in the fault self-checking motherboard, the first switching tube is an NMOS tube.
Optionally, in the fault self-checking motherboard, each indicator light is a light emitting diode.
In the technical scheme provided by the embodiment of the utility model, the main board for fault self-checking comprises a main board body, wherein a processor, a south bridge chip, an SIO chip, a power supply circuit and a fault self-checking positioning circuit are arranged on the main board body; the fault self-checking and positioning circuit is connected with the processor, the south bridge chip, the SIO chip and the power supply circuit; the fault self-checking and positioning circuit detects the high and low levels of signals output by the south bridge chip, the SIO chip and the power supply circuit and carries out corresponding on-off prompt. The fault self-checking and positioning circuit is directly integrated on the main board, and important signals and voltage on the main board can be detected without externally connecting a Debug card; the fault self-checking and positioning circuit is irrelevant to the platform or the function of the main board application and is controlled only by the high and low levels of the corresponding signals or voltages, so that the problem that the existing Debug card cannot be compatible with fault detection of various platforms is solved.
Drawings
Fig. 1 is a block diagram of a motherboard for fault self-detection in an embodiment of the present utility model.
FIG. 2 is a circuit diagram of a fault self-checking and locating circuit according to an embodiment of the utility model.
Fig. 3 is a schematic circuit layout of a motherboard according to an embodiment of the utility model.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. Embodiments of the present utility model are intended to be within the scope of the present utility model as defined by the appended claims.
Referring to fig. 1, a motherboard for fault self-checking provided by the embodiment of the utility model is mainly a computer motherboard, and includes a motherboard body, on which an existing processor (i.e. CPU), a south bridge chip, an SIO chip (i.e. a super input/output chip), a power supply circuit, and a fault self-checking positioning circuit added in the embodiment are disposed; the fault self-checking and positioning circuit is connected with the processor, the south bridge chip, the SIO chip and the power supply circuit; the processor is connected with the south bridge chip and the SIO chip, and the south bridge chip is connected with the SIO chip; the power circuit is connected with the processor, the south bridge chip and the SIO chip. The fault self-checking and positioning circuit detects the high and low levels of signals output by the south bridge chip, the SIO chip and the power supply circuit and carries out corresponding on-off prompt.
In this embodiment, according to the power-on and power-on time sequence when the motherboard is operating normally, each signal is classified into five types. The first type of signal is a supply voltage and signal that is generated (i.e., becomes active high) upon board power-on, including +3VSB voltage, +5VSB voltage, and rsmrst_l signals. The power supply circuit carries out corresponding voltage reduction processing on the power supply voltage input during power-on, and then outputs +3VSB voltage of 3V and +5VSB voltage of 5V to supply power to the main board. The RSMRST_L signal is output to the SIO chip by the south bridge chip, and becomes high upon power-on, otherwise, the signal indicates a fault.
The second type of signal is a switching pulse signal, including fp_pwrbtn_l signal and sio_pwrbtn_l signal, which are signals output from the SIO chip to the south bridge chip. After the board is plugged in, the fp_pwrbtn_l signal and the sio_pwrbtn_l signal are high. When the user presses the power switch key, the fp_pwrbtn_l signal and the sio_pwrbtn_l signal need to generate a low pulse, i.e., go low for a preset time and then resume high, if there is no low pulse, otherwise, the fp_pwrbtn_l signal indicates that there is a fault.
The third type of signals are power-on timing signals, including +12V voltage, +VCC3 voltage, +VCC voltage, VCCIO voltage, SLP3_L signal, SLP4_L signal, ATX_PWRGD signal, PCH_PWROK signal, PWRGD3 signal, PROCPWRGD signal, and SIO_PCIRST1_L signal. The power supply circuit carries out corresponding step-down processing on the power supply voltage input during power-on, and then outputs +12V voltage, +VCC3 voltage, +VCC voltage and VCCIO voltage, wherein except that the VCCIO voltage is used for supplying power to the processor, the other voltage is used for supplying power to the main board. The slp3_l signal and the slp4_l signal are output from the south bridge chip to the SIO chip. The ATX_PWRGD signal is output from the SIO chip to the power circuit. The PCH_PWROK signal is output to the processor by the south bridge chip. The PWRGD3 signal, procpwgd signal, and sio_pcirs1_l signals are output by the SIO chip to the south bridge and processor. When the power-on is normal, the signals and the voltages are changed to the corresponding high level, otherwise, the signals and the voltages are in fault.
The fourth type of signal is a power supply operation signal PSON_L, which is output from the SIO chip to the power supply circuit. The power supply operating signal PSON_L is relatively special, low when turned on, otherwise indicating a fault.
The fifth type of signal is a power-on enable signal +3v3_dsw that is generated (i.e., becomes active high) when the motherboard is powered on, and the power supply circuit outputs the power-on enable signal +3v3_dsw after filtering the power supply voltage input during power-on.
It should be understood that the above signals and voltages are all related art, and the functions and connection relationships of the existing processor, south bridge chip, SIO chip, and power supply circuit are also related art. The embodiment mainly detects each existing signal and voltage and carries out indication lamp on-off prompt, so that a user can conveniently and quickly locate the signal with the problem.
Correspondingly, the fault self-checking positioning circuit comprises a plug-in detection module 10, a switch detection module 20, a time sequence detection module 30, a power supply detection module 40 and a loop module 50; the loop module 50 is connected with the plug-in detection module 10, the switch detection module 20, the time sequence detection module 30 and the power circuit; the plug-in detection module 10 is connected with the power supply circuit and the south bridge chip, and the switch detection module 20 is connected with the SIO chip; the time sequence detection module 30 is connected with the power circuit, the south bridge chip and the SIO chip; the power detection module 40 connects the power circuit and the SIO chip.
The power-on detection module 10 detects the level state of the corresponding signal and voltage (i.e. the first type signal) when the main board is powered on, and carries out corresponding indication lamp on-off prompt. The switch detection module 20 detects the level state of the switch pulse signal and carries out corresponding indication lamp on-off prompt. The timing detection module 30 detects the level state of the power-on timing signal and performs corresponding indication of the on/off of the indicator light. The power detection module 40 detects the level state of the power working signal and carries out corresponding indication lamp on-off prompt. The loop module 50 controls the on-off of the plug-in detection module 10, the switch detection module 20, the timing detection module 30, the power detection module 40 and the ground loop according to the power-on enable signal +3v3_dsw.
Referring to fig. 2, the plug-in detection module 10 includes a first indicator light D1, a second indicator light D2, a third indicator light D3, a first resistor R1, a second resistor R2, and a third resistor R3; the positive electrode of the first indicator lamp D1 is connected with one end of a first resistor R1, the other end of the first resistor R1 is input with +3VSB voltage, the positive electrode of the second indicator lamp D2 is connected with one end of a second resistor R2, the other end of the second resistor R2 is input with an RSMRST_L signal, the positive electrode of the third indicator lamp D3 is connected with one end of a third resistor R3, and the other end of the third resistor R3 is input with +5VSB voltage; the negative electrode of the first indicator lamp D1, the negative electrode of the second indicator lamp D2 and the negative electrode of the third indicator lamp D3 are all connected with the loop module 50.
Normally, when the main board is plugged in, the loop module 50 is conducted to connect the cathodes of D1-D3 with the ground. The one-plug, +3VSB voltage, +5VSB voltage, and rsmrst_l signals become high, and at this time, all of the 3 indication lamps D1 to D3 should be lighted. If the indicating lamp is not on, the signal or voltage corresponding to the indicating lamp is indicated to be faulty.
The switch detection module 20 comprises a fourth indicator light D4, a fifth indicator light D5, a fourth resistor R4 and a fifth resistor R5; the positive electrode of the fourth indicator lamp D4 is connected to one end of the fourth resistor R4, the other end of the fourth resistor R4 is input with the fp_pwrbtn_l signal, the positive electrode of the fifth indicator lamp D5 is connected to one end of the fifth resistor R5, the other end of the fifth resistor R5 is input with the sio_pwrbtn_l signal, and the negative electrode of the fourth indicator lamp D4 and the negative electrode of the fifth indicator lamp D5 are both connected to the loop module 50.
Normally, when the motherboard is plugged in, the loop module 50 is turned on to connect the cathodes of D4 and D5 with ground. The plug-in fp_pwrbtn_l signal and the sio_pwrbtn_l signal become high, and both of the 2 indicator lamps D4 and D5 should be normally on. When the power switch key is pressed, the fp_pwrbtn_l signal and the sio_pwrbtn_l signal generate a low pulse, D4 and D5 need to be turned off and then turned on again, and if the indicator light is not turned off and then turned on again, a fault is indicated.
The timing detection module 30 includes a sixth indicator lamp D6, a seventh indicator lamp D7, an eighth indicator lamp D8, a ninth indicator lamp D9, a tenth indicator lamp D10, an eleventh indicator lamp D11, a twelfth indicator lamp D12, a thirteenth indicator lamp D13, a fourteenth indicator lamp D14, a fifteenth indicator lamp D15, a sixteenth indicator lamp D16, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, and a sixteenth resistor R16; the positive electrode of the sixth indicator lamp D6 is connected with one end of a sixth resistor R6, the other end of the sixth resistor R6 is input with an SLP3_L signal, the positive electrode of the seventh indicator lamp D7 is connected with one end of the seventh resistor R7, the other end of the seventh resistor R7 is input with an SLP4_L signal, the positive electrode of the eighth indicator lamp D8 is connected with one end of the eighth resistor R8, the other end of the eighth resistor R8 is input with +12V voltage, the positive electrode of the ninth indicator lamp D9 is connected with one end of the ninth resistor R9, the other end of the ninth resistor R9 is input with +VC3 voltage, the positive electrode of the tenth indicator lamp D10 is connected with one end of the tenth resistor R10, the other end of the tenth resistor R10 is input with +VCC voltage, the positive electrode of the eleventh indicator lamp D11 is connected with one end of the eleventh resistor R11, the other end of the eleventh resistor R11 is input with an ATX_PWRD signal, the positive electrode of the twelfth indicator lamp D12 is connected with one end of the twelfth resistor R12, the other end of the twelfth resistor R12 is input with a PCH_PWK signal, the other end of the thirteenth indicator lamp D12 is connected with the other end of the thirteenth resistor R13, the positive electrode of the thirteenth indicator lamp D13 is connected with the thirteenth end of the thirteenth resistor R13 is connected with the sixteenth end of the sixteenth resistor R16, the sixteenth resistor R16 is connected with the sixteenth end of the sixteenth resistor R16; the negative electrode of the sixth indicator lamp D6, the negative electrode of the seventh indicator lamp D7, the negative electrode of the eighth indicator lamp D8, the negative electrode of the ninth indicator lamp D9, the negative electrode of the tenth indicator lamp D10, the negative electrode of the eleventh indicator lamp D11, the negative electrode of the twelfth indicator lamp D12, the negative electrode of the thirteenth indicator lamp D13, the negative electrode of the fourteenth indicator lamp D14, the negative electrode of the fifteenth indicator lamp D15, and the negative electrode of the sixteenth indicator lamp D16 are all connected to the loop module 50.
When the main board is plugged in, the loop module 50 is conducted, and the cathodes of D6-D16 are connected with the ground. During normal power-on, the +12V voltage, +VCC3 voltage, +VCC voltage, VCCIO voltage, SLP3_L signal, SLP4_L signal, ATX_PWRGD signal, PCH_PWROK signal, PWRGD3 signal, PROCPWRGD signal and SIO_PCIRST1_L signal become high level, and at this time, 11 indicator lamps D6-D16 should be all turned on. If the indicating lamp is not on, the signal or voltage corresponding to the indicating lamp is indicated to be faulty.
The power detection module 40 includes a seventeenth indicator lamp D17 and a seventeenth resistor R17, where a negative electrode of the seventeenth indicator lamp D17 is connected to one end of the seventeenth resistor R17, a power operation signal pson_l is input to the other end of the seventeenth resistor R17, and a +5VSB voltage is input to the positive electrode of the seventeenth indicator lamp D17.
Since the power supply operation signal pson_l is low at the time of power-on, this signal serves as the negative electrode of D17, and is high at the time of power-on, and the corresponding D17 is not lit. During normal power-on, the power-on signal PSON_L is pulled low and D1 is correspondingly turned on.
The loop module 50 comprises a first switching tube Q1 and an eighteenth resistor R18; the grid electrode of the first switch tube Q1 is connected with one end of an eighteenth resistor R18, the other end of the eighteenth resistor R18 is input with a power-on enabling signal +3V3_DSW, the source electrode of the first switch tube Q1 is grounded, and the drain electrode of the first switch tube Q1 is connected with the negative electrode of the first indicator lamp D1 to the negative electrode of the sixteenth indicator lamp D16.
The first switching tube Q1 is an NMOS tube. As soon as the main board is plugged in, the power-on enabling signal +3v3_dsw becomes high level, the first switching tube Q1 is continuously turned on, and the cathodes of D1 to D16 form a loop. If the power-on enable signal +3v3_dsw fails, all the indicator lamps cannot be normally turned on and off.
The first resistor R1 to the seventeenth resistor R17 are used for blocking flow, and the size of the resistor can determine the brightness of the indicator lamp. D1-D16 can adopt light-emitting diodes or LED indicator lamps. In the implementation, the signal or voltage to be detected can be increased or decreased according to the requirement, and then the resistor and the indicator lamp are correspondingly increased. Fig. 3 only shows the positions of some important elements related to the present embodiment on the main board, which is only an example, and each indicator light and the resistor connected thereto are disposed adjacently in the layout, and the first resistor R1 to the seventeenth resistor R17 are preferably disposed near the output end of the corresponding signal or voltage, so that when the fault lights up and out, the user can conveniently and quickly find the position of the signal or voltage on the main board. Signal names and voltage names may also be silk-screened under each indicator light. The layout can be carried out according to the requirements in the specific implementation; other existing components on the motherboard are not described in detail herein.
In summary, the fault self-checking motherboard provided by the utility model directly integrates the fault self-checking positioning circuit on the motherboard, can detect important signals and voltages on the motherboard without externally connecting a Debug card, controls the on-off of corresponding indicator lamps by each signal and voltage to carry out fault prompt, and is convenient for a user to quickly position the motherboard fault; and the Debug card is not required to be pulled out and plugged in for many times, so that the problem of detection errors caused by interface pin faults can be avoided. The fault self-checking and positioning circuit is irrelevant to a platform or a function of the main board application and is controlled only by the high and low levels of corresponding signals or voltages, so that the fault self-checking and positioning circuit can be compatible with any platform and the compatibility is improved.
The above embodiments are only for illustrating the technical solution of the present utility model, and are not limiting; although the utility model has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present utility model.
Claims (10)
1. The main board comprises a main board body, wherein a processor, a south bridge chip, an SIO chip and a power circuit are arranged on the main board body;
the fault self-checking and positioning circuit detects the high and low levels of signals output by the south bridge chip, the SIO chip and the power supply circuit and carries out corresponding on-off prompt.
2. The motherboard of claim 1, wherein the signals output by the south bridge chip, the SIO chip, and the power circuit comprise a first type signal, a second type signal, a third type signal, a fourth type signal, and a fifth type signal:
the first type of signals comprise +3VSB voltage and +5VSB voltage output by a power circuit and RSMRST_L signals output to the SIO chip by the south bridge chip;
the second type of signals are switching pulse signals, and the switching pulse signals comprise FP_PWRBDTN_L signals and SIO_PWRBDN_L signals which are output to the south bridge chip by the SIO chip;
the third type of signals are starting time sequence signals, and the third type of signals comprise +12V voltage, +VCC3 voltage, +VCC voltage and VCCIO voltage output by a power circuit; the south bridge chip outputs an SLP3_L signal and an SLP4_L signal to the SIO chip, the SIO chip outputs an ATX_PWRGD signal to the power supply circuit, and the south bridge chip outputs a PCH_PWROK signal to the processor; the SIO chip outputs a PWRGD3 signal, a PROCPWRGD signal and a SIO_PCIRST1_L signal to the south bridge and the processor;
the fourth type of signals are power supply working signals which are output to a power supply circuit by the SIO chip;
the fifth type of signals are power-on enabling signals which are output by the power supply circuit and are generated when the main board is plugged in.
3. The motherboard of claim 2, wherein the fault self-checking positioning circuit comprises a plug-in detection module, a switch detection module, a timing detection module, a power detection module, and a loop module; the loop module is connected with the plug-in detection module, the switch detection module, the time sequence detection module and the power supply circuit;
the plug-in detection module detects the level state of the first type of signals and carries out corresponding indication lamp on-off prompt;
the switch detection module detects the level state of the switch pulse signal and carries out corresponding indication lamp on-off prompt;
the time sequence detection module detects the level state of the starting time sequence signal and carries out corresponding indication lamp on-off prompt;
the power supply detection module detects the level state of a power supply working signal and carries out corresponding indication lamp on-off prompt;
the loop module controls the on-off of the plug-in detection module, the switch detection module, the time sequence detection module, the power supply detection module and the grounding loop according to the power-on enabling signal.
4. The motherboard of claim 3, wherein said plug-in detection module comprises a first indicator light, a second indicator light, a third indicator light, a first resistor, a second resistor, and a third resistor;
the positive electrode of the first indicator lamp is connected with one end of a first resistor, the other end of the first resistor is input with +3VSB voltage, the positive electrode of the second indicator lamp is connected with one end of a second resistor, the other end of the second resistor is input with an RSMRST_L signal, the positive electrode of the third indicator lamp is connected with one end of a third resistor, and the other end of the third resistor is input with +5VSB voltage; the negative electrode of the first indicator lamp, the negative electrode of the second indicator lamp and the negative electrode of the third indicator lamp are all connected with the loop module.
5. The motherboard of claim 4, wherein said switch detection module comprises a fourth indicator light, a fifth indicator light, a fourth resistor, and a fifth resistor;
the positive electrode of the fourth indicator lamp is connected with one end of the fourth resistor, the other end of the fourth resistor is input with an FP_PWRBDN_L signal, the positive electrode of the fifth indicator lamp is connected with one end of the fifth resistor, the other end of the fifth resistor is input with an SIO_PWRBDN_L signal, and the negative electrode of the fourth indicator lamp and the negative electrode of the fifth indicator lamp are both connected with the loop module.
6. The motherboard of claim 5, wherein the timing detection module comprises a sixth indicator light to a sixteenth indicator light, and a sixth resistor to a sixteenth resistor; the positive electrode of the sixth indicator lamp is connected with one end of a sixth resistor, the other end of the sixth resistor is input with an SLP3_L signal, the positive electrode of the seventh indicator lamp is connected with one end of a seventh resistor, the other end of the seventh resistor is input with an SLP4_L signal, the positive electrode of the eighth indicator lamp is connected with one end of the eighth resistor, the other end of the eighth resistor is input with +12V voltage, the positive electrode of the ninth indicator lamp is connected with one end of the ninth resistor, the other end of the ninth resistor is input with +VCC3 voltage, the positive electrode of the tenth indicator lamp is connected with one end of the tenth resistor, the other end of the tenth resistor is input with +VCC voltage, the positive electrode of the eleventh indicator lamp is connected with one end of the eleventh resistor, the other end of the eleventh resistor is input with an ATX_PWD signal, the positive electrode of the twelfth indicator lamp is connected with one end of the twelfth resistor, the other end of the twelfth resistor is input with PCH_PWROK signal, the positive electrode of the thirteenth indicator lamp is connected with one end of the thirteenth resistor, the other end of the thirteenth resistor is input with +12V voltage, the positive electrode of the other end of the thirteenth resistor is connected with one end of the fourteenth resistor, the positive electrode of the fourteenth indicator lamp is connected with the fourteenth resistor is input with the sixteenth signal of the sixteenth resistor; and the negative electrode of the sixth indicator lamp to the negative electrode of the sixteenth indicator lamp are connected with the loop module.
7. The motherboard of claim 6, wherein said power detection module comprises a seventeenth indicator light and a seventeenth resistor;
the negative electrode of the seventeenth indicator light is connected with one end of the seventeenth resistor, the other end of the seventeenth resistor is input with a power supply working signal, and the positive electrode of the seventeenth indicator light is input with +5VSB voltage.
8. The motherboard of claim 6, wherein the loop module comprises a first switching tube and an eighteenth resistor;
the grid electrode of the first switch tube is connected with one end of an eighteenth resistor, the other end of the eighteenth resistor is input with a power-on enabling signal, the source electrode of the first switch tube is grounded, and the drain electrode of the first switch tube is connected with the negative electrode of the first indicator lamp to the negative electrode of the sixteenth indicator lamp.
9. The motherboard of claim 8, wherein said first switching tube is an NMOS tube.
10. The motherboard of claim 7, wherein each indicator light is a light emitting diode.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202321961255.5U CN220290214U (en) | 2023-07-25 | 2023-07-25 | Main board for fault self-checking |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321961255.5U CN220290214U (en) | 2023-07-25 | 2023-07-25 | Main board for fault self-checking |
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| CN220290214U true CN220290214U (en) | 2024-01-02 |
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| CN202321961255.5U Active CN220290214U (en) | 2023-07-25 | 2023-07-25 | Main board for fault self-checking |
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