CN220252233U

CN220252233U - Photoelectric co-packaging integrated structure

Info

Publication number: CN220252233U
Application number: CN202322051819.8U
Authority: CN
Inventors: 刘俊
Original assignee: Shenzhen Optics Valley Technology Co ltd
Current assignee: Shenzhen Optics Valley Technology Co ltd
Priority date: 2023-07-31
Filing date: 2023-07-31
Publication date: 2023-12-26
Anticipated expiration: 2033-07-31

Abstract

The utility model provides a photoelectric co-packaging integrated structure, which comprises: the optical fiber array comprises a circuit substrate, a photon integrated chip, an integrated circuit chip, an optical fiber array component, an optical waveguide device and a grating structure, wherein the photon integrated chip, the integrated circuit chip, the optical fiber array component, the optical waveguide device and the grating structure are respectively packaged on the circuit substrate; the optical fiber array component comprises a single-mode optical fiber array and a multi-core optical fiber array, and the optical waveguide device is used for multiplexing and demultiplexing between the single-mode optical fiber array and the multi-core optical fiber array; the optical-electrical interconnection between the photon integrated chip and the integrated circuit chip is realized by the grating structure, and the connection between the multi-core optical fiber array and the photon integrated chip is realized. The photoelectric co-packaging integrated structure combines the photoelectric co-packaging technology and the space division multiplexing technology into a whole, can realize high-density signal transmission and high-efficiency photoelectric conversion, and has the advantages of low cost and small size.

Description

Photoelectric co-packaging integrated structure

Technical Field

The utility model belongs to the technical field of photoelectric propagation, and particularly relates to a photoelectric co-packaging integrated structure.

Background

In recent years, with the rapid development of application fields such as 5G communication, internet of things, artificial intelligence and the like, the flow of data centers is rapidly increased, and the demands for high-speed, high-precision and high-reliability photoelectric devices and integration technologies are continuously increasing. It is counted that there is approximately three-quarters of the data traffic that remains inside the data center for exchange, and the gap between the rapidly growing traffic demand and the optical performance of conventional pluggable optics continues to expand.

In the conventional optical interconnection technology, each channel needs an independent interface, so that high-density signal transmission cannot be realized; the optical module and the electronic module are packaged separately, the electrical interconnection is long, and the problems of signal integrity, large power consumption, low integration level and the like exist. In addition, conventional optical interconnection technology also requires the use of long optical fibers and large interface devices, and the large volume and mass of the devices results in high production and transportation costs.

Disclosure of Invention

The utility model aims to provide a photoelectric co-packaging integrated structure, which aims to solve the problems of poor signal transmission effect and large volume in the related technology.

In order to solve the technical problems, the utility model is realized in such a way that a photoelectric co-packaging integrated structure comprises: the optical fiber array comprises a circuit substrate, a photon integrated chip, an integrated circuit chip, an optical fiber array component, an optical waveguide device and a grating structure, wherein the photon integrated chip, the integrated circuit chip, the optical fiber array component, the optical waveguide device and the grating structure are respectively packaged on the circuit substrate; the optical fiber array component comprises a single-mode optical fiber array and a multi-core optical fiber array, and the optical waveguide device is used for multiplexing and demultiplexing between the single-mode optical fiber array and the multi-core optical fiber array; the optical-electrical interconnection between the photon integrated chip and the integrated circuit chip is realized by the grating structure, and the connection between the multi-core optical fiber array and the photon integrated chip is realized.

Further, the optical waveguide device comprises an input end, an output end and a transition section, wherein the transition section is connected between the input end and the output end, one end, far away from the transition section, of the input end is opposite to the single-mode fiber array, and one end, far away from the transition section, of the output end is opposite to the multi-core fiber array.

Further, the waveguides in the input end are arranged in a one-dimensional structure, and the waveguides in the output end are arranged in a three-dimensional structure.

Further, the circuit substrate comprises a circuit board and an adapter plate, and the photonic integrated chip, the integrated circuit chip, the optical fiber array component and the grating structure are respectively fixed on one side of the adapter plate, which is away from the circuit board.

Further, the optical fiber array component and the grating structure are packaged on the adapter plate in a flip-chip packaging mode.

Further, the grating structure is coupled perpendicularly to the multi-core fiber array.

Further, the grating structure includes a base layer, a waveguide layer, and an intermediate layer connected between the base layer and the waveguide layer; the waveguide layer has a waveguide unit and a grating unit formed thereon.

Further, the waveguide unit and the grating unit are processed by adopting an etching mode.

Further, the grating structure is divided into an input grating and an output grating.

Further, the multi-core optical fiber array comprises a main board, multi-core optical fibers and a cover plate, wherein the main board is provided with grooves which are arranged at intervals and are used for being fixed with the multi-core optical fibers, and the cover plate covers one side, away from the main board, of the multi-core optical fibers.

Compared with the prior art, the photoelectric co-packaging integrated structure has the beneficial effects that: the high-density photoelectric co-packaging technology is adopted to realize the interconnection packaging of the photonic integrated chip and the integrated circuit chip, so that high-speed and high-bandwidth interconnection can be realized, energy consumption and delay are reduced, and the reliability and flexibility of the data center are improved. And the photoelectric co-packaging technology and the space division multiplexing technology are combined, the efficient coupling between the multi-core optical fiber array and the photon integrated chip is realized by designing the coupling grating, and the space division multiplexing and the demultiplexing between the single-mode optical fiber array and the multi-core optical fiber array are realized by the optical waveguide device, so that the integration density is further improved. Therefore, the photoelectric co-packaging integrated structure provided by the application can realize high-density signal transmission and high-efficiency photoelectric conversion, has the packaging advantages of low cost and small size, and has considerable application prospects in the fields of data centers, communication networks, high-speed calculation and the like.

Drawings

FIG. 1 is a schematic diagram of the overall structure of an optoelectronic co-package integrated structure in an embodiment of the present utility model;

FIG. 2 is a schematic diagram of a multi-core fiber array according to an embodiment of the present utility model;

FIG. 3 is a schematic diagram of coupling of a single mode fiber array, an optical waveguide device, a multi-core fiber array in an embodiment of the utility model;

FIG. 4 is a schematic partial cross-sectional view of a four-core fiber-matched three-dimensional optical waveguide structure in an embodiment of the utility model;

FIG. 5 is a schematic diagram of a grating structure in an embodiment of the utility model;

fig. 6 is a flow chart of a processing process of a grating structure according to an embodiment of the present utility model:

fig. 7 is a schematic diagram of a fiber/grating vertical coupling in an embodiment of the utility model.

In the drawings, each reference numeral denotes: 1. a circuit substrate; 11. a circuit board; 12. an adapter plate; 2. a photonic integrated chip; 3. an integrated circuit chip; 4. an optical fiber array assembly; 41. an array of single mode fibers; 42. a multi-core optical fiber array; 421. a main board; 422. a multi-core optical fiber; 423. a cover plate; 5. a grating structure; 51. a base layer; 52. an intermediate layer; 53. a waveguide layer; 53a, a coating layer; 6. an optical waveguide device.

Detailed Description

Embodiments of the present utility model are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below are exemplary and intended to illustrate the present utility model and should not be construed as limiting the utility model, and all other embodiments, based on the embodiments of the present utility model, which may be obtained by persons of ordinary skill in the art without inventive effort, are within the scope of the present utility model.

In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "circumferential", "radial", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present utility model and simplify the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present utility model.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the field of optical communications, space division multiplexing technology is receiving increasing attention from researchers. Space division multiplexing techniques can be divided into multiplexing techniques based on multi-core fibers and mode multiplexing techniques. The Multi-core optical fiber multiplexing technology is to utilize Multi-core optical fibers with a plurality of independent transmission channels to transmit information to form a Multi-input Multi-output (MIMO) channel so as to improve the transmission capacity and the frequency spectrum efficiency of the system; compared with single-core optical fibers, the multi-core optical fibers have higher transmission capacity and can meet the higher and higher data transmission requirements in modern networks.

With the accelerated landing of AI/ML (artificial intelligence/machine learning) and the high-speed development of the internet of things, the service pressure of a data center is greater and greater, and the transmission capability of a network switching chip is continuously improved. Related art optical fiber communication is often implemented using pluggable optical modules, that is, the connection between the optical module and the switching chip is implemented through SerDes channels; along with the higher energy efficiency of the exchange chip and the optical module, the rate of SerDes must be increased to meet the transmission requirement, and meanwhile, great power consumption is brought, and the signal transmission effect is affected; besides the heat generated by the traditional pluggable optical module in the use process, more heat can be generated by SerDes transmission and chip high-speed signal processing. Therefore, in addition to the increase in the power consumption of the device use, the power consumption of heat dissipation also increases greatly. Furthermore, the conventional optoelectronic integrated chip integrates a photonic integrated chip (Photonic Integrated Circuits, PIC) and an integrated circuit chip (Electronic integrated circuits, EIC) on the same two-dimensional plane, and is directly packaged on a PCB board, and interconnection and control of optical signals and electrical signals are realized through wire bonding. The lead wire of the lead bonding mode is longer, the electrical interconnection path is longer, when a high-frequency signal is transmitted, obvious attenuation can occur in the transmission process of the signal, and the performance of the integrated optical module is reduced; and the occupied area is larger, and the integration density of the chip is lower. As the communication capacity increases, the bandwidth density cannot be satisfied.

Examples:

as shown in fig. 1, in the present embodiment, the optoelectronic co-package integrated structure includes: the photonic integrated circuit comprises a circuit substrate 1, a photonic integrated chip 2, an integrated circuit chip 3, an optical fiber array component 4, an optical waveguide device 6 and a grating structure 5 which are respectively packaged on the circuit substrate 1; the optical fiber array assembly 4 comprises a single-mode optical fiber array 41 and a multi-core optical fiber array 42, and the optical waveguide device 6 is used for multiplexing and demultiplexing between the single-mode optical fiber array 41 and the multi-core optical fiber array 42; the photonic integrated chip 2 and the integrated circuit chip 3 are electrically interconnected, and the grating structure 5 is used to realize connection between the multi-core optical fiber array 42 and the photonic integrated chip 2.

Specifically, advanced photonic devices are integrated into chip packages by using a Co-packaged optics (CPO), so that the routing distance between the photonic integrated chip 2 and the integrated electronic chip integrated circuit chip 3 can be shortened, and the communication speed and communication quality can be improved. Meanwhile, the CPO technology can also reduce the power consumption and space occupation of the system, thereby realizing high-speed, high-density and low-power consumption communication. The CPO technology can support high-frequency optical fiber communication in 5G communication, meet the requirements on high-speed transmission, low delay and large-capacity data processing, provide support for efficient artificial intelligent processing and analysis, and meet the requirements on high-speed calculation and large-capacity data transmission. The optical waveguide device 6 may be a (Fan-in Fan-out) three-dimensional optical waveguide structure. The femtosecond laser has short pulse width and high energy density, and the heat affected area of the processed material is small, so that the processing breaking through the diffraction limit can be even realized through reasonable energy adjustment. Therefore, the embodiment of the application can use the femtosecond laser to process the FIFO three-dimensional optical waveguide structure matched with the multi-core optical fiber array 42, and the 3D laser direct writing technology is utilized to induce the modification of the transparent material by the femtosecond laser, so that the refractive index at the laser focus is increased to form an optical channel; finally, a FIFO three-dimensional optical waveguide structure capable of realizing multiplexing and demultiplexing of the multi-core optical fiber 422 and the single-mode optical fiber is formed.

As shown in fig. 2, in the present embodiment, the multi-core fiber array 42 includes a main board 421, multi-core fibers 422, and a cover board 423, wherein grooves for fixing the multi-core fibers 422 are formed on the main board 421 in spaced rows, and the cover board 423 covers a side of the multi-core fibers 422 facing away from the main board 421.

Specifically, the Multi-core fiber array (MCFA) may be a 4-core fiber, a 7-core fiber, or the like. The multi-core fiber array 42 includes a main board 421, multi-core fibers 422 and a cover plate 423, and the grooves for fixing the multi-core fibers 422 may be V-grooves, that is, the main board 421 is formed with a plurality of V-grooves spaced from each other, and the distances L between adjacent grooves are equal. The angle between the two groove walls of the V-shaped groove may be 50 deg. to 80 deg., preferably 60 deg.. The multicore fibers 422 can be pressed against the two side walls of the V-grooves by the cover plates 423. During assembly, the multi-core optical fiber 422 can be firstly coated and stuck to the V-shaped groove of the main board 421 according to design requirements; then, a high-precision rotation and imaging system is used for controlling the angle of the optical fiber core, so that the position and the direction of each optical fiber are ensured to be free of errors; the angle of the optical fiber rotates by 60 degrees, so that the superposition of the waveguides is ensured during the subsequent grating processing; the cover plate 423 is covered and fixed. More specifically, the optical fiber may be processed by using a cutting machine and a grinder to cut it to a desired length and form a smooth end face; and cleans the fiber surface for detection and verification of the optical properties of the multicore fiber 422 using a microscope or other test equipment.

In the present embodiment, the circuit substrate 1 includes a circuit board 11 and an interposer 12, and the photonic integrated chip 2, the integrated circuit chip 3, the optical fiber array assembly 4, and the grating structure 5 are respectively fixed on a side of the interposer 12 facing away from the circuit board 11.

Specifically, the Interposer 12 may be an Interposer or a TSI (Through-Silicon-Via (TSV) Interposer). The embodiment can realize 2.5D and 3D photoelectric co-encapsulation. The circuit board 11 is also called a Printed circuit board (Printed CircuitBoard, PCB). As shown in fig. 1, in the case of 2.5D packaging, the PIC and the EIC may be integrated on the interposer 12 by Flip-chip bonding (Flip-chip), and the electrical interconnection between the PIC and the EIC may be implemented by metal wiring on the interposer 12, where the interposer 12 is connected to the circuit board 11. When the 3D packaging mode is adopted, PIC is directly used as an interser or TSI, vertical interconnection with EIC is realized, and the interconnection length is shortened, and the chip size is reduced. Of course, in other embodiments, 2D optoco-encapsulation may also be implemented. When the 2D plane photoelectric integration is used, the EIC and the PIC are horizontally arranged and packaged on the PCB, the photoelectric interconnection of the PIC and the EIC is realized by adopting a Wire bonding (Wire-bonding) connection mode, and the 2D integration is realized by chip-on-board packaging.

As shown in fig. 3 and 4, in this embodiment, the optical waveguide device 6 includes an input end, an output end, and a transition section, the transition section is connected between the input end and the output end, one end of the input end, which is far away from the transition section, is opposite to the single-mode optical fiber array 41, and one end of the output end, which is far away from the transition section, is opposite to the multi-core optical fiber array 42. The waveguides in the input end are arranged in a one-dimensional structure, and the waveguides in the output end are arranged in a three-dimensional structure.

Specifically, the optical waveguide device 6 may be a FIFO three-dimensional optical waveguide structure, and a Fan-In-Fan-out (FIFO) structure thereof may implement optical coupling between the single multi-core optical fiber 422 and a plurality of single-mode optical fibers. The transition section adopts a structural design mode of a transition curve, so that the bending loss of the waveguide is reduced while the efficient connection of the input end and the output end is ensured. Taking a four-core fiber as an example, the input end of the waveguide may be a 1×4 one-dimensional waveguide array, and the distance d1 between adjacent waveguides may be 127 μm. The output end of the waveguide may have a three-dimensional arrangement structure matched with the four-core single mode fiber array 41, the four cores are arranged in a square structure, and the core spacing d2 may be 43.5 μm. It will be appreciated that in other embodiments, coupling of the single mode fiber array 41 to the multi-core fiber array 42 may also be accomplished by other fan-in and fan-out optics, without limitation. The FIFO structure can be prepared by adopting a melting cone drawing method, a lens collimation method, an optical fiber corrosion method and the like.

As shown in fig. 5 to 7, in the present embodiment, the grating structure 5 includes a base layer 51, a waveguide layer 53, and an intermediate layer 52 connected between the base layer 51 and the waveguide layer 53; the waveguide layer 53 has a waveguide unit and a grating unit formed thereon. The waveguide unit and the grating unit are processed by adopting an etching mode. The grating structure 5 is divided into an input grating and an output grating.

Specifically, the SOI structure may be divided into a base layer 51, an intermediate layer 52, and a coating layer 53a; the base layer 51 and the coating layer 53a may be Si material layers, and the intermediate layer 52 may be a SiO2 layer. The grating structure 5 may be processed based on the coating layer 53a of the SOI structure. In this embodiment, when the coupling grating is processed on the coating layer 53a, the waveguide portion needs to be deeply etched to have the same depth as the coating layer 53a, and the grating portion is shallow etched to have a depth smaller than the thickness (e.g., 70 nm) of the coating layer 53 a. As shown in fig. 6, the process flow of the grating processing includes the following steps: 1. performing substrate pretreatment; 2. spin-coating photoresist on the coating layer 53a; 3. obtaining a first preset pattern through maskless exposure and development; 4. deep etching is carried out according to a first preset pattern, and the etching depth is 220nm; 5. spin-coating photoresist on the upper surface formed after etching; 6. obtaining a second preset pattern through maskless exposure and development; 7. shallow etching is carried out according to a second preset pattern, the etching depth is 70nm, and the required waveguide unit and grating unit are finally obtained.

As shown in fig. 7, in the present embodiment, the optical fiber array assembly 4 and the grating structure 5 are packaged on the interposer 12 by flip-chip packaging. The grating structure 5 is coupled perpendicularly to the multi-core fiber array 42. The multi-core Fiber Array (FA) and the grating structure 5 may be flip-chip packaged into a module and packaged onto an Interposer, so that efficient interconnection between the multi-core fiber 422 and the photonic integrated chip 2 may be achieved through a coupling grating. The packaging of the optical integrated circuit chip 3 is divided into an optical packaging process and an electrical packaging process, and the optical packaging is performed after the electrical packaging process. The vertical coupling of the multi-core fiber array 42 to the coupling grating is ensured during the optical packaging process, and the chip rate should be higher than that of the substrate to facilitate the coupling alignment when the optical chip is fixed. In this embodiment, the single-mode fiber array 41, the optical waveguide device 6, and the multi-core fiber 422 may be coupled using a waveguide double-ended vertical coupling frame, and the waveguide may be fixed by a vacuum suction waveguide jig. And the six-axis displacement platform is used for adjusting and aligning the single-mode fiber array 41 and the multi-core fiber 422, so that low-loss coupling is realized; real-time observation is performed using a high definition HDMI camera, confirming the coupling condition of the optical device and performing preliminary alignment. After fine adjustment of the device, ultraviolet glue is used for curing. Ultraviolet glue with good light transmittance is selected for end face coupling fixation, so that the influence of curing deformation on the coupling loss of the device can be reduced.

By implementing the above embodiment, the photoelectric co-packaging integrated structure obtained by the photoelectric co-packaging technology based on the space division multiplexing technology has the following advantages compared with the traditional optical interconnection technology: 1. high density signal transmission can be achieved: the multiplexing mode is used for transmitting a plurality of signals at the same time, so that the utilization rate of the optical fiber can be greatly improved. 2. Efficient photoelectric conversion can be achieved: the optical signal is directly converted into an electrical signal or the electrical signal is converted into the optical signal, thereby realizing efficient photoelectric conversion. 3. Compact packaging can be achieved, reducing the volume and weight of the packaging, and thus reducing costs and transportation costs.

The foregoing description of the preferred embodiments of the utility model is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the utility model.

Claims

1. The photoelectric co-packaging integrated structure is characterized by comprising a circuit substrate, a photon integrated chip, an integrated circuit chip, an optical fiber array component, an optical waveguide device and a grating structure, wherein the photon integrated chip, the integrated circuit chip, the optical fiber array component, the optical waveguide device and the grating structure are respectively packaged on the circuit substrate; the optical fiber array assembly comprises a single-mode optical fiber array and a multi-core optical fiber array, and the optical waveguide device is used for multiplexing and demultiplexing between the single-mode optical fiber array and the multi-core optical fiber array; and the optical grating structure is used for realizing connection between the multi-core optical fiber array and the photonic integrated chip.

2. The optoelectronic co-package integrated structure of claim 1, wherein the optical waveguide device comprises an input end, an output end, and a transition section, the transition section is connected between the input end and the output end, an end of the input end, which is far away from the transition section, is opposite to the single-mode fiber array, and an end of the output end, which is far away from the transition section, is opposite to the multi-core fiber array.

3. The optoelectronic co-packaged integrated structure of claim 2, wherein the waveguides in the input end are arranged in a one-dimensional configuration and the waveguides in the output end are arranged in a three-dimensional configuration.

4. The optoelectronic co-package integrated structure of claim 1, wherein the circuit substrate comprises a circuit board and an interposer, the photonic integrated chip, the integrated circuit chip, the fiber array assembly, and the grating structure are respectively secured to a side of the interposer facing away from the circuit board.

5. The optoelectronic co-package integrated structure of claim 4, wherein the fiber array assembly and the grating structure are flip-chip packaged on the interposer.

6. The optoelectronic co-package integrated structure of claim 1, wherein the grating structure is coupled perpendicular to the multi-core fiber array.

7. The optoelectronic co-packaged integrated structure of claim 1, wherein the grating structure comprises a base layer, a waveguide layer, and an intermediate layer connected between the base layer and the waveguide layer; the waveguide layer is formed with a waveguide unit and a grating unit.

8. The optoelectronic co-package integrated structure of claim 7, wherein the waveguide unit and the grating unit are etched.

9. The optoelectronic co-package integrated structure of claim 1, wherein the grating structure is divided into an input grating and an output grating.

10. The optoelectronic co-package integrated structure of claim 1, wherein the multi-core fiber array comprises a motherboard, multi-core fibers, and a cover plate, wherein the motherboard is formed with a groove for fixing with the multi-core fibers, and the cover plate covers a side of the multi-core fibers facing away from the motherboard.