CN220087264U - Switched capacitor filter, phase-locked loop circuit and electronic device - Google Patents

Abstract

The utility model provides a switched capacitor filter, a phase-locked loop circuit and electronic equipment, and belongs to the technical field of electronic circuits. The switched capacitor filter is connected between a current input interface of the electronic device and a post-stage circuit of the electronic device. The switch capacitor filter comprises a switch capacitor circuit and a switch control module, wherein the switch capacitor circuit is connected with the switch control module. The switch capacitor circuit comprises a first branch and a second branch. According to the embodiment of the utility model, the plurality of capacitors are arranged in parallel on the first branch, the first signal or the second signal output by the switch control module is arranged between the capacitors to control the switch to be opened and closed, and the operational amplifier circuit and the corresponding switch are arranged on the second branch to control the charge and discharge of the capacitors, so that the capacitance multiplication effect can be realized through decimal charge integration, the occupied area of the capacitors can be reduced while the filtering effect is ensured, and the cost is reduced.

Description

Switched capacitor filter, phase-locked loop circuit and electronic device

Technical Field

The present utility model relates to the field of electronic circuits, and in particular, to a switched capacitor filter, a phase-locked loop circuit, and an electronic device.

Background

PLL (phase locked loop) circuits provide clocks for many communication chips, while loop filters (LPF) are the core circuits of the PLL. In the related art, in order to ensure the noise filtering effect in the PLL circuit, a larger capacitor is generally required to be selected, which occupies a larger area and increases the cost. The small capacitor is selected to make the phase-locked loop filter unclean, thereby causing ripple jitter and deteriorating the noise performance of the phase-locked loop.

Disclosure of Invention

The embodiment of the utility model mainly aims to provide a switched capacitor filter, a phase-locked loop circuit and electronic equipment. The filter circuit design aims at reducing the occupied area and reducing the cost while ensuring the filtering effect through the circuit design of the switch capacitor filter.

To achieve the above object, a first aspect of an embodiment of the present utility model provides a switched capacitor filter connected between a current input interface of an electronic device and a post-stage circuit of the electronic device, the switched capacitor filter including: the switching capacitor circuit is connected with the switching control module;

the switched capacitor circuit comprises a first branch and a second branch, the first branch is connected between the current input interface and the post-stage circuit, and the first branch comprises: a first capacitor, a second capacitor, at least one third capacitor, a first class switch and a first second class switch;

the first end of the first capacitor, the first end of the second capacitor and the first end of the third capacitor are all connected in parallel on the first branch, and the second end of the first capacitor, the second end of the second capacitor and the second end of the third capacitor are all grounded; the first class switch is connected between the first capacitor and the second capacitor, and the first second class switch is connected between the second capacitor and the third capacitor;

the second branch is connected in parallel with two ends of the first branch, and comprises a second class switch and an operational amplifier circuit, and the second class switch is connected in series with the operational amplifier circuit;

the switch control module is used for outputting a first signal and a second signal, wherein the first signal is used for being input to a first type switch so as to control the opening and closing of the first type switch, and the second signal is used for being input to a second type switch so as to control the opening and closing of the second type switch.

In one embodiment of the utility model, the operational amplifier circuit includes an operational amplifier, a fourth capacitor, a second first class switch, a third first class switch, and a third second class switch;

the first end of the fourth capacitor is connected with the reverse input end of the operational amplifier, and the second end of the fourth capacitor is connected with the output end of the operational amplifier;

the second first class switch is connected between the inverting input end of the operational amplifier and the output end of the operational amplifier;

the third first class switch is connected between the second end of the fourth capacitor and the positive input end of the operational amplifier;

the third second class switch is connected between the second end of the fourth capacitor and the output end of the operational amplifier.

In one embodiment of the utility model, the switch control module is a non-overlapping clock generator.

In one embodiment of the present utility model, a capacitance value of the first capacitor is equal to or greater than a capacitance value of the second capacitor.

In one embodiment of the utility model, the switched capacitor circuit further comprises a third branch comprising a first resistor connected between the current input interface and the subsequent stage circuit.

A second aspect of an embodiment of the present utility model provides an electronic device, including a switched capacitor filter according to any one of the embodiments of the present utility model.

A third aspect of an embodiment of the present utility model provides a phase-locked loop circuit, including: a phase detector, a voltage controlled oscillator, a frequency divider and a switched capacitor filter according to any of the embodiments of the present utility model;

the phase detector is used for accessing input signals and feedback signals, the second end of the phase detector is connected with the switch capacitance filter, the second end of the switch capacitance filter is connected with the first end of the voltage-controlled oscillator, the second end of the voltage-controlled oscillator is connected with the first end of the frequency divider, and the second end of the frequency divider is connected with the phase detector.

In one embodiment of the utility model, the phase detector is configured to compare the phase of the input signal with the phase of the feedback signal and to generate a control signal in response to the phase comparison;

the switched capacitor filter is configured to output a control voltage for controlling the voltage controlled oscillator;

the voltage controlled oscillator is configured to adjust the output signal frequency according to the control voltage;

the frequency divider is configured to divide the output signal output by the voltage-controlled oscillator to obtain the feedback signal.

In one embodiment of the utility model, the phase detector comprises:

a phase detection circuit configured to compare a phase of the input signal with a phase of the feedback signal and generate an error signal;

a charge pump circuit is configured to generate a current control signal in response to the error signal.

In one embodiment of the utility model, the switched capacitor filter is configured to generate a control voltage for controlling the voltage controlled oscillator in response to the current control signal.

The utility model provides a switched capacitor filter, a phase-locked loop circuit and electronic equipment. The switch capacitor filter comprises a switch capacitor circuit and a switch control module, wherein the switch capacitor circuit is connected with the switch control module. The switch capacitor circuit comprises a first branch and a second branch. According to the embodiment of the utility model, the plurality of capacitors are arranged in parallel on the first branch, the first signal or the second signal output by the switch control module is arranged between the capacitors to control the switch to be opened and closed, and the operational amplifier circuit and the corresponding switch are arranged on the second branch to control the charge and discharge of the capacitors, so that the capacitance multiplication effect can be realized through decimal charge integration, the occupied area of the capacitors can be reduced while the filtering effect is ensured, and the cost is reduced.

Drawings

Fig. 1 is a schematic diagram of a passive low-pass filter structure in the related art;

FIG. 2 is a schematic diagram of the time domain response of a passive low pass filter of the related art;

FIG. 3 is a circuit diagram of a switched capacitor filter according to an embodiment of the present utility model;

FIG. 4 is a schematic diagram of a time domain response of a switched capacitor low pass filter according to an embodiment of the present utility model;

FIG. 5 is a schematic diagram of a non-overlapping clock generator provided by an embodiment of the present utility model;

fig. 6 is a circuit diagram of a phase locked loop circuit according to an embodiment of the present utility model.

Detailed Description

The present utility model will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present utility model more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.

It should be noted that although functional block division is performed in a device diagram and a logic sequence is shown in a flowchart, in some cases, the steps shown or described may be performed in a different order than the block division in the device, or in the flowchart. The terms first, second and the like in the description and in the claims and in the above-described figures, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs. The terminology used herein is for the purpose of describing embodiments of the utility model only and is not intended to be limiting of the utility model.

In a phase-locked loop circuit, a passive low-pass filter is required to filter out high frequency components of the control voltage on the voltage-controlled oscillator in the phase-locked loop circuit. Specifically, the loop of the phase locked loop may become unstable due to the pole at zero caused by the voltage controlled oscillator and the pole at zero caused by the capacitance in the passive low pass filter. Therefore, a zero resistor is added to change the phase margin of the phase-locked loop, so that the system becomes stable. Then, the introduction of the zeroing resistor causes a large fluctuation of the control voltage, so that a second capacitor needs to be added to filter out the voltage fluctuation caused by the resistor. Referring to fig. 1, fig. 1 is a schematic diagram of a passive low-pass filter structure in the related art. As shown in fig. 1, the passive low-pass filter uses two capacitors and one resistor, which occupies a relatively large area. The passive low-pass filter generates a zero by controlling the capacitance Cz and a high-frequency pole by controlling the electrical Cp. The capacitance Cp is about a few picofarads and the capacitance Cz is about a few hundred picofarads. Thus making the area of the phase locked loop relatively large.

In the phase-locked loop working process, a phase difference is generated between a reference clock and a feedback clock, the phase difference is transmitted to the input end of the phase frequency detector after being divided by the frequency divider, a series of pulse (UP/DN) widths are output after the phase difference passes through the phase frequency detector, and the switching of the charge pump is controlled by the phases of the pulses, so that the charge and discharge of a small capacitor are controlled. When the UP and DN pulses are equal, the charge is transferred from C _P To C _Z Will be represented by a time constant τ= (C _Z +C _P )*R _Z To be reassigned. Referring to fig. 2, fig. 2 is a schematic diagram of a time domain response of a passive low pass filter in the related art.

In order to ensure the noise filtering effect in the phase-locked loop circuit, a larger capacitor is generally required to be selected, so that a larger area is occupied, and the cost is increased. The small capacitor is selected to make the phase-locked loop filter unclean, thereby causing ripple jitter and deteriorating the noise performance of the phase-locked loop.

Based on the above, the embodiment of the utility model provides a switched capacitor filter, which can ensure the filtering effect, reduce the occupied area and reduce the cost through circuit design.

Referring to fig. 3, fig. 3 is a circuit diagram of a switched capacitor filter according to an embodiment of the present utility model. As shown in fig. 3, the switched capacitor filter may be connected between a current input interface of the electronic device and a post-stage circuit of the electronic device. The switched capacitor filter includes: the switching capacitor circuit 100 and the switching control module 200, and the switching capacitor circuit 100 is connected to the switching control module 200. Wherein:

the switched-capacitor circuit 100 includes a first branch H1 and a second branch H2, the first branch H1 being connected between the current input interface and the subsequent stage circuit. The first branch H1 includes: a first capacitor C1, a second capacitor C2, at least one third capacitor C3, a first class switch S1 and a first second class switch S2.

The first end of the first capacitor C1, the first end of the second capacitor C2 and the first end of the third capacitor C3 are all connected in parallel to the first branch H1, and the second end of the first capacitor C1, the second end of the second capacitor C2 and the second end of the third capacitor C3 are all grounded; the first-type switch S1 is connected between the first capacitor C1 and the second capacitor C2, and the first second-type switch S2 is connected between the second capacitor C2 and the third capacitor C3.

The second branch H2 is connected in parallel to two ends of the first branch H1, and the second branch H2 includes a second class switch S2 and an operational amplifier circuit 110, and the second class switch S2 and the operational amplifier circuit 210 are connected in series.

The switch control module 200 is configured to output a first signal Φ1 and a second signal Φ2, the first signal Φ1 is configured to be input to the first switch S1 to control the opening and closing of the first switch S1, and the second signal Φ2 is configured to be input to the second switch S2 to control the opening and closing of the second switch S2.

In the embodiment of the utility model, the plurality of capacitors connected in parallel are arranged on the first branch, the first signal or the second signal output by the switch control module is arranged between the capacitors to control the switch to be opened and closed, and the operational amplifier circuit and the corresponding switch are arranged on the second branch to control the charge and discharge of the capacitors, so that the capacitance multiplication effect can be realized through decimal charge integration, the occupied area of the capacitors is reduced while the filtering effect is ensured, and the cost is reduced.

The switched capacitor filter provided by the embodiment of the utility model has similar time domain response as the passive low-pass filter shown in fig. 1, but occupies a smaller area. When the switched capacitor filter is applied to a phase locked loop circuit, the switched capacitor filter generates UP/DN sampling current pulses primarily from the current generated by the charge pump, and then redistributes and integrates a portion of the charge into a capacitor having a smaller capacitance value to generate a control voltage at the same control level.

In one embodiment of the present utility model, the operational amplifier circuit 110 includes an operational amplifier Gm, a fourth capacitor C4, a second first-class switch S1, a third first-class switch S1, and a third second-class switch S2. The first end of the fourth capacitor C4 is connected to the inverting input end of the operational amplifier Gm, and the second end of the fourth capacitor C4 is connected to the output end of the operational amplifier Gm. The second first class switch S1 is connected between the inverting input of the operational amplifier Gm and the output of the operational amplifier Gm. The third first class switch S1 is connected between the second terminal of the fourth capacitor C4 and the positive input terminal of the operational amplifier Gm. The third second class switch S2 is connected between the second terminal of the fourth capacitor C2 and the output terminal of the operational amplifier Gm.

In the embodiment of the present utility model, since the switch control module 200 is configured to output the first signal Φ1 and the second signal Φ2, the first signal Φ1 is configured to be input to the first-type switch S1 to control the opening and closing of the first-type switch S1, and the second signal Φ2 is configured to be input to the second-type switch S2 to control the opening and closing of the second-type switch S2. Both the first type switch S1 and the second type switch are MOS switches, and therefore, when the switch control module 200 controls the output first signal Φ1 to be high and the output second signal Φ2 to be low, the first type switch S1 is turned on and the second type switch S2 is turned off. At this time, current flows through the first capacitor C1 and the second capacitor C2, i.e. the first capacitor C1 and the second capacitor C2 are charged, and the charges exist on the first capacitor C1 and the second capacitor C2 according to the capacitance ratio of the first capacitor C1 and the second capacitor C2. At this time, since the second-type switch S2 is turned off, that is, the second-type switch S2 on the second branch H2 is turned off, the offset charge of the operational amplifier Gm is stored in the third capacitor C3 and the fourth capacitor C4. And the first capacitor C1 and the second capacitor C correspond to the output terminal connected to the operational amplifier Gm, so that any charge loss due to leakage can be prevented. Next, when the switch control module 200 controls the output first signal Φ1 to be low and the output second signal Φ2 to be high, the first-type switch S1 is turned off and the second-type switch S2 is turned on. At this time, the charge stored on the second capacitor C2 will be redistributed and integrated into the predetermined third capacitor C3. When the charge is transferred from the second capacitor C2 to the third capacitor C3, the voltage on the first capacitor C1 can be changed by the operational amplifier Gm, so that the voltage on the third capacitor C3 is matched with the time constant τ≡C1/Gm. Time domain response of this process referring to fig. 4, fig. 4 is a schematic diagram of time domain response of a switched capacitor low pass filter according to an embodiment of the present utility model.

Illustratively, the capacitance value C1 of the first capacitance C1 is selected such that C1 is equal to C _p The capacitance value of the second capacitor C2 isThe third capacitor C3 has a capacitance of C1, and the output of the switched capacitor filter will be matched with the output of the conventional LPF, at which time the capacitor C _z Equal to C1 (N+1), the resistance is equal to 1/Gm of the operational amplifier. That is, by setting the capacitance value of each small capacitor in the switched capacitor filter. The switched capacitor filter provided by the embodiment of the utility model has similar time domain response and the same filtering effect as the passive low-pass filter shown in fig. 1, but occupies a smaller area. Therefore, the occupied area of the switched capacitor low-pass filter can be reduced, and the cost is reduced.

It should be noted that, the switch control module 200 controls the output of the first signal Φ1 and the second signal Φ2 not to be high or low at the same time, but only the first signal Φ1 is high and the second signal Φ2 is low; or the first signal Φ1 is low and the second signal Φ2 is high.

In one embodiment of the utility model, the switch control module is a non-overlapping clock generator.

Referring to fig. 5, fig. 5 is a schematic diagram of a non-overlapping clock generator according to an embodiment of the present utility model. As shown in fig. 5, the first signal Φ1 and the second signal Φ2 are generated by a non-overlapping or gate/nor signal function UP/DN. Specifically, when there is one signal high in the UP or DN pulse, the first signal Φ1 is high and the second signal Φ2 is low. When the UP and DN pulse signals become the same, the first signal Φ1 becomes low and the second signal Φ2 becomes high.

According to the embodiment of the utility model, the switch is controlled by the non-overlapping signal, so that the switch in the switched capacitor filter is not turned on or off simultaneously, and the voltage value on each capacitor can be effectively regulated by combining the characteristic of the switch with the operational amplifier Gm, so that charges are redistributed with a predetermined time constant.

In one embodiment of the present utility model, the capacitance value of the first capacitor is greater than or equal to the capacitance value of the second capacitor.

In the embodiment of the utility model, in order to ensure that the occupied area of the capacitor saved by the switch capacitor filter is obvious, the cost can be effectively reduced, and the capacitance value of the first capacitor C1 is required to be larger than or equal to the capacitance value of the second capacitor C2.

Illustratively, the capacitance value of the first capacitor C1 is set to C, and the capacitance value of the second capacitor C2 is correspondingly set toWherein N is a positive integer. When N is a positive integer greater than 5, it is saved correspondingly

The occupied area is obvious, and the obvious effect of reducing the cost can be achieved. For example, the capacitance value of the third capacitor C3 may be set to MC, where M is also a positive integer. In some specific situations, for example, the capacitance values of the third capacitor C3 are all smaller than the capacitance of C, and at this time, a plurality of small capacitors may be selected to replace the third capacitor C3 in parallel.

In one embodiment of the utility model, the switched capacitor circuit further comprises a third branch comprising a first resistor connected between the current input interface and the subsequent stage circuit

In an embodiment of the present utility model, referring to fig. 3, the switched capacitor 100 further includes a third branch H3. The third branch H3 includes a first capacitor R1, and the first resistor R1 is connected between the current input interface and the post-stage circuit.

The resistance value of the first resistor R1 is a large resistor, which may be several kiloohms. When the switched capacitor filter is applied to the phase locked loop circuit, the control voltage Vcnt1 input to the switched capacitor filter exceeds the control voltage vip 1 output from the switched capacitor filter by several tens of millivolts, the charge pump current portion starts to charge the third capacitor C3, and at this time, by providing the third branch H3, the control voltage vip 1 contributing to output and the control power supply Vcnt1 input are closer to each other, accelerating the capturing process. I.e. the acquisition speed of the phase locked loop circuit can be increased.

The embodiment of the utility model also provides electronic equipment, which comprises the switched capacitor filter provided by any embodiment of the utility model.

Because the electronic device provided by the embodiment of the utility model comprises the switched capacitor filter provided by any embodiment of the utility model, the electronic device provided by the embodiment of the utility model has the advantages of the switched capacitor filter. The filter effect can be ensured, the occupied area is reduced, and the cost can be reduced.

Referring to fig. 6, fig. 6 is a circuit diagram of a phase locked loop circuit according to an embodiment of the present utility model. The embodiment of the utility model also provides a phase-locked loop circuit, which comprises: a phase detector PFD, a voltage controlled oscillator VCO, a frequency divider DIV and a switched capacitor filter LPF provided by any embodiment of the utility model. The phase detector PFD is used for accessing an input signal Fref and a feedback signal Fb, a second end of the phase detector PFD is connected with the switched capacitor filter LPF, a second end of the switched capacitor filter LPF is connected with a first end of the voltage-controlled oscillator VCO, a second end of the voltage-controlled oscillator VCO is connected with a first end of the frequency divider DIV, and a second end of the frequency divider DIV is connected with the phase detector PFD.

In the embodiment of the utility model, the phase-locked loop circuit comprises the switched capacitor filter provided by any embodiment of the utility model, so that the phase-locked loop circuit provided by the embodiment of the utility model can ensure the same phase-locked effect, reduce the occupied area and reduce the cost.

In one embodiment of the utility model, the phase detector PFD is configured to compare the phase of the input signal Fref with the phase of the feedback signal Fb and to generate the control signal in response to the phase comparison;

the switched capacitor filter LPF is configured to output a control voltage for controlling the voltage controlled oscillator VCO;

the voltage controlled oscillator VCO is configured to adjust the output signal frequency in accordance with the control voltage;

the frequency divider DIV is configured to divide the output signal output from the voltage controlled oscillator VCO to obtain the feedback signal Fb.

In the embodiment of the utility model, the external input signal Fref and the feedback signal Fb generate pulse widths UP and DN through the phase frequency detector PFD, the phase difference of the two pulse widths UP and DN is in direct proportion, the pulse signals UP and DN control the switch of the charge pump CP so as to control the charge and discharge of the capacitor of the switch capacitor filter LPF, further control the input voltage of the voltage-controlled oscillator VCO, change the output frequency of the voltage-controlled oscillator VCO, compare with the input signal after passing through the frequency divider DIV, and repeatedly go through a loop for a plurality of times until the input signal Fref and the feedback signal Fb are in the same frequency and phase, and the phase-locked loop is locked. The embodiment of the utility model utilizes the switch capacitor filter to replace the passive low-pass filter, realizes the capacitance multiplication effect through decimal charge integration, can generate the same circuit time domain response as the passive low-pass filter, and achieves the same circuit filtering effect. And the switched capacitor filter is applied to the phase-locked loop circuit, because the first capacitor C1, the second capacitor C2 and the third capacitor C3 are driven by the charge pump and the operational amplifier Gm, the switched capacitor filter is less affected by leakage of the grid electrode of the device, and because the capacitance values of the first capacitor C1, the second capacitor C2 and the third capacitor C3 are smaller, pure metal capacitors can be adopted.

It should be noted that in order to avoid noise and make the switching charge injection effect negligible, the switching capacitance in the switched capacitor filter LPF in the phase locked loop circuit is relatively small and fast compared to the phase locked loop reference clock.

When the phase locked loop is further from the locked state, the difference between Vcnt1 and vip 1 at Φ1=1 will be larger. In order to reduce the ripple on the control voltage and to increase the capturing speed of the phase locked loop circuit PLL, a relatively large first resistor R1 of several kiloohms is connected between vip 1 and Vcnt 1. When Vcnt1 exceeds Virp1 by tens of millivolts, the charge pump current portion begins to charge the third capacitor C3 directly, helping Virp1 and Vcnt1 to get closer to each other, accelerating the acquisition process. The first resistor R1 has no influence on the operation of the phase-locked loop in the operating state of the phase-locked loop in which the phase-locked loop is close to locked and already locked, and it can be considered that the first resistor R1 is equivalent to being disconnected when the frequency lock is reached.

In one embodiment of the utility model, the phase detector PFD comprises:

a phase detection circuit configured to compare a phase of the input signal Fref with a phase of the feedback signal Fb and generate an error signal;

the charge pump circuit CP is configured to generate a current control signal in response to an error signal.

At this time, the switched capacitor filter LPF is configured to generate a control voltage for controlling the voltage controlled oscillator VCO in response to the current control signal.

In an embodiment of the utility model, the phase detector PFD comprises a phase detection circuit and a charge pump circuit CP. The phase detection circuit measures the phase difference between the input signal Fref and the feedback signal Fb and generates an error signal proportional to the measured phase difference. The charge pump circuit CP generates an output current proportional to the error signal. The charge pump output current is input to the switched capacitor filter LPF and the switched capacitor filter LPF outputs a corresponding control voltage that is applied to a control input of the voltage controlled oscillator VC. The frequency of the output signal generated by the voltage controlled oscillator VCO depends on the control voltage output from the switched capacitor filter LPF. The frequency divider DIV receives the output signal and generates the feedback signal Fb.

The embodiments described in the embodiments of the present utility model are for more clearly describing the technical solutions of the embodiments of the present utility model, and do not constitute a limitation on the technical solutions provided by the embodiments of the present utility model, and those skilled in the art can know that, with the evolution of technology and the appearance of new application scenarios, the technical solutions provided by the embodiments of the present utility model are equally applicable to similar technical problems.

It will be appreciated by persons skilled in the art that the embodiments of the utility model are not limited by the illustrations, and that more or fewer steps than those shown may be included, or certain steps may be combined, or different steps may be included.

The above described apparatus embodiments are merely illustrative, wherein the units illustrated as separate components may or may not be physically separate, i.e. may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

Those of ordinary skill in the art will appreciate that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof.

The terms "first," "second," "third," "fourth," and the like in the description of the utility model and in the above figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the utility model described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

It should be understood that in the present utility model, "at least one (item)" means one or more, and "a plurality" means two or more. "and/or" for describing the association relationship of the association object, the representation may have three relationships, for example, "a and/or B" may represent: only a, only B and both a and B are present, wherein a, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b or c may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural.

In the several embodiments provided by the present utility model, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the above-described division of units is merely a logical function division, and there may be another division manner in actual implementation, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.

The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in the embodiments of the present utility model may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present utility model may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, including multiple instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method of the various embodiments of the present utility model. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing a program.

The preferred embodiments of the present utility model have been described above with reference to the accompanying drawings, and are not thereby limiting the scope of the claims of the embodiments of the present utility model. Any modifications, equivalent substitutions and improvements made by those skilled in the art without departing from the scope and spirit of the embodiments of the present utility model shall fall within the scope of the claims of the embodiments of the present utility model.

Claims (10)

1. A switched capacitor filter connected between a current input interface of an electronic device and a back-end circuit of the electronic device, the switched capacitor filter comprising: the switching capacitor circuit is connected with the switching control module;

the switched capacitor circuit comprises a first branch and a second branch, the first branch is connected between the current input interface and the post-stage circuit, and the first branch comprises: a first capacitor, a second capacitor, at least one third capacitor, a first class switch and a first second class switch;

the first end of the first capacitor, the first end of the second capacitor and the first end of the third capacitor are all connected in parallel on the first branch, and the second end of the first capacitor, the second end of the second capacitor and the second end of the third capacitor are all grounded; the first class switch is connected between the first capacitor and the second capacitor, and the first second class switch is connected between the second capacitor and the third capacitor;

the second branch is connected in parallel with two ends of the first branch, and comprises a second class switch and an operational amplifier circuit, and the second class switch is connected in series with the operational amplifier circuit;

the switch control module is used for outputting a first signal and a second signal, wherein the first signal is used for being input to a first type switch so as to control the opening and closing of the first type switch, and the second signal is used for being input to a second type switch so as to control the opening and closing of the second type switch.

2. The switched-capacitor filter of claim 1, wherein the operational amplifier circuit comprises an operational amplifier, a fourth capacitor, a second first class switch, a third first class switch, and a third second class switch;

the first end of the fourth capacitor is connected with the reverse input end of the operational amplifier, and the second end of the fourth capacitor is connected with the output end of the operational amplifier;

the second first class switch is connected between the inverting input end of the operational amplifier and the output end of the operational amplifier;

the third first class switch is connected between the second end of the fourth capacitor and the positive input end of the operational amplifier;

the third second class switch is connected between the second end of the fourth capacitor and the output end of the operational amplifier.

3. The switched capacitor filter of claim 1, wherein the switch control module is a non-overlapping clock generator.

4. The switched capacitor filter of claim 1, wherein the capacitance value of the first capacitor is equal to or greater than the capacitance value of the second capacitor.

5. The switched-capacitor filter of claim 1, wherein the switched-capacitor circuit further comprises a third branch comprising a first resistor connected between the current input interface and the post-stage circuit.

6. An electronic device comprising the switched capacitor filter of any one of claims 1-5.

7. A phase locked loop circuit comprising: a phase detector, a voltage controlled oscillator, a frequency divider and a switched capacitor filter according to any one of claims 1 to 5;

the phase detector is used for accessing input signals and feedback signals, the second end of the phase detector is connected with the switch capacitance filter, the second end of the switch capacitance filter is connected with the first end of the voltage-controlled oscillator, the second end of the voltage-controlled oscillator is connected with the first end of the frequency divider, and the second end of the frequency divider is connected with the phase detector.

8. The phase-locked loop circuit of claim 7, wherein:

the phase detector is configured to compare the phase of the input signal with the phase of the feedback signal and to generate a control signal in response to the phase comparison;

the switched capacitor filter is configured to output a control voltage for controlling the voltage controlled oscillator;

the voltage controlled oscillator is configured to adjust an output signal frequency according to the control voltage;

the frequency divider is configured to divide the output signal output by the voltage-controlled oscillator to obtain the feedback signal.

9. The phase locked loop circuit of claim 7, wherein the phase detector comprises:

a phase detection circuit configured to compare a phase of the input signal with a phase of the feedback signal and generate an error signal;

a charge pump circuit is configured to generate a current control signal in response to the error signal.

10. The phase-locked loop circuit of claim 9, wherein the switched capacitor filter is configured to generate a control voltage for controlling the voltage-controlled oscillator in response to the current control signal.