CN219978507U - Analog cell circuit and calibration device - Google Patents

Analog cell circuit and calibration device Download PDF

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Publication number
CN219978507U
CN219978507U CN202320487024.9U CN202320487024U CN219978507U CN 219978507 U CN219978507 U CN 219978507U CN 202320487024 U CN202320487024 U CN 202320487024U CN 219978507 U CN219978507 U CN 219978507U
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voltage
battery
cell
analog
sampling
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赵密
陈振龙
陈熙
王雷
李玮恒
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Ecoflow Technology Ltd
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Ecoflow Technology Ltd
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Abstract

The present utility model relates to battery technology. The utility model aims to provide an analog cell circuit and a calibration device, which aim to solve the problems that the accuracy of calibration is affected by adopting a cell for calibration in the voltage sampling calibration of the traditional BMS, and the efficiency is low and the error rate is higher due to manual calibration, and the technical scheme is as follows: an analog cell circuit for simulating a cell voltage when a battery management system performs voltage sampling calibration, comprising: the first end of the voltage dividing module is connected with the positive electrode terminal, the second end of the voltage dividing module is connected with the negative electrode terminal and used for dividing the voltage input by the power supply and outputting the voltage through each voltage output end, and the connecting module is connected with the voltage output end of the voltage dividing module and used for being connected with the battery management system. The utility model has the beneficial effects that the actual battery cell is not used in BMS battery cell voltage sampling calibration, and the BMS battery cell voltage sampling calibration method is suitable for BMS battery cell voltage sampling calibration.

Description

Analog cell circuit and calibration device
Technical Field
The utility model belongs to the technical field of batteries, and particularly relates to an analog cell circuit and a calibration device.
Background
Currently, the battery management system (battery management system, BMS) needs to perform voltage sampling calibration before leaving the factory, otherwise, sampling deviation may occur to cause damage to the battery cells.
The voltage sampling calibration of traditional BMS is generally to be to wait to calibrate BMS and multisection electric core that calibration used through the winding displacement after, and the voltage sampling calibration of BMS is carried out to the rethread manual work. The manual calibration process needs to use a high-precision multimeter to measure the voltage of each battery cell, and then manually calibrate the battery cell voltage value obtained by sampling the BMS to be calibrated, so that the efficiency is low, the error rate is high, in addition, as the battery cell is used for calibration, the voltage of the battery cell can change along with the time of the calibration, and the calibration accuracy can be affected.
Therefore, the conventional voltage sampling calibration of the BMS has the problems that the accuracy of the calibration is affected by the calibration performed by using the battery cell, and the calibration is performed manually, so that the efficiency is low and the error rate is high.
Disclosure of Invention
The utility model aims to provide an analog battery cell circuit and a calibration device, which aim to solve the problems that the accuracy of calibration is affected by adopting a battery cell for calibration in the traditional voltage sampling calibration of a BMS, and the efficiency is low and the error rate is higher due to manual calibration.
A first aspect of an embodiment of the present utility model provides an analog cell circuit, configured to be connected to a battery management system, to simulate a cell voltage when the battery management system performs voltage sampling calibration, including:
the positive terminal and the negative terminal are used for connecting a power supply;
the voltage division module comprises a first end, a second end and a plurality of voltage output ends; the first end of the voltage dividing module is connected with the positive electrode terminal, the second end of the voltage dividing module is connected with the negative electrode terminal, and the voltage dividing module is used for dividing the voltage input by the power supply and outputting the divided voltage through each voltage output end;
the connection module is connected with the voltage output end of the voltage division module and used for being connected with the battery management system.
In one embodiment, the voltage dividing module includes:
n voltage dividing units connected in series, wherein n is a positive integer greater than or equal to 1.
In one embodiment, the voltage dividing module further comprises:
the energy storage voltage stabilizing units are in one-to-one correspondence with the n voltage dividing units, and are connected in parallel with the corresponding voltage dividing units.
In one embodiment, the voltage dividing unit includes a voltage dividing resistor; the energy storage voltage stabilizing unit comprises a capacitor.
In one embodiment, the connection module includes:
the voltage output ends of the voltage division modules are connected with at least one connecting socket, wherein the number of the voltage output ends of the voltage division modules connected with the connecting sockets is different.
A second aspect of an embodiment of the present utility model provides a calibration device applied to cell voltage sampling calibration of a battery management system, including:
the connection module of the analog cell circuit is used for being connected with the sampling port of the battery management system;
the battery cell voltage acquisition circuit is connected with the connection module of the analog battery cell circuit through a sampling port, samples and acquires each analog battery cell voltage through the sampling port and sends the voltage to the upper computer;
the upper computer is respectively connected with the battery cell voltage acquisition circuit and the battery management system, and is used for calibrating the voltage sampling value of the battery management system according to each analog battery cell voltage acquired by the battery cell voltage acquisition circuit.
In one embodiment, the cell voltage acquisition circuit includes:
the battery management chip comprises k battery voltage sampling input ends, wherein the k battery voltage sampling input ends are connected with sampling ports of the battery cell voltage acquisition circuit in one-to-one correspondence, and k is a positive integer greater than 1.
In one embodiment, the cell voltage acquisition circuit further comprises:
the k voltage stabilizing capacitors are sequentially arranged at k battery voltage sampling input ends of the battery management chip, one voltage stabilizing capacitor is connected between any two adjacent battery voltage sampling input ends, a first end of the k voltage stabilizing capacitor is connected with a common connecting end of the battery management chip, and a second end of the k voltage stabilizing capacitor is connected with the battery voltage sampling input end which is sequentially arranged at the first end;
the k current limiting resistors are in one-to-one correspondence with the k battery voltage sampling input ends, any one battery voltage sampling input end of the battery management chip is connected with the first end of the current limiting resistor corresponding to the battery voltage sampling input end, and the second end of the current limiting resistor is connected with the sampling port.
In one embodiment, the calibration device further comprises:
the power supply module is respectively connected with the battery cell voltage acquisition circuit, the analog battery cell circuit and the battery management system and is used for supplying power to the battery cell voltage acquisition circuit, the analog battery cell circuit and the battery management system.
In one embodiment, the calibration device further comprises:
the display module is connected with the battery cell voltage acquisition circuit and used for displaying the voltage values of each analog battery cell acquired by the battery cell voltage acquisition circuit through sampling of the sampling port.
Compared with the prior art, the embodiment of the utility model has the beneficial effects that: the analog cell circuit can divide the input standard power supply voltage through the voltage dividing module, so that stable output voltage is obtained, the analog cell voltage is convenient to use, the actual cell is not used during BMS cell voltage sampling calibration, errors are reduced, accuracy during calibration is improved, and through the calibrating device, the analog cell voltage can be automatically collected as a standard value after corresponding control software is added, the analog cell voltage is compared with the cell voltage value collected by the BMS board to be calibrated, and therefore the cell voltage sampling of the BMS to be calibrated is automatically calibrated, manual operation is reduced, use is facilitated, efficiency is improved, and error probability is reduced.
Drawings
FIG. 1 is a schematic diagram of an analog cell circuit according to an embodiment of the present utility model;
FIG. 2 is another schematic circuit diagram of the analog cell circuit shown in FIG. 1;
FIG. 3 is an exemplary circuit schematic of the analog cell circuit shown in FIG. 1;
FIG. 4 is another schematic circuit diagram of the analog cell circuit shown in FIG. 1;
FIG. 5 is another schematic circuit diagram of the analog cell circuit shown in FIG. 1;
FIG. 6 is a schematic diagram of a calibration device according to another embodiment of the present utility model;
FIG. 7 is an exemplary circuit schematic of a cell voltage acquisition circuit in the calibration device shown in FIG. 6;
fig. 8 is another schematic view of the calibration device shown in fig. 6.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the utility model is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.
It will be understood that when an element is referred to as being "mounted" or "disposed" on another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Fig. 1 shows a schematic circuit diagram of an analog cell circuit provided in the first aspect of the embodiment of the present utility model, and for convenience of explanation, only a portion related to the embodiment is shown, which is described in detail as follows:
the analog cell circuit 101 in the present embodiment is configured to be connected to the battery management system 20, and is configured to simulate a cell voltage when the battery management system 20 performs voltage sampling calibration, where the analog cell circuit 101 includes a positive terminal 1013, a negative terminal 1014, a voltage division module 1011, and a connection module 1012.
The positive electrode terminal 1013 and the negative electrode terminal 1014 are connected to the power supply 30.
The voltage division module 1011 includes a first end, a second end and a plurality of voltage output ends; the first end of the voltage division module 1011 is connected to the positive terminal 1013, the second end of the voltage division module 1011 is connected to the negative terminal 1014, and the voltage division module 1011 is configured to divide the voltage input by the power supply 30 and output the divided voltage through each voltage output terminal.
The connection module 1012 is connected to the voltage output terminal of the voltage division module 1011 for connecting to the battery management system 20.
It can be understood that the voltage input by the positive terminal 1013 and the negative terminal 1014 is divided by the voltage division module 1011 and then output to the connection module 1012, and then the connection module 1012 is connected with the battery management system 20 to provide the battery management system 20 with the simulated cell voltage to replace the existing cell connected with the battery management system 20.
Referring to fig. 2, the voltage division module 1011 may include n voltage division units 10111, where n is a positive integer greater than or equal to 1, and the n voltage division units 10111 are connected in series.
That is, the voltage division module 1011 may be composed of n voltage division units 10111 connected in series, wherein the first end of the first voltage division unit 10111 is used as the first end of the voltage division module 1011, and the second end of the last voltage division unit 10111 is used as the second end of the voltage division module 1011.
Referring to fig. 2, in order to make each voltage obtained by the voltage division unit 10111 more stable, the voltage division module 1011 further includes n energy storage voltage stabilizing units 10112, where the n energy storage voltage stabilizing units 10112 are in one-to-one correspondence with the n voltage division units 10111, and the energy storage voltage stabilizing units 10112 are connected in parallel with the corresponding voltage division units 10111. Namely, two ends of each voltage dividing unit 10111 are connected with an energy storage voltage stabilizing unit 10112 in parallel.
Fig. 3 shows an exemplary schematic circuit diagram of the analog cell circuit shown in fig. 1, where n=15 is taken as an example to describe the voltage dividing units 10111 and the energy storage and voltage stabilizing units 10112, and each voltage dividing unit 10111 includes a voltage dividing resistor (i.e. R101 to R115 in fig. 3); each energy storage and voltage stabilizing unit 10112 comprises a capacitor (i.e., C101-C115 in fig. 3).
Referring to fig. 4, since the function of the analog cell circuit 101 is mainly to simulate the cell voltage when the battery management system 20 performs voltage sampling calibration, so that after the BMS to be calibrated is connected with the analog cell circuit, the battery management system 20 at least includes the BMS to be calibrated, and in order to adapt to various BMS to be calibrated having different numbers of cell voltage sampling ports, the connection module 1012 may include at least two connection sockets 10121, the voltage output end of the voltage division module 1011 is connected with at least one connection socket 10121, and the number of the voltage output ends of the voltage division modules 1011 connected with the connection sockets 10121 is different.
Referring to fig. 5, it can be seen from the above analysis that the above analog cell circuit 101 needs to be connected to the BMS to be calibrated through the connection module 1012 when in use, and the output voltage standard values of the voltage output terminals of the analog cell circuit 101 need to be detected in real time. For simplicity, the battery management system 20 may further include a standard detection device or apparatus, such as a calibrated battery management system, for detecting the standard value of the output voltage of each voltage output terminal of the analog cell circuit 101 in real time. It is further required that the connection module 1012 is connected to the calibrated battery management system, and the connection module 1012 may include at least two connection sockets 10121, wherein the voltage output terminal of the voltage division module 1011 is connected to at least one connection socket 10121, and one of the connection sockets 10121 is preferably connected to all the voltage output terminals of the voltage division module 1011, and the connection socket is used for connecting to the calibrated battery management system or other devices, so as to detect the output voltage standard value of each voltage output terminal of the analog cell circuit 101 in real time. In order to avoid wasting resources, it is preferable that at least one connection socket 10121 is connected to all voltage output terminals of the voltage dividing module 1011, and the connection socket is used for connecting to the BMS to be calibrated, and providing the cell voltage to the BMS to be calibrated. It can be seen that in this case the number of voltage outputs to which the two connection sockets 10121 are connected may be the same.
For example, in order to detect the standard value of the output voltage of each voltage output terminal of the analog cell circuit 101 in real time, the connection module 1012 of the analog cell circuit 101 needs a connection socket 10121 for connecting to a standard detecting device or apparatus, and also needs to connect to the BMS to be calibrated, so that a connection socket 10121 is also needed, in which case at least two connection sockets 10121 are needed.
Also, because the BMS to be calibrated has multiple types, each type of BMS to be calibrated may have a different number of battery voltage sampling ports, for example, a certain type of BMS to be calibrated 20 has only 4 battery voltage sampling ports, and another type of BMS to be calibrated 20 has 16 battery voltage sampling ports. Thus, the number of connection sockets 10121 can be increased. As shown in fig. 3, voltage divider module 1011 has a total of 16 voltage outputs, and connection module 1012 has a total of 4 connection sockets 10121, each connection socket 10121 being connected to 4, 7, 16 and 16 voltage outputs, respectively. In this way, the connection socket 10121 for connecting with the standard detection device can select the connection sockets 10121 connected with 16 voltage output ends, and the BMS20 to be calibrated selects the corresponding connection sockets 10121 according to the number of battery voltage sampling ports, thereby widening the application range of the same analog cell circuit 101.
Fig. 6 shows a schematic diagram of a calibration device provided by the second aspect of the embodiment of the present utility model, and for convenience of explanation, only the portions related to the present embodiment are shown in detail as follows:
the calibration device 10 of the present embodiment is applied to the cell voltage sampling calibration of the battery management system 20, namely the BMS201 to be calibrated, where the calibration device 10 includes the above-mentioned analog cell circuit 101, the cell voltage acquisition circuit 102 and the host computer 103.
The connection module 1012 of the analog cell circuit 101 is used for connecting with a sampling port of the BMS20 to be calibrated.
The sampling port 1021 of the cell voltage acquisition circuit 102 is connected with the connection module 1012 of the analog cell circuit 101, and the cell voltage acquisition circuit 102 samples and acquires each analog cell voltage through the sampling port 1021 and sends the analog cell voltage to the upper computer 103.
The upper computer 103 is respectively connected with the battery cell voltage acquisition circuit 102 and the BMS201 to be calibrated, and the upper computer 103 is used for calibrating the voltage sampling value of the BMS201 to be calibrated according to each analog battery cell voltage acquired by the battery cell voltage acquisition circuit 102.
It can be understood that the upper computer 103 herein may be a device with processing capability such as a computer or a single-chip microcomputer, or may be a communication port for communicating with a device with processing capability such as a computer or a single-chip microcomputer, which is aimed at receiving each analog cell voltage sent by the cell voltage acquisition circuit 102, receiving a voltage sampling value sent by the BMS201 to be calibrated, comparing the voltage sampling values, and performing corresponding calibration on the voltage sampling value of the BMS201 to be calibrated according to a comparison result. Therefore, the host computer 103 may be a device with processing capability that is actually present, or may be a communication module for establishing communication with only the device with processing capability.
Referring to fig. 7, in order to provide an achievable cell voltage acquisition circuit 102, the cell voltage acquisition circuit 102 may include a battery management chip 1022 and a sampling port 1021, i.e., corresponding to the standard detection device or apparatus described above.
The battery management chip 1022 includes k battery voltage sampling input ends, where k battery voltage sampling input ends are connected with sampling ports 1021 of the battery cell voltage acquisition circuit 102 in a one-to-one correspondence manner, and k is a positive integer greater than 1.
It is understood that the cell voltage acquisition circuit 102 may be a calibrated BMS. And k is preferably greater than or equal to n+1, because the cell voltage acquisition circuit 102 needs to be able to acquire each analog cell voltage in the analog cell circuit 101, and uses each acquired analog cell voltage as a standard voltage of each analog cell, so as to avoid a situation that a certain analog cell voltage cannot be acquired.
Fig. 7 shows an exemplary schematic circuit diagram of the cell voltage acquisition circuit in the calibration device shown in fig. 6, in order to improve the accuracy of the cell voltage acquisition circuit 102 in sampling the input voltage, the cell voltage acquisition circuit 102 further includes:
k voltage stabilizing capacitors (taking k=16 as an example, namely, C201 to C216 in fig. 7) are taken as an example, k battery voltage sampling input ends of the battery management chip 1022 are sequentially arranged, one voltage stabilizing capacitor is connected between any two adjacent battery voltage sampling input ends, a first end of the kth voltage stabilizing capacitor (namely, C216 in fig. 7) is connected with a common connection end of the battery management chip 1022, and a second end of the kth voltage stabilizing capacitor is connected with the battery voltage sampling input end of the first battery voltage sampling input end which is sequentially arranged.
It can be appreciated that the voltage stabilizing capacitor is configured to stabilize the input voltage, so that each analog cell voltage acquired by the cell voltage acquisition circuit 102 is more accurate.
k current limiting resistors (taking k=16 as an example, i.e. R201 to R216 in fig. 7) are in one-to-one correspondence with k battery voltage sampling input terminals, any one battery voltage sampling input terminal of the battery management chip 1022 is connected to a first terminal of the corresponding current limiting resistor, and a second terminal of the current limiting resistor is connected to the sampling port 1021.
It will be appreciated that the current limiting resistor can act as a current limiting function to avoid excessive current flow to the battery management chip 1022.
Referring to fig. 8, as can be seen from the above description, the calibration device 10 requires a power input to power each module, and may further include a power module 104.
The power supply module 104 is respectively connected with the cell voltage acquisition circuit 102, the analog cell circuit 101 and the BMS201 to be calibrated, and is used for supplying power to the cell voltage acquisition circuit 102, the analog cell circuit 101 and the BMS201 to be calibrated.
It will be appreciated that the power module 104 may be a built-in power source such as a battery provided within the calibration device 10, or may be a power connection port for connection to an external power source.
In order to observe the standard voltage value of each analog cell obtained by sampling the analog cell circuit 101 by the cell voltage acquisition circuit 102 in real time, the calibration device 10 may further include a display module.
The display module is connected with the cell voltage acquisition circuit 102 and is used for displaying each analog cell voltage value obtained by sampling the cell voltage acquisition circuit 102 through the sampling port 1021.
Thus, the standard value of the analog cell voltage (that is, each analog cell voltage value obtained by the cell voltage acquisition circuit 102) can be provided for the calibrator in real time, and after the upper computer 103 calibrates the BMS201 to be calibrated, the calibrator can perform secondary calibration or confirm whether the calibration of the upper computer 103 is correct or not.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, the specific names of the functional units and modules are only for distinguishing from each other, and are not used for limiting the protection scope of the present utility model. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
The above embodiments are only for illustrating the technical solution of the present utility model, and not for limiting the same; although the utility model has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present utility model, and are intended to be included in the scope of the present utility model.

Claims (10)

1. An analog cell circuit for connection with a battery management system for simulating a cell voltage at which the battery management system performs voltage sampling calibration, comprising:
the positive terminal and the negative terminal are used for connecting a power supply;
the voltage division module comprises a first end, a second end and a plurality of voltage output ends; the first end of the voltage dividing module is connected with the positive electrode terminal, the second end of the voltage dividing module is connected with the negative electrode terminal, and the voltage dividing module is used for dividing the voltage input by the power supply and outputting the divided voltage through each voltage output end;
the connection module is connected with the voltage output end of the voltage division module and used for being connected with the battery management system.
2. The analog cell circuit of claim 1, wherein the voltage divider module comprises:
n voltage dividing units connected in series, wherein n is a positive integer greater than or equal to 1.
3. The analog cell circuit of claim 2, wherein the voltage divider module further comprises:
the energy storage voltage stabilizing units are in one-to-one correspondence with the n voltage dividing units, and are connected in parallel with the corresponding voltage dividing units.
4. The analog cell circuit of claim 3, wherein the voltage dividing unit comprises a voltage dividing resistor; the energy storage voltage stabilizing unit comprises a capacitor.
5. The analog cell circuit of any of claims 1-4, wherein the connection module comprises:
the voltage output ends of the voltage division modules are connected with at least one connecting socket, wherein the number of the voltage output ends of the voltage division modules connected with the connecting sockets is different.
6. A calibration device for cell voltage sampling calibration of a battery management system, comprising:
the analog cell circuit of any of claims 1-5, a connection module of the analog cell circuit for connecting with a sampling port of the battery management system;
the battery cell voltage acquisition circuit is connected with the connection module of the analog battery cell circuit through a sampling port, samples and acquires each analog battery cell voltage through the sampling port and sends the voltage to the upper computer;
the upper computer is respectively connected with the battery cell voltage acquisition circuit and the battery management system, and is used for calibrating the voltage sampling value of the battery management system according to each analog battery cell voltage acquired by the battery cell voltage acquisition circuit.
7. The calibration device of claim 6, wherein the cell voltage acquisition circuit comprises:
the battery management chip comprises k battery voltage sampling input ends, wherein the k battery voltage sampling input ends are connected with sampling ports of the battery cell voltage acquisition circuit in one-to-one correspondence, and k is a positive integer greater than 1.
8. The calibration device of claim 7, wherein the cell voltage acquisition circuit further comprises:
the k voltage stabilizing capacitors are sequentially arranged at k battery voltage sampling input ends of the battery management chip, one voltage stabilizing capacitor is connected between any two adjacent battery voltage sampling input ends, a first end of the k voltage stabilizing capacitor is connected with a common connecting end of the battery management chip, and a second end of the k voltage stabilizing capacitor is connected with the battery voltage sampling input end which is sequentially arranged at the first end;
the k current limiting resistors are in one-to-one correspondence with the k battery voltage sampling input ends, any one battery voltage sampling input end of the battery management chip is connected with the first end of the current limiting resistor corresponding to the battery voltage sampling input end, and the second end of the current limiting resistor is connected with the sampling port.
9. The calibration device of claim 8, wherein the calibration device further comprises:
the power supply module is respectively connected with the battery cell voltage acquisition circuit, the analog battery cell circuit and the battery management system and is used for supplying power to the battery cell voltage acquisition circuit, the analog battery cell circuit and the battery management system.
10. The calibration device of any one of claims 6-9, further comprising:
the display module is connected with the battery cell voltage acquisition circuit and used for displaying the voltage values of each analog battery cell acquired by the battery cell voltage acquisition circuit through sampling of the sampling port.
CN202320487024.9U 2023-03-06 2023-03-06 Analog cell circuit and calibration device Active CN219978507U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202320487024.9U CN219978507U (en) 2023-03-06 2023-03-06 Analog cell circuit and calibration device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202320487024.9U CN219978507U (en) 2023-03-06 2023-03-06 Analog cell circuit and calibration device

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CN219978507U true CN219978507U (en) 2023-11-07

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