CN219590713U - Average current flow equalizing method control circuit - Google Patents
Average current flow equalizing method control circuit Download PDFInfo
- Publication number
- CN219590713U CN219590713U CN202321386962.6U CN202321386962U CN219590713U CN 219590713 U CN219590713 U CN 219590713U CN 202321386962 U CN202321386962 U CN 202321386962U CN 219590713 U CN219590713 U CN 219590713U
- Authority
- CN
- China
- Prior art keywords
- resistor
- capacitor
- operational amplifier
- module
- output end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Amplifiers (AREA)
Abstract
The utility model provides a control circuit for an average current equalizing method, which relates to the technical field of power supplies, and comprises a power supply module, a differential sampling module, a filtering module, a first following module, a second following module, an equalizing bus module and a control chip; the input end of the differential sampling module is connected with the power supply module, and the output end of the differential sampling module is respectively connected with the input end of the filtering module and the input end of the first following module; the output end of the filtering module is connected with the control chip; the output end of the first following module is respectively connected with the input ends of the control chip and the second following module; the output end of the second following module is connected with the input end of the current sharing bus module; and the output end of the bus module is connected with the control chip. The utility model controls the parallel current sharing error of two or more power supplies within +/-5%, the stability of the output voltage or the load adjustment rate within +/-1%, and controls the output voltage range and the current range within +/-1% when a single power supply works.
Description
Technical Field
The utility model relates to the technical field of power supplies, in particular to an average current equalizing method control circuit.
Background
The power supply of the brick module has small volume, high power density and compact layout of PCB devices, and the power level of a single module is limited under certain conditions; when the power requirement of the product is increased, the power grade of the product can be improved through a mode of parallel operation of the modules, meanwhile, the redundancy function of the product is met, and the stability and reliability of the product are improved; the conventional module parallel current sharing strategy has poor current sharing degree and large load adjustment rate range, so that the product requiring parallel redundancy cannot meet the requirements.
Disclosure of Invention
The utility model aims to provide an average current equalizing method control circuit for solving the problems. In order to achieve the above purpose, the technical scheme adopted by the utility model is as follows:
the utility model provides an average current equalizing method control circuit, which comprises the following steps: the device comprises a power supply module, a differential sampling module, a filtering module, a first following module, a second following module, a current sharing bus module and a control chip. The power module comprises a brick power supply and a sampling resistor, wherein the brick power supply is connected with the sampling resistor, the brick power supply current flows through the sampling resistor to form voltage drop, and the current signal is converted into a voltage signal. The output end of the differential sampling module is connected with the power supply module to differentially amplify the voltage signal. The output end of the differential sampling module is connected with the input end of the filtering module. The output end of the filtering module is connected with the control chip, and the filtering module sends the voltage signal after differential amplification to the AD port of the control chip through filtering to perform a protection function. The differential sampling module output end is also connected with a first following module input end, and the first following module carries out following amplification on the current after differential amplification, so that noise interference is reduced, and a current signal is more stable. The output end of the first following module is also connected with a control chip and used as a local current sampling value and a current loop sampling value. The output end of the first following module is connected with the input end of the second following module, so that the mutual influence of the local current signal and the bus current signal is avoided. The output end of the second following module is connected with the input end of the current sharing bus module, and the sampling current value passing through the second following module is sent to the outside through the current sharing bus module. The output end of the current-sharing bus module is connected with the control chip, when two or more parallel machines are connected, the current-sharing buses in the current-sharing bus module are in short circuit, and the current sampling value on the current-sharing bus is the average value of the two or more currents; the current-sharing bus current samples after parallel operation are sent to an AD port of a control chip, namely bus current; the control chip compares the current sampling value of the local machine with the current sampling value of the bus to obtain a current error value, the error value adjusts the output voltage through the digital PID current sharing ring, the output voltage can change the output current of each module, and finally the purpose of high current sharing is achieved.
Further, the differential sampling module comprises a resistor R67, a resistor R112, a resistor R22, a resistor R18, a capacitor C127, a capacitor C128, a capacitor C129, a capacitor C130 and an operational amplifier U32;
one end of the resistor R67 and one end of the resistor R112 are respectively connected with the sampling resistor, and voltages at two ends of the sampling resistor are collected;
the other end of the resistor R67 is connected with the non-inverting input end of the operational amplifier U32;
the other end of the resistor R112 is connected with the inverting input end of the input operational amplifier U32;
the non-inverting input end of the amplifier U32 is connected with the input ends of a capacitor C130 and a resistor R22, the capacitor C130 and the resistor R22 are connected in parallel, and the output ends of the capacitor C129 and the resistor R22 are grounded;
the connection point between the resistor R112 and the inverting input end of the amplifier U32 is connected with the input end of a capacitor C129, and the output end of the capacitor C129 is grounded;
the positive power end of the operational amplifier U32 is connected with a control chip;
the negative power supply end of the operational amplifier U32 is grounded, and the negative power supply end of the operational amplifier U32 is connected with the control chip through a capacitor C128;
the output end of the operational amplifier U32 is connected with the filtering module and the first following module respectively;
the inverting input end of the amplifier U32 and the output end of the amplifier U32 are connected with an RC parallel circuit, and the RC parallel circuit comprises a capacitor C127 and a resistor R18 which are connected in parallel.
Further, the filtering module comprises a resistor R118 and a capacitor C137, wherein the input end of the resistor R118 is connected with the output end of the operational amplifier U32, and the output end of the resistor R118 is connected with the AD port of the control chip; the connection point between the output end of the resistor R118 and the control chip is connected with one end of a capacitor C137, and the other end of the capacitor C137 is grounded.
Further, the first following module includes an operational amplifier U5, a capacitor C7, a capacitor C126, and a resistor R110;
the non-inverting input end of the operational amplifier U5 is connected with the output end of the operational amplifier U32;
the output end of the operational amplifier U5 is connected with a second following module;
the output end of the operational amplifier U5 is connected with the inverting input end of the operational amplifier U5 to form closed-loop negative feedback;
the positive power end of the operational amplifier U5 is connected with a control chip;
the negative power supply of the operational amplifier U5 is grounded;
the negative power supply end of the operational amplifier U5 is connected with the control chip through a capacitor C7;
the output end of the operational amplifier U5 and the second following module are connected with the input end of an RC series circuit, and the output end of the RC series circuit is grounded; the RC series circuit includes a capacitor C126 and a resistor R110 in series.
Further, the second follower module includes an operational amplifier U38 and a capacitor 121;
the non-inverting input end of the operational amplifier U38 is connected with the output end of the operational amplifier U5;
the output end of the operational amplifier U38 is connected with a current sharing bus module;
the output end of the operational amplifier U38 is connected with the inverting input end of the operational amplifier U38 to form closed-loop negative feedback;
the positive power end of the operational amplifier U38 is connected with a control chip;
the negative power supply of the operational amplifier U38 is grounded;
the negative power supply end of the operational amplifier U38 is connected with the control chip through a capacitor 121.
Further, the current equalizing bus module comprises a resistor R119, a resistor R120, a capacitor C138, a capacitor C139, a capacitor C140 and a PC end;
one end of the resistor R119 is connected with the output end of the operational amplifier U38, the other end of the resistor R120 is connected with one end of the resistor R120, and the other end of the resistor R120 is connected with the PC end;
the output end of the operational amplifier U38 is connected with one end of a capacitor C139, and the other end of the capacitor C139 is grounded;
one ends of a capacitor C138 and a capacitor C140 are connected to the connection point between the resistor R119 and the resistor R120, the capacitor C138 and the capacitor C140 are connected in parallel, and the other ends of the capacitor C138 and the capacitor C140 are grounded;
the connection point between the resistor R119 and the resistor R120 is also connected with an AD port of the control chip;
and the PC end is connected with an external power supply to realize parallel operation.
Further, the control chip is a digital controller.
Further, the external power source includes one or more power sources.
The beneficial effects of the utility model are as follows:
the utility model realizes that the parallel current sharing error of two or more power supplies is controlled within +/-5%; when two or more power supplies are in parallel current sharing operation, the stability of output voltage or the load adjustment rate can be controlled within +/-1 percent; when a single power supply works, the output voltage range and the current range can be controlled within +/-1 percent. And through the first following module and the second following module, the anti-interference capability of the current sampling value of the main machine and the bus current sampling value is strong, the current sampling signal is stable and reliable, and the average and high current sharing of the respective output currents during the parallel operation of a plurality of power supplies are realized by matching with the control chip.
Additional features and advantages of the utility model will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the embodiments of the utility model. The objectives and other advantages of the utility model will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present utility model and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of the connection of the present utility model;
FIG. 2 is a circuit diagram of a differential sampling module according to the present utility model;
FIG. 3 is a circuit diagram of a filter module according to the present utility model;
FIG. 4 is a circuit diagram of a first follower module according to the present utility model;
FIG. 5 is a circuit diagram of a second follower module according to the present utility model;
FIG. 6 is a circuit diagram of a current sharing bus module according to the present utility model;
FIG. 7 is a schematic diagram of a control chip connection according to the present utility model.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions of the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are some embodiments of the present utility model, but not all embodiments of the present utility model. The components of the embodiments of the present utility model generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the utility model, as presented in the figures, is not intended to limit the scope of the utility model, as claimed, but is merely representative of selected embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present utility model, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
As shown in fig. 1, the present embodiment provides an average current equalizing method control circuit. An average current sharing control circuit, comprising: the device comprises a power supply module, a differential sampling module, a filtering module, a first following module, a second following module, a current sharing bus module and a control chip. The power module comprises a brick power supply and a sampling resistor, wherein the sampling resistor is a high-precision resistor or a copper sheet, the brick power supply is connected with the sampling resistor, the brick power supply current flows through the sampling resistor to form voltage drop, and the current signal is converted into a voltage signal. The output end of the differential sampling module is connected with the power supply module to differentially amplify the voltage signal. And the output ends of the differential sampling modules are respectively connected with the input ends of the filtering modules. The output end of the filtering module is connected with the control chip, and the filtering module sends the voltage signal after differential amplification to the AD port of the control chip through filtering to perform a protection function. The differential sampling module output end is also connected with a first following module input end, and the first following module carries out following amplification on the current after differential amplification, so that noise interference is reduced, and a current signal is more stable. The output end of the first following module is also connected with a control chip and used as a local current sampling value and a current loop sampling value. The output end of the first following module is connected with the input end of the second following module, so that the mutual influence of the local current signal and the bus current signal is avoided. The output end of the second following module is connected with the input end of the current sharing bus module, and the sampling current value passing through the second following module is sent to the outside through the current sharing bus module. The output end of the current-sharing bus module is connected with the control chip, when two or more parallel machines are connected, the current-sharing buses in the current-sharing bus module are in short circuit, and the current sampling value on the current-sharing bus is the average value of the two or more currents; the current-sharing bus current samples after parallel operation are sent to an AD port of a control chip, namely bus current; the control chip compares the current sampling value of the local machine with the current sampling value of the bus to obtain a current error value, the error value adjusts the output voltage through the digital PID current sharing ring, the output voltage can change the output current of each module, and finally the purpose of high current sharing is achieved.
As shown in fig. 2, the differential sampling module includes a resistor R67, a resistor R112, a resistor R22, a resistor R18, a capacitor C127, a capacitor C128, a capacitor C129, a capacitor C130, and an operational amplifier U32;
one end of the resistor R67 and one end of the resistor R112 are respectively connected with the sampling resistor, and voltages at two ends of the sampling resistor are collected;
the other end of the resistor R67 is connected with the non-inverting input end of the operational amplifier U32;
the other end of the resistor R112 is connected with the inverting input end of the input operational amplifier U32;
the non-inverting input end of the amplifier U32 is connected with the input ends of a capacitor C130 and a resistor R22, the capacitor C130 and the resistor R22 are connected in parallel, and the output ends of the capacitor C129 and the resistor R22 are grounded;
the connection point between the resistor R112 and the inverting input end of the amplifier U32 is connected with the input end of a capacitor C129, and the output end of the capacitor C129 is grounded;
the positive power end of the operational amplifier U32 is connected with a control chip;
the negative power supply end of the operational amplifier U32 is grounded, and the negative power supply end of the operational amplifier U32 is connected with the control chip through a capacitor C128;
the output end of the operational amplifier U32 is connected with the filtering module and the first following module respectively;
the inverting input end of the amplifier U32 and the output end of the amplifier U32 are connected with an RC parallel circuit, and the RC parallel circuit comprises a capacitor C127 and a resistor R18 which are connected in parallel.
In this embodiment, the resistor R67, the resistor R112, the resistor R22, the resistor R18, the capacitor C127, the capacitor C128, the capacitor C129 and the capacitor C130 all adopt 0402 packages. Wherein the resistance values of the resistor R67 and the resistor R112 are 1k ohms, and the error is 1%. The resistance of the resistor R22 and the resistor R18 is 49.9k ohms. The capacitance of the capacitor C127 is 220pF, the withstand voltage is 50V, and the error is +/-5%. The capacitance C128 is 1uF, withstand voltage is 16V, and error is +/-10%. The capacitance reactance of the capacitor C129 and the capacitance reactance of the capacitor C130 are 100pF, the withstand voltage is 50V, and the error is +/-5%.
As shown in fig. 3, the filtering module includes a resistor R118 and a capacitor C137, where an input end of the resistor R118 is connected to an output end of the operational amplifier U32, and an output end of the resistor R118 is connected to an AD port of the control chip; the connection point between the output end of the resistor R118 and the control chip is connected with one end of a capacitor C137, and the other end of the capacitor C137 is grounded.
In this embodiment, the resistor R118 and the capacitor C137 are encapsulated with 0402, and the capacitive reactance of the capacitor C137 is 100pF.
As shown in fig. 4, the first follower module includes an operational amplifier U5, a capacitor C7, a capacitor C126, and a resistor R110;
the non-inverting input end of the operational amplifier U5 is connected with the output end of the operational amplifier U32;
the output end of the operational amplifier U5 is connected with a second following module;
the output end of the operational amplifier U5 is connected with the inverting input end of the operational amplifier U5 to form closed-loop negative feedback;
the positive power end of the operational amplifier U5 is connected with a control chip;
the negative power supply of the operational amplifier U5 is grounded;
the negative power supply end of the operational amplifier U5 is connected with the control chip through a capacitor C7;
the output end of the operational amplifier U5 and the second following module are connected with the input end of an RC series circuit, and the output end of the RC series circuit is grounded; the RC series circuit includes a capacitor C126 and a resistor R110 in series.
In this embodiment, the capacitor C7, the capacitor C126 and the resistor R110 are encapsulated with 0402. Wherein the capacitance C7 is 1uF, the withstand voltage is 16V, and the error is +/-1%. The capacitance of the capacitor C126 is 100pF, the withstand voltage is 50V, and the error is +/-5%.
As shown in fig. 5, the second follower module includes an operational amplifier U38 and a capacitor 121;
the non-inverting input end of the operational amplifier U38 is connected with the output end of the operational amplifier U5;
the output end of the operational amplifier U38 is connected with a current sharing bus module;
the output end of the operational amplifier U38 is connected with the inverting input end of the operational amplifier U38 to form closed-loop negative feedback;
the positive power end of the operational amplifier U38 is connected with a control chip;
the negative power supply of the operational amplifier U38 is grounded;
the negative power supply end of the operational amplifier U38 is connected with the control chip through a capacitor 121.
In this embodiment, the capacitor 121 is encapsulated with 0402, the capacitance is 1uF, the withstand voltage is 16V, and the error is ±1%.
As shown in fig. 6, the current equalizing bus module includes a resistor R119, a resistor R120, a capacitor C138, a capacitor C139, a capacitor C140, and a PC terminal;
one end of the resistor R119 is connected with the output end of the operational amplifier U38, the other end of the resistor R120 is connected with one end of the resistor R120, and the other end of the resistor R120 is connected with the PC end;
the output end of the operational amplifier U38 is connected with one end of a capacitor C139, and the other end of the capacitor C139 is grounded;
one ends of a capacitor C138 and a capacitor C140 are connected to the connection point between the resistor R119 and the resistor R120, the capacitor C138 and the capacitor C140 are connected in parallel, and the other ends of the capacitor C138 and the capacitor C140 are grounded;
the connection point between the resistor R119 and the resistor R120 is connected with the AD port of the control chip;
and the PC end is connected with an external power supply PC to realize parallel operation, and the output current signal of the current sharing bus module is superposed and averaged with the output current signal of the external power supply, and is sampled back to be sent to the AD port of the control chip.
In this embodiment, the resistor R119, the resistor R120, the capacitor C138, the capacitor C139 and the capacitor C140 are all encapsulated with 0402, where the resistance of the resistor R119 is 100 ohms, and the error is 1%. The capacitance reactance of the capacitor C138 and the capacitance reactance of the capacitor C140 are both 0.22uF, the withstand voltage is 16V, and the error is +/-10%. The capacitance reactance of the capacitor C139 is 4700pF, the withstand voltage is 50V, and the error is +/-10%.
As shown in fig. 7, the control chip is a digital controller, wherein 13 pins are i_out to collect output current as a protection function, 22 pins are iout_fb to collect output current as a current loop control and a current sampling value of the local current, 23 pins are i_bus to collect current sharing BUS current as BUS current, the BUS current is average current of two machines, the BUS current is compared with the local current in the control chip, and the obtained error value is used for controlling an output voltage reference through a current loop, so that high current sharing is realized.
In this embodiment, the 16 pins of the control chip are grounded through a capacitor C326, the capacitor C326 is packaged by 0603, the capacitance resistance is 2.2uF, the withstand voltage is 10V, and the error is +/-10%. The 17 pins are grounded, the 18 pins are grounded through a resistor R14, and the resistance value of the resistor R14 is 10k ohms.
The external power source includes one or more power sources.
The above description is only of the preferred embodiments of the present utility model and is not intended to limit the present utility model, but various modifications and variations can be made to the present utility model by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model should be included in the protection scope of the present utility model.
The foregoing is merely illustrative of the present utility model, and the present utility model is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present utility model. Therefore, the protection scope of the utility model is subject to the protection scope of the claims.
Claims (8)
1. A control circuit for average current sharing method is characterized in that: comprising the following steps:
the power module comprises a brick power supply and a sampling resistor, and the brick power supply is connected with the sampling resistor;
the input end of the differential sampling module is connected with a sampling resistor;
the input end of the filtering module is connected with the output end of the differential sampling module;
the input end of the first following module is connected with the output end of the differential sampling module;
the input end of the second following module is connected with the output end of the first following module,
the input end of the current sharing bus module is connected with the output end of the second following module;
the control chip is respectively connected with the output end of the filtering module, the output end of the first following module and the output end of the current equalizing bus module.
2. The average current sharing control circuit as claimed in claim 1, wherein: the differential sampling module comprises a resistor R67, a resistor R112, a resistor R22, a resistor R18, a capacitor C127, a capacitor C128, a capacitor C129, a capacitor C130 and an operational amplifier U32;
one end of the resistor R67 and one end of the resistor R112 are respectively connected with the sampling resistor;
the other end of the resistor R67 is connected with the non-inverting input end of the operational amplifier U32;
the other end of the resistor R112 is connected with the inverting input end of the input operational amplifier U32;
the non-inverting input end of the amplifier U32 is connected with the input ends of a capacitor C130 and a resistor R22, the capacitor C130 and the resistor R22 are connected in parallel, and the output ends of the capacitor C129 and the resistor R22 are grounded;
the connection point between the resistor R112 and the inverting input end of the amplifier U32 is connected with the input end of a capacitor C129, and the output end of the capacitor C129 is grounded;
the positive power end of the operational amplifier U32 is connected with a control chip;
the negative power supply end of the operational amplifier U32 is grounded, and the negative power supply end of the operational amplifier U32 is connected with the control chip through a capacitor C128;
the output end of the operational amplifier U32 is connected with the filtering module and the first following module respectively;
the inverting input end of the amplifier U32 and the output end of the amplifier U32 are connected with an RC parallel circuit, and the RC parallel circuit comprises a capacitor C127 and a resistor R18 which are connected in parallel.
3. The average current sharing control circuit as claimed in claim 2, wherein: the filtering module comprises a resistor R118 and a capacitor C137, wherein the input end of the resistor R118 is connected with the output end of the operational amplifier U32, and the output end of the resistor R118 is connected with the AD port of the control chip; the connection point between the output end of the resistor R118 and the control chip is connected with one end of a capacitor C137, and the other end of the capacitor C137 is grounded.
4. The average current sharing control circuit as claimed in claim 2, wherein: the first following module comprises an operational amplifier U5, a capacitor C7, a capacitor C126 and a resistor R110;
the non-inverting input end of the operational amplifier U5 is connected with the output end of the operational amplifier U32;
the output end of the operational amplifier U5 is connected with a second following module;
the output end of the operational amplifier U5 is connected with the inverting input end of the operational amplifier U5 to form closed-loop negative feedback;
the positive power end of the operational amplifier U5 is connected with a control chip;
the negative power supply of the operational amplifier U5 is grounded;
the negative power supply end of the operational amplifier U5 is connected with the control chip through a capacitor C7;
the output end of the operational amplifier U5 and the second following module are connected with the input end of an RC series circuit, and the output end of the RC series circuit is grounded; the RC series circuit includes a capacitor C126 and a resistor R110 in series.
5. The average current sharing control circuit as claimed in claim 4, wherein: the second following module comprises an operational amplifier U38 and a capacitor 121;
the non-inverting input end of the operational amplifier U38 is connected with the output end of the operational amplifier U5;
the output end of the operational amplifier U38 is connected with a current sharing bus module;
the output end of the operational amplifier U38 is connected with the inverting input end of the operational amplifier U38 to form closed-loop negative feedback;
the positive power end of the operational amplifier U38 is connected with a control chip;
the negative power supply of the operational amplifier U38 is grounded;
the negative power supply end of the operational amplifier U38 is connected with the control chip through a capacitor 121.
6. The average current sharing control circuit as claimed in claim 5, wherein: the current equalizing bus module comprises a resistor R119, a resistor R120, a capacitor C138, a capacitor C139, a capacitor C140 and a PC end;
one end of the resistor R119 is connected with the output end of the operational amplifier U38, the other end of the resistor R120 is connected with one end of the resistor R120, and the other end of the resistor R120 is connected with the PC end;
the output end of the operational amplifier U38 is connected with one end of a capacitor C139, and the other end of the capacitor C139 is grounded;
one ends of a capacitor C138 and a capacitor C140 are connected to the connection point between the resistor R119 and the resistor R120, the capacitor C138 and the capacitor C140 are connected in parallel, and the other ends of the capacitor C138 and the capacitor C140 are grounded;
the connection point between the resistor R119 and the resistor R120 is connected with the AD port of the control chip;
and the PC end is connected with an external power supply to realize parallel operation.
7. The average current sharing control circuit as claimed in claim 1, wherein: the control chip is a digital controller.
8. The average current sharing control circuit as claimed in claim 6, wherein: the external power source includes one or more power sources.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321386962.6U CN219590713U (en) | 2023-06-02 | 2023-06-02 | Average current flow equalizing method control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321386962.6U CN219590713U (en) | 2023-06-02 | 2023-06-02 | Average current flow equalizing method control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219590713U true CN219590713U (en) | 2023-08-25 |
Family
ID=87689438
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321386962.6U Active CN219590713U (en) | 2023-06-02 | 2023-06-02 | Average current flow equalizing method control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219590713U (en) |
-
2023
- 2023-06-02 CN CN202321386962.6U patent/CN219590713U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1069765C (en) | Voltage balancing circuit | |
| CN102035410B (en) | Voltage regulating circuit and power adapter with same | |
| CN201234205Y (en) | Parallel current equalizing control circuit, electric power module and electric power system constituted thereby | |
| CN103475202B (en) | A kind of power module power output with overcurrent protection expands circuit | |
| CN106357107B (en) | Voltage-regulating circuit and programmable power supply | |
| CN219590713U (en) | Average current flow equalizing method control circuit | |
| CN106444947A (en) | Compensating circuit for capacitor-less LDO | |
| CN107632658A (en) | The low pressure difference linear voltage regulator of high PSRR | |
| CN1068161C (en) | Circuit arrangement provided with a voltage-current converter | |
| CN113900030A (en) | Battery detection system and method with high adaptability | |
| CN109510457B (en) | Output voltage adjustable power supply circuit and gas data acquisition equipment | |
| CN206726080U (en) | Mu balanced circuit and power supply circuit, remote control with the mu balanced circuit | |
| CN207282130U (en) | A kind of OLED screen curtain grey menu water ripples suppress and removal device | |
| CN110290447A (en) | Direct current biasing unit, microphone works circuit and microphone control chip | |
| CN108429455A (en) | A kind of voltage conversion circuit and terminal device of power supply | |
| CN111367346A (en) | Voltage stabilizing circuit, power supply and electric equipment | |
| CN109600041A (en) | A kind of low ripple regulated power supply output circuit | |
| CN209250488U (en) | The adjustable power circuit of output voltage and combustion gas data acquisition equipment | |
| CN112072918B (en) | Compensation control circuit for detecting output voltage and implementation method thereof | |
| CN100432885C (en) | Constant-voltage circuit | |
| CN109142871B (en) | Linear voltage-stabilized power supply alternating current output impedance test circuit and method | |
| CN106452054A (en) | Buck-boost DC/DC converter and buck-boost control method thereof for circuit system | |
| CN106354188A (en) | Linear regulated power supply and regulation method | |
| CN200982996Y (en) | Improvement of detection circuit for transformation from current to voltage | |
| CN219695666U (en) | Negative feedback voltage regulating circuit, electronic device and vehicle |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |