CN219534268U - Integrated chip inductance forming die - Google Patents

Integrated chip inductance forming die Download PDF

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Publication number
CN219534268U
CN219534268U CN202320183852.3U CN202320183852U CN219534268U CN 219534268 U CN219534268 U CN 219534268U CN 202320183852 U CN202320183852 U CN 202320183852U CN 219534268 U CN219534268 U CN 219534268U
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China
Prior art keywords
die
mould
columns
master
buffer
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Active
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CN202320183852.3U
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Chinese (zh)
Inventor
苏立良
宋树华
苏立锋
刘明松
龙清寿
苏学远
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Cyge Electronic Technology Hunan Co ltd
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Cyge Electronic Technology Hunan Co ltd
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Priority to CN202320183852.3U priority Critical patent/CN219534268U/en
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P10/00Technologies related to metal processing
    • Y02P10/25Process efficiency

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Abstract

The utility model provides an integrated chip inductance forming die which comprises an upper die, a pre-pressing jig, a winding jig, a master die and a lower die, wherein the master die is in a strip shape, a plurality of cavities are distributed at one end of the master die in a matrix, the lower die is positioned below the master die, the winding jig, the pre-pressing jig and the upper die are sequentially arranged above the master die, a plurality of upper die columns are distributed at the bottom of the upper die in a matrix, an upper template is sleeved at the upper part of the upper die columns, and buffer columns are arranged between the top of the upper template and the bottom of the upper die. The structure is reasonable and the use effect is good after the scheme is adopted.

Description

Integrated chip inductance forming die
Technical Field
The utility model relates to the technical field of inductors, in particular to an integrated chip inductor forming die.
Background
The existing material-free integrated inductor is characterized in that a coil is mostly bent or built-in, a lead copper sheet of the bent integrated inductor is bent to the bottom from the side edge of a product at right angles, and finally a wire is led out from the bottom to form a contact.
Disclosure of Invention
The utility model aims to overcome the defects of the prior art and provide the integrated chip inductance forming die which is reasonable in structure and good in using effect.
In order to achieve the above purpose, the technical scheme provided by the utility model is as follows: the utility model provides an integrated chip inductance forming die, it is including last section mould, pre-compaction tool, wire winding tool, female type, lower section mould, wherein, the female type is rectangular shape, and female type wherein one end is matrix distribution has a plurality of die cavity, and lower section mould is located female type below, and female type top is equipped with wire winding tool, pre-compaction tool and last section mould in proper order, and last section mould bottom is matrix distribution and has a plurality of upper mould post, and upper mould post upper portion cover is equipped with the upper shaping board, is equipped with the buffer post between upper shaping board top and the upper shaping mould bottom.
The upper die is characterized in that a lower die is arranged at the top of the lower die, an n-shaped buffer area is arranged at the bottom of the lower die, a plurality of lower die column grooves penetrating up and down are formed in a matrix on the lower die above the buffer area, the number of the lower die column grooves is matched with the number of the die cavities, lower die columns are movably sleeved in the lower die column grooves, the top of each lower die column extends upwards to form a lower forming end, a buffer pad is arranged on the lower die in the buffer area, and the bottom of each lower die column is supported by the corresponding buffer pad.
After the scheme is adopted, the lower die is fixed on a corresponding forming table, a die cavity on the master die is aligned with the lower forming end of the lower die column, the raw material is poured into the die cavity, the coil is positioned on the winding jig, the winding jig is pressed down to be aligned with the die cavity, the pre-pressing jig is pressed down, the winding jig and the raw material are pre-pressed, the coil is pressed into the raw material, the winding jig and the pre-pressing jig are removed, external power drives the upper die to be pressed down (the upper die column is aligned with the die cavity, the buffer column is stressed and compressed), the raw material and the coil are pressed through the upper die column and the lower die column to form a rough blank, the upper die is lifted to drive the upper die column to leave the master die after the pressing is completed, the pressed blank is not bonded with the upper die column under the action of the buffer column, meanwhile, the upper die is continuously pressed down, the upper part (the lower forming end) of the lower die column is pressed up again, and thus the blank in the die cavity is ejected out of the die cavity, and the blank is pressed.
Drawings
Fig. 1 is a schematic diagram of the overall structure of the present utility model.
Detailed Description
The utility model is further described below with reference to all drawings, in which preferred embodiments of the utility model are: referring to fig. 1, an integrated chip inductance forming die according to this embodiment includes an upper die 1, a pre-pressing jig 2, a winding jig 3, a master die 4, and a lower die 5, wherein the master die 4 is in a strip shape, one end of the master die 4 is in a matrix distribution with a plurality of cavities 6, the lower die 5 is located below the master die 4, the winding jig 3, the pre-pressing jig 2, and the upper die 1 are sequentially disposed above the master die 4, a plurality of upper die columns 9 are distributed in a matrix at the bottom of the upper die 1, an upper die plate 7 is sleeved on the upper portion of the upper die column 9, and a buffer column 8 is disposed between the top of the upper die 7 and the bottom of the upper die 1. The top of the lower die 5 is provided with a lower die plate 10, the bottom of the lower die plate 10 is provided with an n-shaped buffer zone, a plurality of lower die column grooves penetrating up and down are arranged on the lower die plate 10 above the buffer zone in a matrix, the number of the lower die column grooves is matched with that of the die cavities 6, lower die columns 11 are movably sleeved in the lower die column grooves, the tops of the lower die columns 11 extend upwards to form lower forming ends, a buffer cushion 12 is arranged on the lower die 5 in the buffer zone, and the bottoms of the lower die columns 11 are supported by the corresponding buffer cushion 12.
After the scheme is adopted, the lower die is fixed on the corresponding forming table, the die cavity on the master model is aligned with the lower forming end of the lower die column, the upper part of the lower die column is positioned in the die cavity, raw materials are poured into the die cavity, the coil is positioned on the winding jig, the winding jig is pressed down to be aligned with the die cavity, the pre-pressing jig is pressed down, the winding jig and the raw materials are pre-pressed, the coil is pressed into the raw materials, the winding jig and the pre-pressing jig are removed, external power drives the upper die to be pressed down (the upper die column is aligned with the die cavity, the buffer column is stressed and compressed), the raw materials and the coil are pressed into a rough blank through the upper die column and the lower die column, the upper die is lifted to drive the upper die column to leave the master model after the pressing is completed, the pressed blank is not bonded with the upper die column under the action of the buffer column, meanwhile, the upper part of the lower die column (the lower forming end) is continuously pressed up, the blank in the die cavity is ejected out of the die cavity, and the blank is pressed.
The above-mentioned embodiments are only preferred embodiments of the present utility model, and are not intended to limit the scope of the present utility model, so that all changes made in the shape and principles of the present utility model are covered by the scope of the present utility model.

Claims (2)

1. An integrated chip inductance forming die which is characterized in that: the novel plastic mould comprises an upper mould (1), a pre-pressing jig (2), a winding jig (3), a master mould (4) and a lower mould (5), wherein the master mould (4) is in a strip shape, a plurality of cavities (6) are distributed at one end of the master mould (4) in a matrix mode, the lower mould (5) is located below the master mould (4), the winding jig (3), the pre-pressing jig (2) and the upper mould (1) are sequentially arranged above the master mould (4), a plurality of upper mould columns (9) are distributed at the bottom of the upper mould (1) in a matrix mode, an upper mould plate (7) is sleeved on the upper part of the upper mould columns, and buffer columns (8) are arranged between the tops of the upper mould plates (7) and the bottom of the upper mould (1).
2. The integrated chip inductance forming die of claim 1, wherein: the lower shaping die comprises a lower shaping die (5), wherein a lower shaping plate (10) is arranged at the top of the lower shaping die (10), an n-shaped buffer area is arranged at the bottom of the lower shaping plate (10), a plurality of lower column grooves penetrating up and down are arranged on the lower shaping plate (10) above the buffer area in a matrix, the number of the lower column grooves is matched with that of a cavity (6), lower columns (11) are movably sleeved in the lower column grooves, the tops of the lower columns (11) extend upwards to form lower shaping ends, buffer pads (12) are arranged on the lower shaping die (5) in the buffer area, and the bottoms of the lower columns (11) are supported by the corresponding buffer pads (12).
CN202320183852.3U 2023-02-10 2023-02-10 Integrated chip inductance forming die Active CN219534268U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202320183852.3U CN219534268U (en) 2023-02-10 2023-02-10 Integrated chip inductance forming die

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202320183852.3U CN219534268U (en) 2023-02-10 2023-02-10 Integrated chip inductance forming die

Publications (1)

Publication Number Publication Date
CN219534268U true CN219534268U (en) 2023-08-15

Family

ID=87651378

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202320183852.3U Active CN219534268U (en) 2023-02-10 2023-02-10 Integrated chip inductance forming die

Country Status (1)

Country Link
CN (1) CN219534268U (en)

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