CN219352270U - Solar laminated battery, battery assembly and photovoltaic system - Google Patents

Abstract

The application is applicable to the technical field of solar cells and provides a solar laminated cell, a cell assembly and a photovoltaic system. The solar laminated cell comprises a film top cell, a crystalline silicon bottom cell, a first main grid, a second main grid, a first auxiliary grid, a second auxiliary grid and a front auxiliary grid; the thin film top cell comprises a conductive layer, a first carrier transmission layer, a light absorption layer and a second carrier transmission layer which are sequentially laminated along the direction from the crystalline silicon bottom cell to the thin film top cell; the first main grid is communicated with the first carrier transmission layer, penetrates through the crystal silicon bottom cell and is communicated with the first auxiliary grid arranged on one side of the crystal silicon bottom cell, which is far away from the film top cell; the second main grid is communicated with the second carrier transmission layer through the front auxiliary grid, penetrates through the film top battery and the crystal silicon bottom battery, and is communicated with the second auxiliary grid arranged on one side of the crystal silicon bottom battery, which is away from the film top battery. Thus, the light receiving area of the front surface of the battery can be increased, the top battery and the bottom battery share the electrode, and the photoelectric conversion efficiency can be improved.

Description

Solar laminated battery, battery assembly and photovoltaic system

Technical Field

The application belongs to the technical field of solar cells, and particularly relates to a solar laminated cell, a cell assembly and a photovoltaic system.

Background

Solar cell power generation is a sustainable clean energy source that uses the photovoltaic effect of semiconductor p-n junctions to convert sunlight into electrical energy.

The related art may stack a plurality of solar cells into a solar laminate cell. In general, a solar laminate cell adopts a sandwich structure, and a plurality of electrodes are connected in series or in parallel. However, this results in current and voltage losses. In addition, the electrode is led out from the front surface, so that the front surface light receiving area is reduced, and the short current of the thin film battery is reduced. Thus, the photoelectric conversion efficiency of the laminated battery is low.

Based on this, how to improve the photoelectric conversion efficiency of the stacked battery has become a problem to be solved.

Disclosure of Invention

The application provides a solar laminated battery, a battery assembly and a photovoltaic system, and aims to solve the problem of how to improve the photoelectric conversion efficiency of the laminated battery.

In a first aspect, the solar laminated cell provided by the application comprises a thin film top cell, a crystalline silicon bottom cell, a first main grid, a second main grid, a first auxiliary grid, a second auxiliary grid and a front auxiliary grid; the thin film top cell comprises a conductive layer, a first carrier transmission layer, a light absorption layer and a second carrier transmission layer which are sequentially stacked along the direction from the crystal silicon bottom cell to the thin film top cell; the first main grid is communicated with the first carrier transmission layer, penetrates through the crystal silicon bottom battery and is communicated with the first auxiliary grid arranged on one side, away from the film top battery, of the crystal silicon bottom battery; the second main grid and the front auxiliary grid are communicated with the second carrier transmission layer, penetrate through the film top battery and the crystal silicon bottom battery, and are communicated with the second auxiliary grid arranged on one side of the crystal silicon bottom battery, which is away from the film top battery.

Optionally, the first carrier transport layer is an electron transport layer, the first main gate is a negative main gate, the first auxiliary gate is a negative auxiliary gate, the second carrier transport layer is a hole transport layer, the second main gate is a positive main gate, the second auxiliary gate is a positive auxiliary gate, and the positive auxiliary gate is a positive auxiliary gate.

Optionally, the crystalline silicon bottom cell includes a silicon substrate and a conductive contact structure, the solar laminated cell includes a first insulating member and a second insulating member, the polarity of the conductive contact structure is a negative electrode, the polarity of the conductive contact structure is the same as that of the first main gate, the conductive contact structure is disposed between the first main gate and the silicon substrate, the first insulating member is disposed between the first main gate and the second main gate, the second insulating member is disposed at the outer side of the second main gate, and insulates the second main gate from the light absorption layer, the first carrier transmission layer, the conductive layer and the conductive contact structure.

Optionally, the first carrier transport layer is a hole transport layer, the first main gate is an anode main gate, the first auxiliary gate is an anode auxiliary gate, the second carrier transport layer is an electron transport layer, the second main gate is a cathode main gate, the second auxiliary gate is a cathode auxiliary gate, and the front auxiliary gate is a cathode auxiliary gate.

Optionally, the crystalline silicon bottom cell includes a silicon substrate and a conductive contact structure, the solar laminated cell includes a first insulating member, a third insulating member and a fourth insulating member, the polarity of the conductive contact structure is a negative electrode, the polarity of the conductive contact structure is the same as that of the second main gate, the conductive contact structure is disposed between the second main gate and the silicon substrate, the first insulating member is disposed between the first main gate and the second main gate, the third insulating member is disposed at the outer side of the second main gate, the light absorption layer and the first carrier transmission layer are insulated, the fourth insulating member is disposed at the outer side of the first main gate, and the first main gate, the conductive layer and the conductive contact structure are insulated.

Optionally, the crystalline silicon bottom cell comprises a silicon substrate and a conductive contact structure, wherein the conductive contact structure comprises a tunneling oxide layer and a doped passivation layer which are sequentially arranged on the silicon substrate.

Optionally, the thickness of the tunneling oxide layer is 0.5nm-3nm.

Optionally, the thickness of the doped passivation layer is 20nm-300nm.

In a second aspect, the present application provides a cell assembly comprising a solar laminate cell according to any one of the above.

In a third aspect, the present application provides a photovoltaic system comprising the above-described cell assembly.

According to the solar laminated battery, the battery assembly and the photovoltaic system, the second main grid is communicated with the front auxiliary grid and penetrates through the film top battery and the crystalline silicon bottom battery, so that the second main grid can be wound to the back of the solar laminated battery, the electrode is led out from the back, the light receiving area of the front of the solar laminated battery can be increased, and the short-circuit current is increased. Meanwhile, the first main grid is communicated with the first carrier transmission layer, penetrates through the crystalline silicon bottom cell and is communicated with the first auxiliary grid on the back surface, the second main grid is communicated with the front auxiliary grid and the second carrier transmission layer, penetrates through the solar laminated cell and is communicated with the second auxiliary grid on the back surface, so that the electrode is shared by the film top cell and the crystalline silicon bottom cell, current and voltage loss in circuit conduction can be reduced, and cost can be reduced. Thus, the photoelectric conversion efficiency of the solar laminated cell is advantageously improved.

Drawings

Fig. 1 is a schematic structural view of a solar laminate cell according to an embodiment of the present application;

FIG. 2 is a schematic view of a solar cell stack according to an embodiment of the present disclosure;

description of main reference numerals:

the solar laminated cell 100, the thin film top cell 10, the conductive layer 11, the first carrier transport layer 12, the light absorbing layer 13, the second carrier transport layer 14, the crystalline silicon bottom cell 20, the silicon substrate 21, the conductive contact structure 22, the tunnel oxide layer 221, the doped passivation layer 222, the first main gate 31, the second main gate 32, the front side sub-gate 33, the first insulating member 41, the second insulating member 42, the third insulating member 43, and the fourth insulating member 44.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. Examples of the embodiments are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements throughout or elements having like or similar functionality. The embodiments described below by referring to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application. Furthermore, it should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.

In the description of the present application, it should be understood that the terms "length," "width," "upper," "lower," "left," "right," "horizontal," "top," "bottom," and the like indicate orientations or positional relationships based on the orientations or positional relationships illustrated in the drawings, merely to facilitate description of the present application and simplify description, and do not indicate or imply that the devices or elements being referred to must have a particular orientation, be configured and operated in a particular orientation, and are therefore not to be construed as limiting the present application.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically connected, electrically connected or can be communicated with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.

In this application, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, and may also include the first and second features not being in direct contact but being in contact with each other by way of additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.

The following disclosure provides many different embodiments, or examples, for implementing different structures of the application. In order to simplify the disclosure of the present application, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. Furthermore, the present application may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not in themselves indicate the relationship between the various embodiments and/or arrangements discussed. In addition, the present application provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or usage scenarios for other materials.

In the application, the second main grid is communicated with the front auxiliary grid and penetrates through the film top battery and the crystalline silicon bottom battery, so that the second main grid can be wound to the back of the solar laminated battery, the electrode is led out from the back, the light receiving area of the front of the solar laminated battery can be increased, and the short-circuit current is increased. Meanwhile, the first main grid is communicated with the first carrier transmission layer, penetrates through the crystalline silicon bottom cell and is communicated with the first auxiliary grid on the back surface, the second main grid is communicated with the front auxiliary grid and the second carrier transmission layer, penetrates through the solar laminated cell and is communicated with the second auxiliary grid on the back surface, so that the electrode is shared by the film top cell and the crystalline silicon bottom cell, current and voltage loss in circuit conduction can be reduced, and cost can be reduced. Thus, the photoelectric conversion efficiency of the solar laminated cell is advantageously improved.

Example 1

Referring to fig. 1 and 2, a solar cell stack 100 according to an embodiment of the present application includes a thin film top cell 10, a crystalline silicon bottom cell 20, a first main grid 31, a second main grid 32, a first sub-grid, a second sub-grid, and a front sub-grid 33; the thin film top cell 10 includes a conductive layer 11, a first carrier transport layer 12, a light absorbing layer 13, and a second carrier transport layer 14 laminated in this order in a direction from the crystalline silicon bottom cell 20 to the thin film top cell 10; the first main gate 31 is communicated with the first carrier transmission layer 12, penetrates through the crystalline silicon bottom cell 20, and is communicated with the first auxiliary gate arranged on one side of the crystalline silicon bottom cell 20, which is far away from the film top cell; the second main gate 32 and the front side auxiliary gate 33 are communicated with the second carrier transmission layer 14, penetrate through the thin film top cell 10 and the crystalline silicon bottom cell 20, and are communicated with the second auxiliary gate arranged on one side of the crystalline silicon bottom cell 20 away from the thin film top cell.

In the solar laminated cell 100 of the embodiment of the present application, since the second main grid 32 is connected to the front side auxiliary grid 33 and penetrates through the thin film top cell 10 and the crystalline silicon bottom cell 20, the second main grid 32 can be wound to the back surface of the solar laminated cell 100, so that the electrode is led out from the back surface, and the light receiving area of the front surface of the solar laminated cell 100 can be increased, thereby increasing the short-circuit current. Meanwhile, the first main grid 31 is communicated with the first carrier transmission layer 12, penetrates through the crystalline silicon bottom cell 20 and is communicated with the first auxiliary grid on the back surface, the second main grid 32 is communicated with the front auxiliary grid 33 and the second carrier transmission layer 14, penetrates through the solar laminated cell 100 and is communicated with the second auxiliary grid on the back surface, so that the electrode is shared by the film top cell 10 and the crystalline silicon bottom cell 20, current and voltage loss in circuit conduction can be reduced, and cost can be reduced. In this way, the photoelectric conversion efficiency of the solar laminate cell 100 is advantageously improved.

Specifically, the thin film top cell 10 is a perovskite cell. It is understood that in other embodiments, the thin film top cell 10 may also be a silicon ferrous oxide cell, a copper indium gallium selenide cell, a microcrystalline silicon cell, a nanocrystalline silicon cell, an indium phosphide cell, an amorphous silicon cell, a gallium arsenide cell, or a cadmium telluride cell.

Specifically, the conductive layer 11 may be a transparent conductive film such as ITO or FTO. Thus, the light transmittance is higher, which is beneficial for the crystalline silicon bottom cell 20 to absorb more sunlight.

Specifically, the thickness of the conductive layer 11 is 15nm to 100nm. For example, 15nm, 18nm, 30nm, 50nm, 80nm, 95nm, 100nm. Thus, the thickness of the conductive layer 11 is in a proper range, so that poor conductive effect caused by too small thickness can be avoided, and waste of materials caused by too large thickness can be avoided.

Specifically, in the example of fig. 1, the first carrier transport layer 12 is an electron transport layer and the second carrier transport layer 14 is a hole transport layer. In the example of fig. 2, the first carrier transport layer 12 is a hole transport layer and the second carrier transport layer 14 is an electron transport layer.

Further, the electron transport layer may be zinc oxide (ZnO), titanium dioxide (TiO ₂ ) Tin dioxide (SnO) ₂ ) One or more of the following.

Further, the thickness of the electron transport layer is 2nm to 400nm. For example, 2nm, 4nm, 80nm, 100nm, 200nm, 380nm, 400nm. Therefore, the thickness of the electron transport layer is in a proper range, and poor electron transport effect caused by overlarge or undersize thickness can be avoided, so that the electron transport effect is good. Preferably, the electron transport layer has a thickness of 25nm to 400nm.

Further, the hole transport layer may be nickel oxide (NiOx), molybdenum oxide (MoOx), vanadium pentoxide (V) ₂ Ox).

Further, the thickness of the hole transport layer is 2nm to 400nm. For example, 2nm, 4nm, 80nm, 100nm, 200nm, 380nm, 400nm. Therefore, the thickness of the hole transport layer is in a proper range, and poor hole transport effect caused by overlarge or undersize thickness can be avoided, so that the hole transport effect is good.

Specifically, the light absorbing layer 13 is a perovskite light absorbing layer. Further, the titanium ore absorbing layer may be a single crystal perovskite absorbing layer or a polycrystalline perovskite absorbing layer. Further, the perovskite absorption layer has a crystal structure of ABX ₃ Type A is Cs ⁺ 、CH(NH ₂ ) ₂ ⁺ 、CH ₃ NH ₃ ⁺ 、C(NH ₂ ) ₃ ⁺ One or more of B is Pb ²⁺ 、Sn ²⁺ At least one of the X is Br ^- 、I ^- 、Cl ^- One or more of the following. Therefore, the perovskite absorption layer has a good light absorption effect, and is beneficial to improving the photoelectric conversion efficiency.

It is understood that in other embodiments, the light absorbing layer 13 may be a silicon ferrous oxide absorbing layer, a copper indium gallium selenium absorbing layer, a microcrystalline silicon absorbing layer, a nanocrystalline silicon absorbing layer, an indium phosphide absorbing layer, an amorphous silicon absorbing layer, a gallium arsenide absorbing layer, or a cadmium telluride absorbing layer.

Specifically, the thickness of the light absorbing layer 13 is 0.5 μm to 3 μm. For example, 0.5 μm, 0.6 μm, 0.8 μm, 1 μm, 1.5 μm, 1.7 μm, 2 μm, 2.5 μm, 3 μm. In this way, the thickness of the light absorbing layer 13 is in a proper range, so that poor light absorbing effect caused by too large or too small thickness can be avoided, and waste of materials caused by too large thickness can also be avoided.

In particular, the crystalline silicon bottom cell 20 may include a silicon substrate 21 and a conductive contact structure 22. In the present embodiment, the silicon substrate 21 is a P-type silicon substrate 21. In other embodiments, the silicon substrate 21 may be an N-type silicon substrate 21. In this embodiment, the conductive contact structure 22 includes a tunneling oxide layer 221 and a doped passivation layer 222 sequentially disposed on the silicon substrate 21. In other embodiments, the conductive contact structure 22 may also include a doped layer disposed on the silicon substrate 21.

Specifically, the thickness of the silicon substrate 21 is 50 μm to 200 μm. For example 50 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, 200 μm.

Specifically, the side of the crystalline silicon bottom cell 20 facing away from the thin film top cell 10 may also be provided with a surface passivation layer 41. Therefore, the reflection of the battery to sunlight can be reduced, more sunlight is absorbed, more electrons and holes are excited, the battery can be protected, the service life of the battery is prolonged, the recombination center can be reduced, and the passivation effect is achieved. Meanwhile, the surface passivation layer 41 may also insulate the first and second main gates 31 and 32.

Further, the surface passivation layer 41 includes one or more of a silicon nitride layer, a silicon oxide layer, and an aluminum oxide layer. In the present embodiment, the surface passivation layer 41 includes a silicon oxide layer and a silicon nitride layer. The thickness of the silicon oxide layer is 5nm to 20nm, for example, 5nm, 6nm, 10nm, 15nm, 20nm. The thickness of the silicon nitride layer is 60nm to 110nm, for example 60nm, 65nm, 70nm, 100nm, 110nm. In this way, the solar laminate cell 100 can be protected and antireflection is facilitated to improve the photoelectric conversion efficiency.

Further, the thickness of the surface passivation layer 41 is 30nm to 130nm. For example 30nm, 50nm, 80nm, 90nm, 100nm, 120nm, 130nm. In this way, the thickness of the surface passivation layer 41 is in a proper range, and the effect of surface passivation is good.

Specifically, the first main gate 31 may include one or more of a gold main gate, a silver main gate, a copper main gate, a titanium main gate, and an aluminum main gate, and may be a hybrid main gate formed of a plurality of the foregoing materials. Specifically, the second main gate 32 may include one or more of a gold main gate, a silver main gate, a copper main gate, a titanium main gate, and an aluminum main gate, and may be a hybrid main gate formed of a plurality of the foregoing materials. Specifically, the first sub-gate may include one or more of a gold sub-gate, a silver sub-gate, a copper sub-gate, a titanium sub-gate, and an aluminum sub-gate, and may also be a hybrid sub-gate formed of a plurality of the foregoing materials. Specifically, the second sub-gate may include one or more of a gold sub-gate, a silver sub-gate, a copper sub-gate, a titanium sub-gate, and an aluminum sub-gate, and may also be a hybrid sub-gate formed of a plurality of the foregoing materials. Specifically, the front side sub-gate 33 may include one or more of a gold sub-gate, a silver sub-gate, a copper sub-gate, a titanium sub-gate, and an aluminum sub-gate, and may be a hybrid sub-gate formed of a plurality of the foregoing materials. The specific form of the gate line is not limited herein.

Specifically, a slotting region and a non-slotting region are formed on one side, facing away from the conductive layer, of the crystalline silicon bottom battery, the positive auxiliary grid of the first auxiliary grid and the second auxiliary grid is arranged in the slotting region and contacts the silicon substrate, and the negative auxiliary grid of the first auxiliary grid and the second auxiliary grid is arranged in the non-slotting region and contacts the conductive contact structure. The width of the groove is 100nm-300nm. For example, 100nm, 120nm, 150nm, 200nm, 250nm, 300nm. The width of the negative electrode auxiliary grid is 30nm-70nm. For example 30nm, 40nm, 50nm, 60nm, 70nm. The width of the positive electrode auxiliary grid is 70nm-250nm. For example 70nm, 100nm, 150nm, 200nm, 250nm.

Example two

Referring to fig. 1, in some alternative embodiments, the first carrier transport layer 12 is an electron transport layer, the first main gate 31 is a negative main gate, the first sub-gate is a negative sub-gate, the second carrier transport layer 14 is a hole transport layer, the second main gate 32 is a positive main gate, the second sub-gate is a positive sub-gate, and the front sub-gate 33 is a positive sub-gate.

Thus, the first main grid 31 of negative polarity is connected to the electron transport layer, the first sub-grid of negative polarity penetrating the crystalline silicon bottom cell 20 and connected to the back surface, and the second main grid 32 of positive polarity is connected to the hole transport layer through the front sub-grid 33 of positive polarity, and the second sub-grid of positive polarity penetrating the solar cell 100 and connected to the back surface. Thus, the thin film top cell 10 and the crystalline silicon bottom cell 20 share the electrode, which can reduce current and voltage loss in circuit conduction and also reduce cost.

Example III

Referring to fig. 1, in some alternative embodiments, the crystalline silicon bottom cell 20 includes a silicon substrate 21 and a conductive contact structure 22, the solar stacked cell 100 includes a first insulating member 41 and a second insulating member 42, the polarity of the conductive contact structure 22 is negative, the same as the polarity of the first main gate 31, the conductive contact structure 22 is disposed between the first main gate 31 and the silicon substrate 21, the first insulating member 41 is disposed between the first main gate 31 and the second main gate 32, the second insulating member 42 is disposed outside the second main gate 32, and the second main gate 32 is insulated from the light absorbing layer 13, the first carrier transmission layer 12, the conductive layer 11 and the conductive contact structure 22.

In this way, the first main gate 31 and the second main gate 32 may be insulated by the first insulating member 41, and the second main gate 32 may be connected to the positive polarity film or structure and insulated from the negative polarity film or structure by the second insulating member 42. In this way, a short circuit can be avoided, ensuring the normal operation of the solar laminate cell 100.

Specifically, the first insulating member 41 may be a partial region or an entire region of the surface passivation layer 41, and the first insulating member 41 may be other structures independent of the surface passivation layer 41.

Specifically, the second insulating member 42 includes one or more of a ceramic insulating member, a silicon oxide insulating member, a polystyrene insulating member, and an epoxy plastic insulating member.

Specifically, the second insulating members 42 are continuously distributed outside the second main gate 32. Therefore, continuous insulation is free from holes, so that the insulation effect is better.

Specifically, the conductive contact structure 22 includes a passivation contact structure or a diffusion structure.

Example IV

Referring to fig. 2, in some alternative embodiments, the first carrier transport layer 12 is a hole transport layer, the first main gate 31 is a positive main gate, the first sub-gate is a positive sub-gate, the second carrier transport layer 14 is an electron transport layer, the second main gate 32 is a negative main gate, the second sub-gate is a negative sub-gate, and the front sub-gate 33 is a negative sub-gate.

Thus, the positive first main gate 31 communicates with the hole transport layer, the positive first sub-gate penetrating the crystalline silicon bottom cell 20 and communicating with the back surface, and the negative second main gate 32 communicates with the electron transport layer through the negative front sub-gate 33, and the negative second sub-gate penetrating the solar cell 100 and communicating with the back surface. Thus, the thin film top cell 10 and the crystalline silicon bottom cell 20 share the electrode, which can reduce current and voltage loss in circuit conduction and also reduce cost.

Example five

Referring to fig. 2, in some alternative embodiments, the crystalline silicon bottom cell 20 includes a silicon substrate 21 and a conductive contact structure 22, the solar stacked cell 100 includes a front sub-gate 33, a third insulating member 43 and a fourth insulating member 44, the polarity of the conductive contact structure 22 is negative, the same as the polarity of the second main gate 32, the conductive contact structure 22 is disposed between the second main gate 32 and the silicon substrate 21, the first insulating member 41 is disposed between the first main gate 31 and the second main gate 32, the third insulating member 43 is disposed outside the second main gate 32, the second main gate 32 is insulated from the light absorbing layer 13 and the first carrier transmission layer 12, the fourth insulating member 44 is disposed outside the first main gate 31, and the first main gate 31 is insulated from the conductive layer 11 and the conductive contact structure 22.

In this way, the first main gate 31 and the second main gate 32 can be insulated by the first insulating member 41, the second main gate 32 and the film layer or structure with negative polarity can be ensured to be connected with each other by the third insulating member 43, the film layer or structure with positive polarity can be insulated, and the first main gate 31 and the film layer or structure with positive polarity can be ensured to be connected with each other by the fourth insulating member 44, and the film layer or structure with negative polarity can be insulated. In this way, a short circuit can be avoided, ensuring the normal operation of the solar laminate cell 100.

Specifically, the first insulating member 41 may be a partial region or an entire region of the surface passivation layer 41, and the first insulating member 41 may be other structures independent of the surface passivation layer 41.

Specifically, the third insulating member 43 includes one or more of a ceramic insulating member, a silicon oxide insulating member, a polystyrene insulating member, and an epoxy plastic insulating member.

Specifically, the third insulating members 43 are continuously distributed outside the second main gate 32. Therefore, continuous insulation is free from holes, so that the insulation effect is better.

Specifically, the fourth insulator 44 includes one or more of a ceramic insulator, a silicon oxide insulator, a polystyrene insulator, and an epoxy plastic insulator.

Specifically, the fourth insulating members 44 are continuously distributed outside the first main grid 31. Therefore, continuous insulation is free from holes, so that the insulation effect is better.

Specifically, the conductive contact structure 22 includes a passivation contact structure or a diffusion structure.

Example six

Referring to fig. 1 and 2, in some alternative embodiments, the crystalline silicon bottom cell 20 includes a silicon substrate 21 and a conductive contact structure 22, and the conductive contact structure 22 includes a tunneling oxide layer 221 and a doped passivation layer 222 sequentially disposed on the silicon substrate 21.

In this way, the passivation contact structure formed by the tunneling oxide layer 221 and the doped passivation layer 222 can be used to realize better interface passivation and selective collection of carriers, which is beneficial to improving the photoelectric conversion efficiency of the battery.

Specifically, the tunnel oxide layer 221 includes a silicon oxide layer.

Specifically, the doped passivation layer 222 includes a doped polysilicon layer. Further, the surface doping concentration of the doped passivation layer 222 is 10E19cm ^-3 -10E21cm ^-3 . Therefore, the doping concentration is in a proper range, so that the interface passivation effect is better.

Example seven

In some alternative embodiments, tunnel oxide layer 221 has a thickness of 0.5nm-3nm. For example, 0.5nm, 0.8nm, 1nm, 1.5nm, 1.8nm, 2nm, 2.5nm, 3nm.

Thus, the thickness of the tunnel oxide layer 221 is in a proper range, so that the poor effect of tunnel oxidation caused by too large or too small thickness can be avoided, and the effect of tunnel oxidation is better.

Example eight

In some alternative embodiments, the doped passivation layer 222 has a thickness of 20nm-300nm. For example, 20nm, 50nm, 80nm, 100nm, 150nm, 200nm, 280nm, 300nm.

In this way, the thickness of the doped passivation layer 222 is in a proper range, so that poor interface passivation effect caused by too large or too small thickness can be avoided, and the interface passivation effect is better.

Example nine

The solar laminate cell 100 according to any one of the first to eighth embodiments is used as a cell module according to the present embodiment.

In the battery assembly of the embodiment of the present application, since the second main grid 32 is connected to the front side auxiliary grid 33 and penetrates through the thin film top battery 10 and the crystalline silicon bottom battery 20, the second main grid 32 can be wound to the back surface of the solar laminated battery 100, so that the electrode is led out from the back surface, the light receiving area of the front side of the solar laminated battery 100 can be increased, and the short-circuit current can be increased. Meanwhile, the first main grid 31 is communicated with the first carrier transmission layer 12, penetrates through the crystalline silicon bottom cell 20 and is communicated with the first auxiliary grid on the back surface, the second main grid 32 is communicated with the front auxiliary grid 33 and the second carrier transmission layer 14, penetrates through the solar laminated cell 100 and is communicated with the second auxiliary grid on the back surface, so that the electrode is shared by the film top cell 10 and the crystalline silicon bottom cell 20, current and voltage loss in circuit conduction can be reduced, and cost can be reduced. In this way, the photoelectric conversion efficiency of the solar laminate cell 100 is advantageously improved.

In this embodiment, a plurality of solar stacked cells 100 in the cell assembly may be serially connected in sequence to form a cell string, so as to realize serial bus output of current, for example, serial connection of the battery sheets may be realized by providing a solder strip (bus bar, interconnection bar), a conductive back plate, and the like.

It will be appreciated that in such embodiments, the battery assembly may also include a metal frame, a back sheet, photovoltaic glass, and a glue film. The adhesive film may be filled between the front and back surfaces of the solar laminated cell 100 and between the photovoltaic glass, the adjacent cells, etc., and as a filler, it may be a transparent adhesive with good light transmittance and aging resistance, for example, the adhesive film may be an EVA adhesive film or a POE adhesive film, and may be specifically selected according to practical situations, which is not limited herein.

The photovoltaic glass may be coated on the adhesive film on the front surface of the solar laminate cell 100, and the photovoltaic glass may be ultra-white glass having high light transmittance, high transparency, and excellent physical, mechanical, and optical properties, for example, the ultra-white glass may have a light transmittance of 92% or more, which may protect the solar laminate cell 100 without affecting the efficiency of the solar laminate cell 100 as much as possible. Meanwhile, the photovoltaic glass and the solar laminated battery 100 can be bonded together by the adhesive film, and the solar laminated battery 100 can be sealed and insulated and waterproof and moistureproof by the adhesive film.

The back plate can be attached to the adhesive film on the back of the solar laminated battery 100, can protect and support the solar laminated battery 100, has reliable insulativity, water resistance and aging resistance, can be selected multiple times, and can be toughened glass, organic glass, an aluminum alloy TPT composite adhesive film and the like, and the back plate can be specifically set according to specific conditions and is not limited. The whole of the back sheet, the solar laminate cell 100, the adhesive film and the photovoltaic glass may be provided on a metal frame, which serves as a main external support structure of the entire cell assembly, and may stably support and mount the cell assembly, for example, the cell assembly may be mounted at a desired mounting position through the metal frame.

Examples ten

The photovoltaic system of the embodiment of the present application includes the battery assembly of the ninth embodiment.

In the photovoltaic system of the embodiment of the present application, since the second main grid 32 is connected to the front side auxiliary grid 33 and penetrates through the thin film top cell 10 and the crystalline silicon bottom cell 20, the second main grid 32 can be wound to the back surface of the solar laminated cell 100, so that the electrode is led out from the back surface, and the light receiving area of the front surface of the solar laminated cell 100 can be increased, thereby increasing the short-circuit current. Meanwhile, the first main grid 31 is communicated with the first carrier transmission layer 12, penetrates through the crystalline silicon bottom cell 20 and is communicated with the first auxiliary grid on the back surface, the second main grid 32 is communicated with the front auxiliary grid 33 and the second carrier transmission layer 14, penetrates through the solar laminated cell 100 and is communicated with the second auxiliary grid on the back surface, so that the electrode is shared by the film top cell 10 and the crystalline silicon bottom cell 20, current and voltage loss in circuit conduction can be reduced, and cost can be reduced. In this way, the photoelectric conversion efficiency of the solar laminate cell 100 is advantageously improved.

In this embodiment, the photovoltaic system may be applied to a photovoltaic power station, such as a ground power station, a roof power station, a water power station, or the like, and may also be applied to a device or apparatus that uses solar energy to generate power, such as a user solar power source, a solar street lamp, a solar car, a solar building, or the like. Of course, it is understood that the application scenario of the photovoltaic system is not limited thereto, that is, the photovoltaic system may be applied to all fields where solar energy is required to generate electricity. Taking a photovoltaic power generation system network as an example, the photovoltaic system can comprise a photovoltaic array, a junction box and an inverter, wherein the photovoltaic array can be an array combination of a plurality of battery assemblies, for example, the plurality of battery assemblies can form a plurality of photovoltaic arrays, the photovoltaic array is connected with the junction box, the junction box can conduct junction on current generated by the photovoltaic array, and the junction box is connected with a commercial power network after the junction current flows through the inverter and is converted into alternating current required by the commercial power network so as to realize solar power supply.

In the description of the present specification, reference to the terms "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiments or examples is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

Furthermore, the foregoing description of the preferred embodiment of the utility model is provided for the purpose of illustration only, and is not intended to limit the utility model to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the utility model.

Claims (10)

1. The solar laminated battery is characterized by comprising a film top battery, a crystalline silicon bottom battery, a first main grid, a second main grid, a first auxiliary grid, a second auxiliary grid and a front auxiliary grid; the thin film top cell comprises a conductive layer, a first carrier transmission layer, a light absorption layer and a second carrier transmission layer which are sequentially stacked along the direction from the crystal silicon bottom cell to the thin film top cell; the first main grid is communicated with the first carrier transmission layer, penetrates through the crystal silicon bottom battery and is communicated with the first auxiliary grid arranged on one side, away from the film top battery, of the crystal silicon bottom battery; the second main grid and the front auxiliary grid are communicated with the second carrier transmission layer, penetrate through the film top battery and the crystal silicon bottom battery, and are communicated with the second auxiliary grid arranged on one side of the crystal silicon bottom battery, which is away from the film top battery.

2. The solar cell of claim 1, wherein the first carrier transport layer is an electron transport layer, the first primary gate is a negative primary gate, the first secondary gate is a negative secondary gate, the second carrier transport layer is a hole transport layer, the second primary gate is a positive primary gate, the second secondary gate is a positive secondary gate, and the positive secondary gate is a positive secondary gate.

3. The solar cell of claim 2, wherein the crystalline silicon bottom cell comprises a silicon substrate and a conductive contact structure, the solar cell comprises a first insulating member and a second insulating member, the polarity of the conductive contact structure is negative and the same as the polarity of the first main grid, the conductive contact structure is arranged between the first main grid and the silicon substrate, the first insulating member is arranged between the first main grid and the second main grid, the second insulating member is arranged on the outer side of the second main grid, and the second main grid is insulated from the light absorption layer, the first carrier transmission layer, the conductive layer and the conductive contact structure.

4. The solar cell of claim 1, wherein the first carrier transport layer is a hole transport layer, the first primary gate is a positive primary gate, the first secondary gate is a positive secondary gate, the second carrier transport layer is an electron transport layer, the second primary gate is a negative primary gate, the second secondary gate is a negative secondary gate, and the front secondary gate is a negative secondary gate.

5. The solar cell of claim 4, wherein the crystalline silicon bottom cell comprises a silicon substrate and a conductive contact structure, the solar cell comprises a first insulating member, a third insulating member and a fourth insulating member, the polarity of the conductive contact structure is negative and the same as the polarity of the second main gate, the conductive contact structure is arranged between the second main gate and the silicon substrate, the first insulating member is arranged between the first main gate and the second main gate, the third insulating member is arranged on the outer side of the second main gate, the second main gate is insulated from the light absorbing layer and the first carrier transmission layer, and the fourth insulating member is arranged on the outer side of the first main gate, and the first main gate is insulated from the conductive layer and the conductive contact structure.

6. The solar cell of claim 1, wherein the crystalline silicon bottom cell comprises a silicon substrate and a conductive contact structure comprising a tunneling oxide layer and a doped passivation layer sequentially disposed on the silicon substrate.

7. The solar cell of claim 6, wherein the tunnel oxide layer has a thickness of 0.5nm to 3nm.

8. The solar cell stack according to claim 6, wherein the doped passivation layer has a thickness of 20nm-300nm.

9. A cell assembly comprising the solar laminate cell of any one of claims 1 to 8.

10. A photovoltaic system comprising the cell assembly of claim 9.

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