CN219164463U - Motor driving circuit with single input end - Google Patents

Abstract

The utility model discloses a motor driving circuit with a single input end, which comprises a control end, an inverter connected with the single input end and a double-input four-output logic decoder, wherein the input end of the double-input four-output logic decoder comprises an input end A and an input end B, and the input end A and the input end B are respectively the input end and the output end of the inverter; the first output end, the second output end and the control end are inputs of a first logic gate, the output end of the first NOR gate is an output A end, the third output end, the fourth output end and the control end are inputs of a second logic gate, and the output end of the second NOR gate is an output B end. The utility model only needs one inverter to convert the output of one MCU pin into two input ends, the control end only needs high-low level switching, and the pin of the MCU chip is not required to be occupied independently, and two logic gates are arranged, so that the enabling signal of the control end directly participates in the output logic operation, and the functions of braking, forward rotation and reverse rotation of the motor are realized.

Description

Motor driving circuit with single input end

Technical Field

The utility model belongs to the technical field of integrated circuits, and particularly relates to a motor driving circuit with a single input end.

Background

With the increasing functions of modern electronic products, more and more components in an integrated circuit need to be in communication connection with an MCU chip. And the number of output ends of the MCU chip is limited. As shown in FIG. 1, the functional block diagram of the existing motor driving circuit is that two input ends are respectively connected with two pins of the MCU chip, when the output resources of the MCU chip are limited, the structure limits the application of a part of products, especially in the security monitoring field, a motor driving circuit which can realize all functions of forward rotation, reverse rotation, braking and the like by only one input end is urgently needed, and the consumed power supply current is required to be as low as possible during braking.

Disclosure of Invention

The utility model aims to solve the technical problems of the prior art, and provides a motor driving circuit with a single input end, which has simple structure and reasonable design, only needs one inverter to convert the output of an MCU pin into two input ends, only needs high-low level switching of a control end, does not need to occupy the pin output resource of an MCU chip independently, and is provided with two logic gates, so that the enabling signals of the control end directly participate in the output logic operation, and the high-low combination of signal pulses of an output end A and an output end B is output to realize the functions of braking, forward rotation and reverse rotation of a motor.

In order to solve the technical problems, the utility model adopts the following technical scheme: a single input motor drive circuit, characterized by: the dual-input four-output logic decoder comprises a control end, an inverter connected with a single input end and a dual-input four-output logic decoder, wherein the input end of the dual-input four-output logic decoder comprises an input end A and an input end B, the input end A and the input end B are respectively the input end and the output end of the inverter, and the dual-input four-output logic decoder comprises a transistor Q1, a transistor Q2, a transistor Q3 and a transistor Q4; the base electrode of the transistor Q1 is connected with the input end A through a resistor R2 and a resistor R3, the emitter electrode of the transistor Q1 is grounded, and the collector electrode of the transistor Q1 is a first output end; the base electrode of the transistor Q2 is connected with the input end A through a resistor R5, the emitter electrode of the transistor Q2 is grounded, and the collector electrode of the transistor Q2 is a second output end; the base electrode of the transistor Q3 is connected with one end of a resistor R8, the other end of the resistor R8 is divided into two paths, one path is connected with an input end B through a resistor R7, the other path is connected with one end of a resistor R9, the emitter electrode of the transistor Q3 is grounded, and the collector electrode of the transistor Q1 is a third output end; the base electrode of the transistor Q4 is connected with the other end of the resistor R9 through the resistor R10, the emitter electrode of the transistor Q1 is grounded, and the collector electrode of the transistor Q1 is a fourth output end; the first output end, the second output end and the control end are inputs of a first logic gate, the output end of the first NOR gate is an output A end, the third output end, the fourth output end and the control end are inputs of a second logic gate, and the output end of the second NOR gate is an output B end.

The motor driving circuit with a single input end is characterized in that: the inverter comprises a transistor Q5 and a field effect transistor J1, wherein the transistor Q5 is an NPN triode, the base electrode of the transistor Q5 is connected with one end of a resistor R6, the other end of the resistor R6 is divided into two paths, one path is connected with an input A end, the other path is grounded through a resistor R4, the emitter electrode of the transistor Q5 is grounded, the collector electrode of the transistor Q5 is connected with the drain electrode of the field effect transistor J1, the grid electrode of the field effect transistor J1 is grounded, and the source electrode of the field effect transistor J1 is connected with an external power supply VCC.

The motor driving circuit with a single input end is characterized in that: the first logic gate and the second logic gate are nor gates.

The motor driving circuit with a single input end is characterized in that: the circuit further comprises a transistor Q6, a transistor Q7 and a transistor Q8, wherein the connecting end of the base electrode and the collector electrode of the transistor Q6 is connected with the input end B, the emitter electrode of the transistor Q6 is connected with the connecting end of the base electrode and the collector electrode of the transistor Q7, the emitter electrode of the transistor Q7 is connected with the connecting end of the base electrode and the collector electrode of the transistor Q8, and the emitter electrode of the transistor Q8 is grounded.

The motor driving circuit with a single input end is characterized in that: the control end and the single input end are respectively connected with pins of the MCU chip.

Compared with the prior art, the utility model has the following advantages:

1. the utility model has simple structure, reasonable design and convenient realization, use and operation.

2. The motor driving circuit can realize that input signals are mutually opposite in phase at the two points of the input end A and the input end B only by one phase inverter, and convert the output of one MCU pin into two input ends, and can realize all functions of forward rotation, reverse rotation, braking and the like by only one input end, so that the motor driving circuit has good use effect.

3. The control end only needs high-low level switching, does not need to occupy the pin output resource of the MCU chip independently, and saves the resource of the pin of the MCU chip to the maximum extent.

4. According to the utility model, the field effect tube J1 is adopted, when the drain electrode of the field effect tube J1 is high voltage, the grid electrode of the field effect tube J1 is grounded, so that the source electrode potential of the field effect tube J1 is higher than the grid electrode potential of the field effect tube J1, the field effect tube J1 is conducted at the moment, the minimum conduction current of the field effect tube J1 can be less than 10uA, and the voltage is raised to a certain value, the influence of an external power supply VCC is avoided after the pinch-off voltage is reached, and the current consumed by the power supply in braking is small.

5. The utility model sets two logic gates, so that the enabling signals of the control end directly participate in the output logic operation, and the signal pulse of the output end A and the signal pulse of the output end B are output to realize the functions of braking, forward rotation and reverse rotation of the motor.

In summary, the utility model has simple structure and reasonable design, only one inverter is needed to convert the output of one MCU pin into two input ends, the control end only needs to switch high and low levels, the pin output resource of the MCU chip is not required to be occupied independently, and two logic gates are arranged, so that the enabling signals of the control end directly participate in the output logic operation, and the high and low combination of the signal pulses of the output end A and the output end B is output, thereby realizing the functions of braking, forward rotation and reverse rotation of the motor.

The technical scheme of the utility model is further described in detail through the drawings and the embodiments.

Drawings

Fig. 1 is a schematic block diagram of a prior art motor drive circuit.

Fig. 2 is a schematic block diagram of the circuit of the present utility model.

Fig. 3 is a schematic circuit diagram of the present utility model.

Detailed Description

The present utility model will be described in further detail with reference to the accompanying drawings.

It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be combined with each other. The utility model will be described in detail below with reference to the drawings in connection with embodiments.

It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments in accordance with the present application. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the terms "comprises" and/or "comprising" when used in this specification are taken to specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.

It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be capable of being practiced otherwise than as specifically illustrated and described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Spatially relative terms, such as "above … …," "above … …," "upper surface at … …," "above," and the like, may be used herein for ease of description to describe one device or feature's spatial location relative to another device or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "above" or "over" other devices or structures would then be oriented "below" or "beneath" the other devices or structures. Thus, the exemplary term "above … …" may include both orientations of "above … …" and "below … …". The device may also be positioned in other different ways (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

As shown in fig. 2 and 3, the present utility model includes a control terminal, an inverter connected to a single input terminal, and a dual input four output logic decoder.

The inverter comprises a transistor Q5 and a field effect transistor J1, wherein the base electrode of the transistor Q5 is connected with one end of a resistor R6, the other end of the resistor R6 is divided into two paths, one path is connected with an input end A, the other path is grounded through a resistor R4, the emitter electrode of the transistor Q5 is grounded, the collector electrode of the transistor Q5 is connected with the drain electrode of the field effect transistor J1, the grid electrode of the field effect transistor J1 is grounded, and the source electrode of the field effect transistor J1 is connected with an external power supply VCC.

When the transistor Q5 is actually used, when the base electrode of the transistor Q5 is used as an input stage, the collector electrode is used as an output stage, and the emitter electrode is grounded, if the base electrode of the transistor Q5 inputs high potential, the transistor is conducted, the collector electrode outputs low voltage, and at the moment, the parasitic capacitor C1 of the field effect transistor J1 is charged by the external power supply VCC; if the input stage of the transistor Q5 inputs a low potential, the collector is connected with the field effect transistor J1, the parasitic capacitance C1 of the field effect transistor J1 discharges, and the collector outputs a high voltage. Thus, from the logical relationship of the output and input, an inversion is achieved, i.e., transistor Q5 acts as an inverter.

Therefore, the motor driving circuit of the utility model only needs a single input end and an inverter, and can realize that input signals are mutually inverted at two points of an input end A and an input end B, the input end A and the input end B output four signals with high and low levels through a transistor Q1, a transistor Q2, a transistor Q3 and a transistor Q4, and the states of the input end A and the input end B determine the states of 4 output switch transistors Q1, a transistor Q2, a transistor Q3 and a transistor Q4, so as to provide signals for the subsequent driving. The four high-low level signals respectively carry out logic operation with the high-low level signals of the control end, and the high-low level signals of the signal pulse of the output end A and the signal pulse of the output end B are output, so that the functions of braking, forward rotation and reverse rotation of the motor are realized.

The specific working principle is as follows:

the input end of the dual-input four-output logic decoder comprises an input end A and an input end B, the input end A and the input end B are respectively an input end and an output end of an inverter, and the dual-input four-output logic decoder comprises a transistor Q1, a transistor Q2, a transistor Q3 and a transistor Q4.

The base electrode of the transistor Q1 is connected with the input end A through a resistor R2 and a resistor R3, the emitter electrode of the transistor Q1 is grounded, and the collector electrode of the transistor Q1 is a first output end; when the input A end is high potential, the high potential is input to the base electrode of the transistor Q1, the transistor Q1 is conducted, the voltage drop between the collector electrode and the emitter electrode of the transistor Q1 is very small and approximates to a short circuit state, and the collector electrode outputs low voltage; when the input A terminal is low, the base electrode of the transistor Q1 inputs low potential, the transistor Q1 is cut off, the collector electrode and the emitter electrode of the transistor Q1 are in an open circuit state, and the collector electrode outputs high voltage. The resistor R2 plays a role in limiting current and saturation of the transistor Q1, and has a role in controlling switching speed and protecting the transistor Q1.

The base of the transistor Q2 is connected with the input A end through a resistor R5, the emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is a second output end. Similarly, when the input A end is high potential, the base electrode of the transistor Q2 inputs high potential, and the collector electrode outputs low voltage; when the input a terminal is at a low potential, the transistor Q1 is turned off and the collector outputs a high voltage. The resistor R5 plays a role in limiting current and saturation of the transistor Q2, and has a role in controlling the switching speed and protecting the transistor Q2.

The base electrode of the transistor Q3 is connected with one end of a resistor R8, the other end of the resistor R8 is divided into two paths, one path is connected with an input end B through a resistor R7, the other path is connected with one end of a resistor R9, the emitter electrode of the transistor Q3 is grounded, and the collector electrode of the transistor Q1 is a third output end; when the input end B is high potential, the base electrode of the transistor Q2 inputs high potential, and the collector electrode outputs low voltage; when the input B terminal is at low potential, the transistor Q1 is turned off and the collector outputs high voltage. Resistor R8 serves to limit current and limit saturation of transistor Q3, and has the functions of controlling the switching speed and protecting transistor Q3.

The base electrode of the transistor Q4 is connected with the other end of the resistor R9 through the resistor R10, the emitter electrode of the transistor Q1 is grounded, and the collector electrode of the transistor Q1 is a fourth output end; similarly, when the input end B is high potential, the base electrode of the transistor Q2 inputs high potential, and the collector electrode outputs low voltage; when the input B terminal is at low potential, the transistor Q1 is turned off and the collector outputs high voltage. Resistor R10 serves to limit current and limit saturation of transistor Q4, and has the function of controlling the switching speed and protection of transistor Q4.

The resistance values of the resistor R1, the resistor R3 and the resistor R4 determine the dc bias of the transistor Q1 and the transistor Q2, and the resistor R7, the resistor R9 and the resistor R11 determine the dc bias of the transistor Q3 and the transistor Q4.

The circuit further comprises a transistor Q6, a transistor Q7 and a transistor Q8, wherein the connecting end of the base electrode and the collector electrode of the transistor Q6 is connected with the input end B, the emitter electrode of the transistor Q6 is connected with the connecting end of the base electrode and the collector electrode of the transistor Q7, the emitter electrode of the transistor Q7 is connected with the connecting end of the base electrode and the collector electrode of the transistor Q8, and the emitter electrode of the transistor Q8 is grounded. Transistor Q6, transistor Q7 and transistor Q8 provide a high level clamp voltage to input B.

In this embodiment, the first output driver is a first nor gate, and the second output driver is a second nor gate. The first output end, the second output end and the control end are inputs of a first NOR gate, the output end of the first NOR gate is an output A end, the third output end, the fourth output end and the control end are inputs of a second NOR gate, and the output end of the second NOR gate is an output B end. Logical truth table as in table 1:

table 1 logical truth table

As can be seen from the logic truth table, when the control terminal is at the high level, the output terminal of the first nor gate, i.e. the output terminal a, outputs at the low level, and the output terminal of the second nor gate, i.e. the output terminal B, outputs at the low level, the transistors Q1, Q2, Q3 and Q4 of the dual-input four-output logic decoder are all in the off state, and the motor is in the brake state.

The field effect transistor J1 is an N-channel junction field effect transistor, is integrated with an IC chip, and is formed by doping a high-concentration P-type diffusion region around an N-type epitaxy.

Because the grid electrode of the field effect tube J1 is grounded, the source electrode potential of the field effect tube J1 is higher than the grid electrode potential of the field effect tube J1, the field effect tube J1 is conducted at the moment, the lowest conducting current of the field effect tube J1 can be less than 10uA, and the voltage is raised to a certain value, so that the influence of an external power supply VCC is avoided after the pinch-off voltage is reached, and the current consumed by the power supply in braking is small.

When the control end is low level and the single input end is high level, the input end A is high level, the input end B is low level, the first output end, the second output end, the third output end and the fourth output end are respectively low level, high level and high level, the low level of the control end, the low level of the first output end and the low level of the second output end are subjected to first NOR gate operation, the signal of the output end A is output, and the output end A is high level; the low level of the control end, the high level of the third output end and the high level of the fourth output end are subjected to second NOR gate operation and output as a signal of an output end B, and the output end B is low level. The output A end is high level, the output B end is low level, and the motor rotates positively.

When the control end is low level and the single input end is low level, the input end A is low level, the input end B is high level, the first output end, the second output end, the third output end and the fourth output end are respectively high level, low level and low level, the low level of the control end, the high level of the first output end and the high level of the second output end are subjected to first NOR gate operation, the signal of the output end A is output, and the output end A is low level; the low level of the control end, the low level of the third output end and the low level of the fourth output end are subjected to the second NOR gate operation and output as a signal of an output end B, and the output end B is high level. The output A terminal is low level, the output B terminal is high level, and the motor is reversed.

In short, as long as the control terminal is high level, the motor is in a braking state regardless of whether the input terminal is high or low; the control end is low level, and when the input end is high level, the motor is in a forward rotation state; the control terminal is low, and when the input is low, the motor is in a reverse state.

In summary, the control end only needs to switch between high and low levels, and does not need to occupy the pin output resources of the MCU chip alone. The motor driving circuit of the utility model only adopts the pin of one MCU chip to be connected to a single input end, and then adds a control end which does not need an independent MCU chip, and the double-input four-output logic decoder can realize three working states of forward rotation, reverse rotation and braking of the motor, thereby removing the invalid function of open circuit of the motor, saving MCU chip resources to the maximum extent and having good use effect.

Wherein the contents not described in detail in the specification belong to the prior art known to those skilled in the art.

The foregoing is merely an embodiment of the present utility model, and the present utility model is not limited thereto, and any simple modification, variation and equivalent structural changes made to the foregoing embodiment according to the technical matter of the present utility model still fall within the scope of the technical solution of the present utility model.

Claims (5)

1. A single input motor drive circuit, characterized by: comprises a control end, an inverter connected with a single input end and a double-input four-output logic decoder, wherein the input end of the double-input four-output logic decoder comprises an input end A and an input end B, the input end A and the input end B are respectively the input end and the output end of the inverter, the double-input four-output logic decoder comprises a transistor Q1, a transistor Q2, a transistor Q3 and a transistor Q4,

the base electrode of the transistor Q1 is connected with the input end A through a resistor R2 and a resistor R3, the emitter electrode of the transistor Q1 is grounded, and the collector electrode of the transistor Q1 is a first output end;

the base electrode of the transistor Q2 is connected with the input end A through a resistor R5, the emitter electrode of the transistor Q2 is grounded, and the collector electrode of the transistor Q2 is a second output end;

the base electrode of the transistor Q3 is connected with one end of a resistor R8, the other end of the resistor R8 is divided into two paths, one path is connected with an input end B through a resistor R7, the other path is connected with one end of a resistor R9, the emitter electrode of the transistor Q3 is grounded, and the collector electrode of the transistor Q1 is a third output end;

the base electrode of the transistor Q4 is connected with the other end of the resistor R9 through the resistor R10, the emitter electrode of the transistor Q1 is grounded, and the collector electrode of the transistor Q1 is a fourth output end;

the first output end, the second output end and the control end are inputs of a first logic gate, the output end of the first NOR gate is an output A end, the third output end, the fourth output end and the control end are inputs of a second logic gate, and the output end of the second NOR gate is an output B end.

2. A single-input motor drive circuit as claimed in claim 1, wherein: the inverter comprises a transistor Q5 and a field effect transistor J1, wherein the transistor Q5 is an NPN triode, the base electrode of the transistor Q5 is connected with one end of a resistor R6, the other end of the resistor R6 is divided into two paths, one path is connected with an input A end, the other path is grounded through a resistor R4, the emitter electrode of the transistor Q5 is grounded, the collector electrode of the transistor Q5 is connected with the drain electrode of the field effect transistor J1, the grid electrode of the field effect transistor J1 is grounded, and the source electrode of the field effect transistor J1 is connected with an external power supply VCC.

3. A single-input motor drive circuit as claimed in claim 1, wherein: the first logic gate and the second logic gate are nor gates.

4. A single-input motor drive circuit as claimed in claim 1, wherein: the circuit further comprises a transistor Q6, a transistor Q7 and a transistor Q8, wherein the connecting end of the base electrode and the collector electrode of the transistor Q6 is connected with the input end B, the emitter electrode of the transistor Q6 is connected with the connecting end of the base electrode and the collector electrode of the transistor Q7, the emitter electrode of the transistor Q7 is connected with the connecting end of the base electrode and the collector electrode of the transistor Q8, and the emitter electrode of the transistor Q8 is grounded.

5. A single-input motor drive circuit as claimed in claim 1, wherein: the single input end is connected with pins of the MCU chip.

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