CN219041630U - Input high-voltage-resistant step-up and step-down circuit - Google Patents

Input high-voltage-resistant step-up and step-down circuit Download PDF

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CN219041630U
CN219041630U CN202122599620.XU CN202122599620U CN219041630U CN 219041630 U CN219041630 U CN 219041630U CN 202122599620 U CN202122599620 U CN 202122599620U CN 219041630 U CN219041630 U CN 219041630U
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buck
vin
boost
input
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班福奎
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Shanghai Shiningic Electronic Technology Co ltd
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Shanghai Shiningic Electronic Technology Co ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

A step-up and step-down circuit for inputting high voltage resistance comprises a step-up and step-down control chip, an energy storage inductor, a rechargeable battery and a load; the buck-boost control chip comprises an input high-voltage isolation module, a buck-boost control module, a power port VIN, an inductance port LX, a charging port BAT, an output port VOUT and a ground end GND; the port VIN receives the voltage of the power supply; the energy storage inductor is connected between the port LX and the port BAT, the positive electrode of the rechargeable battery is connected with the port BAT, the negative electrode of the rechargeable battery is connected with the ground end GND, and the load is connected between the VOUT port and the ground end GND; when the voltage of the power supply received by the port VIN is higher than the working voltage range of the buck-boost control module and the load, or when the voltage of the power supply received by the port VIN is lower than the working voltage range of the buck-boost control module and the load, the input high-voltage isolation module isolates the port VIN from the buck-boost control module and the output port VOUT, so that the buck-boost control module and the load are not damaged, and reverse charging is effectively prevented.

Description

Input high-voltage-resistant step-up and step-down circuit
Technical Field
The utility model belongs to the technical field of lighting circuits, and relates to an input high-voltage-resistant buck-boost circuit.
Background
With the continuous development of integrated circuit technology, the buck-boost direct current conversion power supply management products are widely developed and applied, high-efficiency direct current to direct current power supply conversion is realized, and the buck-boost direct current conversion power supply management products can be applied to the use environments and occasions of various electronic products.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating connection of a buck-boost dc conversion circuit in the prior art. As shown in fig. 1, the control chip 212 has 5 ports VIN, LX, BAT, VOUT1 and GND. The positive electrode of the input capacitor 102 and the USB port of the USB power supply port are connected with the port VIN, and the negative electrode of the input capacitor 102 is grounded; the energy storage inductor 104 is connected between the port LX and the port BAT, and the battery bypass capacitor 105 is connected between the port BAT and the ground GND; the positive electrode of the rechargeable battery 106 is connected between the port BAT and the ground GND; the port output capacitance 107 and the battery load 108 are connected in parallel between the port VOUT1 and the ground GND.
It will be clear to those skilled in the art that in the above-described circuit, the dc conversion mode, for example, the buck or boost dc conversion mode, can be determined by the voltage value at the port VIN. Specifically, when the voltage value of the port VIN is determined by the port MODE module 401 to select the power conversion MODE, the following cases may be classified:
(1) when VIN is more than or equal to 4.7V, the USB port, the port VIN, the switch PMOS transistor 404, the flywheel NMOS transistor 405 and the inductor 104 form a synchronous voltage reduction framework, so that the battery 106 is charged in a switch mode, and meanwhile, the battery load of the port VOUT1 is provided with power supply energy;
(2) synchronous voltage reduction does not work when VIN is more than or equal to 4.5 and less than 4.7V, and the port VIN only provides power supply energy for a battery load;
(3) when VIN is less than 4.5V, the switch NMOS transistor 405, the freewheel PMOS transistor 404, and the energy storage inductor 104 form a synchronous boost architecture, discharging the battery and providing power energy to the battery load 108.
However, since the port VIN is directly connected to the port VOUT1 and the PMOS transistor 404, path management cannot be achieved, i.e., when the port VIN is less than 4.5V, the port VIN also consumes the power of the boost output for the load, and the PMOS transistor 404 is usually a low-voltage 5V tube, and when the port VIN is greater than or equal to 6.5V, the port VIN of the chip cannot withstand such high voltage.
Disclosure of Invention
In order to solve the technical problems, the utility model provides an input high-voltage-resistant buck-boost circuit, which separates an input end from a buck-boost part by using an NMOS transistor with a source/drain high voltage resistance, and realizes path management of the input end high voltage resistance and power supply conversion.
In order to achieve the above purpose, the technical scheme of the utility model is as follows:
a step-up and step-down circuit for inputting high voltage resistance comprises a step-up and step-down control chip, an energy storage inductor, a rechargeable battery and a load; the buck-boost control chip is characterized by comprising an input high-voltage isolation module, a buck-boost control module, a power port VIN, an inductance port LX, a charging port BAT, an output port VOUT and a ground end GND; wherein the port VIN receives a voltage of a power supply; the energy storage inductor is connected between the port LX and the port BAT, the positive electrode of the rechargeable battery is connected with the port BAT, the negative electrode of the rechargeable battery is connected with the ground end GND, and the load is connected between the VOUT port and the ground end GND; the buck-boost control module comprises a mode selector, wherein the mode selector is used for performing management selection of a power supply path according to the input voltage of the power supply port VIN; when VIN is more than or equal to V2, a synchronous buck circuit is formed in a circuit containing the energy storage inductor, the rechargeable battery is charged in a switching mode, and meanwhile, power supply energy is provided for the load; when V1 is less than or equal to VIN and less than V2, the synchronous buck circuit does not work, and the power port VIN only provides power supply energy for the load; when VIN is smaller than V1, a synchronous boosting loop is formed in a loop containing the energy storage inductor, the rechargeable battery is discharged, and power supply energy is provided for the load; wherein V1 is smaller than V2, and the working voltage of the buck-boost control module and the load is V3, and V3 is larger than V2; when VIN is more than or equal to V4 or VIN is less than V1, the input high-voltage isolation module is used for isolating the power supply port VIN from the buck-boost control module and the output port VOUT; wherein V3 is less than V4.
Further, the high-voltage isolation module comprises an NMOS isolation tube, a power supply regulator and a charge pump; wherein the drain electrode of the NMOS isolation tube is connected to the port VIN, the source electrode thereof is connected to the port VOUT, and the grid electrode thereof is connected to the output of the charge pump; the input of the power regulator is connected to port VIN, and its output is supplied as power to the charge pump; the input of the charge pump is connected to the output of the power regulator, and the output of the charge pump is connected to the gate of the NMOS isolation tube.
Further, the high voltage isolation module comprises a power supply regulator, a grid clamping zener diode, a PMOS isolation tube, a first substrate switching diode and a second substrate switching diode; wherein the source of the PMOS isolation tube is connected to the port VIN, the drain thereof is connected to the port VOUT, and the grid thereof is connected to the output node ENB of the power regulator; the input of the power regulator is connected to port VIN and its output is connected to output node ENB; the anode of the grid clamping zener diode is connected to the output node ENB, and the cathode of the grid clamping zener diode is connected to the source electrode of the PMOS isolation tube; the anode of the first substrate switching diode is connected to the port VIN, and the cathode of the first substrate switching diode is connected to the substrate of the PMOS isolation tube; the anode of the second substrate switching diode is connected to VOUT, and the cathode thereof is connected to the substrate of the PMOS isolation tube.
Further, the lifting voltage control module comprises a PMOS tube, an NMOS tube, a mode selector, a substrate selector and a lifting voltage controller; the source electrode of the PMOS tube is connected to VOUT, the drain electrode of the PMOS tube is connected to LX, and the grid electrode of the PMOS tube is connected to the VPG output end of the buck-boost controller; the source electrode of the NMOS tube is connected to the ground, the drain electrode of the NMOS tube is connected to LX, and the grid electrode of the NMOS tube is connected to the VNG output end of the buck-boost controller; the input connection end of the mode selector is connected to VIN, and the output end of the mode selector is connected to the input end VMOD of the buck-boost controller; the two input ends of the substrate selector are VOUT and BAT respectively, and the output end is VSUB which is connected to the input end of the buck-boost controller; the 4 inputs of the buck-boost controller are VOUT, VMOD, VSUB and BAT, respectively, and the two outputs are VPG and VNG, respectively.
Further, V1 is 4.5 volts, V2 is 4.7 volts, V3 is 5 volts and V4 is 6.5 volts.
Further, the input high voltage tolerant buck-boost circuit further includes an input capacitor, and the first capacitor is connected between the port VIN and the ground GND.
Further, the input high voltage resistant step-up/step-down circuit further comprises a battery bypass capacitor, wherein the battery bypass is connected between the rechargeable battery and the ground GND.
Further, the input high-voltage-resistant buck-boost circuit further comprises an output capacitor, and the output capacitor is connected to two ends of the load.
According to the technical scheme, the input high-voltage-resistant buck-boost circuit based on the circuit has the following beneficial effects:
(1) the buck-boost circuit can realize high voltage resistance of the input end;
(2) the step-up/step-down circuit is managed through an accurate power path, so that the output conversion effect of the step-up/step-down circuit is improved.
Drawings
FIG. 1 is a schematic diagram showing the connection of a buck-boost DC conversion circuit in the prior art
FIG. 2 is a schematic diagram of a step-up/step-down circuit for inputting high voltage resistance in an embodiment of the utility model
FIG. 3 is a schematic diagram of an input high voltage isolation module according to an embodiment of the utility model
FIG. 4 is a schematic diagram illustrating power path management in an embodiment of the present utility model
Description of element reference numerals
101. Control chip
102. Input capacitance
104. Energy storage inductor
105. Battery bypass capacitor
106. Rechargeable battery
107. Output capacitor
108. Load(s)
201. High-voltage isolation module
202. Step-up and step-down control module
301. Power supply regulator
302. Charge pump
303 NMOS isolation tube
401. Mode selector
402. Substrate selector
403. Step-up and step-down controller
404 PMOS transistor
405 NMOS transistor
Detailed Description
The following describes the embodiments of the present utility model in further detail with reference to fig. 2-4.
Referring to fig. 2, fig. 2 is a schematic diagram of a step-up/step-down circuit for inputting high voltage resistance in an embodiment of the utility model. As shown, the input high voltage tolerant buck-boost circuit includes buck-boost control chip 101, input capacitor 102, energy storage inductor 104, battery bypass capacitor 105, rechargeable battery 106, output capacitor 107 and load 108. The buck-boost control chip 101 includes an input high voltage isolation module 201, a buck-boost control module 202, a power port VIN, an inductance port LX, a charging port BAT, an output port VOUT, and a ground GND.
In an embodiment of the utility model, the port VIN may be connected to a charger (e.g., USB port). The port LX is connected to one end of an energy storage inductor 104, and the other end of the energy storage inductor 104 is connected to the port BAT of the buck-boost control chip 101, the positive electrode of a battery bypass capacitor 105 and the positive electrode of a rechargeable battery 106; the port VOUT is connected to the positive electrode of the output capacitor 107 and one end of the load 108; the port GND terminal is connected to ground; the negative electrode of the input capacitor 102, the negative electrode of the battery bypass capacitor 105, the negative electrode of the rechargeable battery 106, the negative electrode of the output capacitor 107 and the other end of the load 108 are all connected to the ground GND.
The buck-boost control module 202 and the load 108 are assumed to be 5V working voltage, and when VIN is high voltage (e.g. greater than 6.5V), or when VIN is low voltage (e.g. less than 4.5V), the input high voltage isolation module 201 isolates the chip port VIN from the buck-boost control module 202 and the output port VOUT, i.e. the load 108 only receives the discharge of the rechargeable battery 106, so that the buck-boost control module 202 and the load 108 connected to the output port VOUT are not damaged, and the rechargeable battery 106 can avoid the reverse charging of the charger (e.g. USB port).
Specifically, in a preferred embodiment of the present utility model, as shown in fig. 3, the high voltage isolation module 201 may include an NMOS isolation tube 303, a power regulator (REG/UVLO/OVP) 301, and a charge PUMP (PUMP) 302. Wherein the drain of the NMOS isolation tube 303 is connected to the port VIN, the source thereof is connected to the output terminal VOUT, and the gate thereof is connected to the output of the charge pump 302; the input of the power regulator 301 is connected to VIN, and its output is supplied as power to the charge pump 302; the input of the charge pump 302 is connected to the output of the power regulator 301, and its output is connected to the gate of the NMOS isolation tube 303.
In another preferred embodiment of the present utility model, as shown in fig. 4, the high voltage isolation module 201 may also include a power regulator 304, a gate clamp zener diode 305, a PMOS isolation diode 306, a first substrate switching diode 307, and a second substrate switching diode 308. Wherein the source of PMOS isolation tube 306 is connected to port VIN, the drain is connected to port VOUT, and the gate is connected to the output ENB of the power regulator; the input of the power regulator is connected to the port VIN, and the output is ENB; an anode of the gate clamp zener diode 305 is connected to the ENB and a cathode thereof is connected to the source of the PMOS isolation tube; an anode of the first substrate switching diode 307 is connected to the port VIN and a cathode thereof is connected to a liner of the PMOS isolation tube 306; the anode of the second substrate switching diode 308 is connected to port VOUT and the cathode thereof is connected to the substrate of PMOS isolation tube 306.
It should be noted that, any of the prior art may be used for the lifting pressure control module 202. For example, in an embodiment of the present utility model, as shown in FIG. 2, the BUCK-BOOST Control module 202 may include a PMOS transistor 404, an NMOS transistor 405, a MODE selector (MODE) 401, a substrate Selector (SUB) 402, and a BUCK-BOOST controller (BUCK-BOOST Control) 403.
Wherein, the source of the PMOS transistor 404 is connected to VOUT, the drain thereof is connected to LX, and the gate thereof is connected to the VPG output terminal of the buck-boost controller 403; the source of the NMOS transistor 405 is connected to ground, the drain thereof is connected to LX, and the gate thereof is connected to the VNG output terminal of the buck-boost controller 403; an input connection of the mode selector 401 is connected to the port VIN, and an output thereof is connected to an input VMOD of the buck-boost controller 403; two input ends of the substrate selector 402 are a port VOUT and a port BAT, respectively, and an output end VSUB is connected to an input end of the buck-boost controller 403; the 4 inputs of buck-boost controller 403 are port VOUT, port VMOD, port VSUB, and port BAT, respectively, and the two outputs are port VPG and port VNG, respectively.
In this embodiment, the substrate selector 402 has no relevance effect on the technical solution of the present utility model, and will not be described herein.
The principle of the utility model will be described with reference to fig. 3 with reference to fig. 2. In this embodiment, as shown in fig. 2, the buck-boost control module 202 includes a mode selector 401, and the mode selector 401 is configured to perform management selection of a power supply path according to an input voltage of the power supply port VIN. When VIN is more than or equal to V2, a synchronous buck circuit is formed in a circuit containing the energy storage inductor, the rechargeable battery is charged in a switching mode, and meanwhile, power supply energy is provided for the load; when V1 is less than or equal to VIN and less than V2, the synchronous buck circuit does not work, and the power port VIN only provides power supply energy for the load; when VIN is smaller than V1, a synchronous boosting loop is formed in a loop containing the energy storage inductor, the rechargeable battery is discharged, and power supply energy is provided for the load; wherein V1 is smaller than V2, the working voltage of the buck-boost control module and the load is V3, and V3 is larger than V2. When VIN is more than or equal to V4 or VIN is less than V1, the input high-voltage isolation module is used for isolating the power supply port VIN from the buck-boost control module and the output port VOUT; wherein V3 is less than V4.
Specifically, referring to fig. 3, fig. 3 is a schematic diagram illustrating power path management in an embodiment of the utility model. In this example, V1, V2, V3 and V4 are DC voltage values, and V1 < V2 < V3 < V4. As shown in fig. 3, V1 is 4.5 volts, V2 is 4.7 volts, V3 is 5 volts and V4 is 6.5 volts. That is, the operating voltage of the buck-boost control module and the load is v3=5 volts.
When the mode selector 401 detects that VIN is less than 4.5V or VIN is greater than 6.5V, the VREG output level of the power regulator 301 is 0, the output level of the charge pump 302 is not working, that is, the gate of the NMOS isolation tube 303 is at a low level, the NMOS isolation tube 303 is turned off, the port VIN is open-circuited with the port VOUT, and when the mode selector 401 detects that VIN is less than 4.5V or VIN is greater than 6.5V, the output signal VMOD makes the buck-boost controller 403 in the boost working mode, and the rechargeable battery 106 discharges to the load 108 through the energy storage inductor 104 and the buck-boost control module 202.
When the mode selector 401 detects that VIN is equal to or less than 4.5V and equal to or less than 6.5V, VREG output of the power regulator 301 is VIN (when VIN is equal to or less than 4.5V and equal to or less than 5V) or VREG output is 5V (when VIN is equal to or less than 5V and less than 6.5V), the output level of the charge pump 302 is 7V, namely, the grid electrode of the NMOS isolation tube 303 is 7V at high level, so that the NMOS isolation tube 303 is conducted, and the port VIN and the port VOUT are closed.
When the mode selector 401 detects that VIN is greater than or equal to 4.5V and less than or equal to 4.7V, the output signal VMOD enables the buck-boost controller 403 to be in a standby mode, the buck-boost control module 202 does not charge and discharge the rechargeable battery 106, and VIN directly provides power for VOUT through the NMOS isolation tube 303.
When the mode selector 401 detects that VIN is greater than or equal to 4.7V and less than or equal to 6.5V, the output signal VMOD enables the buck-boost controller 403 to be in a charging mode, VIN charges the rechargeable battery 106 through the NMOS isolation tube 303 and the buck-boost control module 202, and VIN directly provides power for VOUT through the NMOS isolation tube 303.
In summary, the utility model separates the input end from the step-up/step-down portion by using the source-drain high voltage resistant NMOS transistor, and accurately realizes the path management of the input end high voltage resistance and power supply conversion.
The foregoing description is only of the preferred embodiments of the present utility model, and the embodiments are not intended to limit the scope of the utility model, so that all changes made in the equivalent structures of the present utility model described in the specification and the drawings are included in the scope of the utility model.

Claims (8)

1. A step-up and step-down circuit for inputting high voltage resistance comprises a step-up and step-down control chip, an energy storage inductor, a rechargeable battery and a load; the buck-boost control chip is characterized by comprising an input high-voltage isolation module, a buck-boost control module, a power port VIN, an inductance port LX, a charging port BAT, an output port VOUT and a ground end GND;
wherein the port VIN receives a voltage of a power supply; the energy storage inductor is connected between the port LX and the port BAT, the positive electrode of the rechargeable battery is connected with the port BAT, the negative electrode of the rechargeable battery is connected with the ground end GND, and the load is connected between the VOUT port and the ground end GND;
the buck-boost control module comprises a mode selector, wherein the mode selector is used for performing management selection of a power supply path according to the input voltage of the power supply port VIN; when VIN is more than or equal to V2, a synchronous buck circuit is formed in a circuit containing the energy storage inductor, the rechargeable battery is charged in a switching mode, and meanwhile, power supply energy is provided for the load; when V1 is less than or equal to VIN and less than V2, the synchronous buck circuit does not work, and the power port VIN only provides power supply energy for the load; when VIN is smaller than V1, a synchronous boosting loop is formed in a loop containing the energy storage inductor, the rechargeable battery is discharged, and power supply energy is provided for the load; wherein V1 is smaller than V2, and the working voltage of the buck-boost control module and the load is V3, and V3 is larger than V2;
when VIN is greater than or equal to V4 or VIN is less than V1, the input high-voltage isolation module is used for isolating the power supply port VIN from the buck-boost control module and the output port VOUT, and V3 is less than V4.
2. The input high voltage tolerant buck-boost circuit of claim 1, wherein the high voltage isolation module includes an NMOS isolation tube, a power regulator, and a charge pump; wherein the drain electrode of the NMOS isolation tube is connected to the port VIN, the source electrode thereof is connected to the port VOUT, and the grid electrode thereof is connected to the output of the charge pump; the input of the power regulator is connected to port VIN, and its output is supplied as power to the charge pump; the input of the charge pump is connected to the output of the power regulator, and the output of the charge pump is connected to the gate of the NMOS isolation tube.
3. The input high voltage tolerant buck-boost circuit of claim 1, wherein the high voltage isolation module includes a power regulator, a gate clamp zener diode, a PMOS isolation tube, a first substrate switching diode, and a second substrate switching diode; wherein the source of the PMOS isolation tube is connected to the port VIN, the drain thereof is connected to the port VOUT, and the grid thereof is connected to the output node ENB of the power regulator; the input of the power regulator is connected to port VIN and its output is connected to output node ENB; the anode of the grid clamping zener diode is connected to the output node ENB, and the cathode of the grid clamping zener diode is connected to the source electrode of the PMOS isolation tube; the anode of the first substrate switching diode is connected to the port VIN, and the cathode of the first substrate switching diode is connected to the substrate of the PMOS isolation tube; the anode of the second substrate switching diode is connected to VOUT, and the cathode thereof is connected to the substrate of the PMOS isolation tube.
4. The input high voltage tolerant buck-boost circuit of claim 1, wherein said buck-boost control module includes a PMOS transistor, an NMOS transistor, a mode selector, a substrate selector, and a buck-boost controller; the source electrode of the PMOS tube is connected to VOUT, the drain electrode of the PMOS tube is connected to LX, and the grid electrode of the PMOS tube is connected to the VPG output end of the buck-boost controller; the source electrode of the NMOS tube is connected to the ground, the drain electrode of the NMOS tube is connected to LX, and the grid electrode of the NMOS tube is connected to the VNG output end of the buck-boost controller; the input connection end of the mode selector is connected to VIN, and the output end of the mode selector is connected to the input end VMOD of the buck-boost controller; the two input ends of the substrate selector are VOUT and BAT respectively, and the output end is VSUB which is connected to the input end of the buck-boost controller; the 4 inputs of the buck-boost controller are VOUT, VMOD, VSUB and BAT, respectively, and the two outputs are VPG and VNG, respectively.
5. The input high voltage tolerant buck-boost circuit of claim 1, wherein V1 is 4.5 volts, V2 is 4.7 volts, V3 is 5 volts and V4 is 6.5 volts.
6. The input high voltage tolerant buck-boost circuit of claim 1, further comprising an input capacitor, the first capacitor being coupled between the port VIN and ground GND.
7. The input high voltage tolerant buck-boost circuit of claim 1, further comprising a battery bypass capacitor, wherein said battery bypass capacitor is coupled between said rechargeable battery and ground GND.
8. The input high voltage tolerant buck-boost circuit of claim 1, further comprising an output capacitor coupled across the load.
CN202122599620.XU 2021-10-27 2021-10-27 Input high-voltage-resistant step-up and step-down circuit Active CN219041630U (en)

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CN202122599620.XU CN219041630U (en) 2021-10-27 2021-10-27 Input high-voltage-resistant step-up and step-down circuit

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