CN218867111U - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN218867111U
CN218867111U CN202222534803.8U CN202222534803U CN218867111U CN 218867111 U CN218867111 U CN 218867111U CN 202222534803 U CN202222534803 U CN 202222534803U CN 218867111 U CN218867111 U CN 218867111U
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routing
layer
display panel
group
wire
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Inventor
陈俊明
王小元
万彬
蒲巡
郭建东
吴忠山
刘艳
杨国栋
朱嫄媛
范志成
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BOE Technology Group Co Ltd
Chongqing BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chongqing BOE Optoelectronics Technology Co Ltd
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Abstract

The embodiment of the application provides a display panel and a display device. The display panel comprises a substrate, a first wiring layer and a second wiring layer; the first routing layer is positioned on one side of the substrate and comprises a plurality of first routing groups and connecting blocks, the first routing groups are distributed in the peripheral area of the substrate, the first routing groups extend along a first direction, and each first routing group comprises a plurality of first routing lines for transmitting the same signal; the second routing layer is positioned on one side of the first routing layer, which is far away from the substrate base plate, and comprises a plurality of second routing wires extending along a second direction, the second direction is intersected with the first direction, and the orthographic projection of each second routing wire on the first routing layer is intersected with the first routing wire; the connecting block is connected with at least two first wires in the first wire group, the connecting block is positioned at the position where the orthographic projection of the second wires on the first wire layer is intersected with the first wires, and the width of the connecting block in the first direction is larger than that of the second wires in the first direction.

Description

Display panel and display device
Technical Field
The present application relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
With the development of display technology and the increase of consumption level, the quality requirements of the display devices for customers are higher and higher.
In the related art, a PLG (protocol Link Gate) line and an electrostatic discharge line in a display panel are located at different layers, the PLG line and the electrostatic discharge line intersect in space, and a plurality of bridging corners exist between the PLG line and the electrostatic discharge line. When ESD (Electro-Static Discharge) occurs in the manufacturing process of the display panel, the film layer at the position of the cross-over corner is easily burned, and the burn at the position is gradually increased in the using and running process of the client, so that the metal signal line in the display panel is easily short-circuited, and the display panel has poor display, such as a black screen, thereby reducing the quality of the display panel.
SUMMERY OF THE UTILITY MODEL
An object of the present invention is to provide a display panel and a display device, so as to improve the quality of the display panel. The specific technical scheme is as follows:
an embodiment of a first aspect of the present application provides a display panel, where the display panel includes a substrate, a first routing layer, and a second routing layer; the first routing layer is positioned on one side of the substrate base plate and comprises a plurality of first routing groups, the plurality of first routing groups are distributed in the peripheral area of the substrate base plate and extend along a first direction, and each first routing group comprises a plurality of first routing lines for transmitting the same signal; the second routing layer is positioned on one side, away from the substrate base plate, of the first routing layer, and comprises a plurality of second routing lines extending along a second direction, the second direction is intersected with the first direction, and the orthographic projection of each second routing line on the first routing layer is intersected with the first routing line; the first routing layer further comprises a connecting block, the connecting block is connected with at least two first routing wires in the first routing group, the connecting block is located at a position where the orthographic projection of the second routing wires on the first routing layer is intersected with the first routing wires, and the width of the connecting block in the first direction is larger than that of the second routing wires in the first direction.
According to the display panel of the embodiment of the application, the probability that the metal signal lines in the display panel are easily short-circuited is reduced by arranging the connecting block, poor display of the display panel is improved, and the quality of the display panel is improved. Specifically, the second routing layer is located on one side of the first routing layer, which is far away from the substrate, the first routing layer comprises a plurality of first routing groups, the plurality of first routing groups extend along a first direction, each first routing group comprises a plurality of first routing lines for transmitting the same signal, the second routing layer comprises a plurality of second routing lines extending along a second direction, the first direction and the second direction are intersected, so that the orthographic projection of the second routing lines on the first routing layer is intersected with the first routing lines, one second routing line can form a plurality of cross-over corners with the plurality of first routing lines for transmitting the same signal in the first routing group, the connecting block is connected with at least two first routing lines in the first routing group, the connecting block is located at the position where the orthographic projection of the second routing lines on the first routing layers is intersected with the first routing lines, the width of the connecting block in the first direction is greater than the width of the second wiring in the first direction, therefore, the connecting block can fill the bridging corners formed between at least two first wirings in the first wiring group and the second wirings, thereby reducing the bridging corners formed by a plurality of first wirings for transmitting the same signal in one second wiring and the first wiring group, further reducing the number of the bridging corners formed between the second wirings and the first wirings in the whole display panel, further reducing the probability of burning of the insulating layer at the bridging corner position during electrostatic discharge, reducing the probability of short circuit of the metal signal lines in the display panel, reducing the probability of black screen generation of the display panel, improving the display defect of the display panel, and improving the quality of the display panel.
In addition, the display panel according to the embodiment of the present application may further have the following technical features:
in some embodiments of the present application, the display panel further includes an insulating layer disposed between the first routing layer and the second routing layer.
In some embodiments of the present application, the plurality of first routing groups are distributed at intervals along a second direction, the plurality of second routing groups are distributed at intervals along a first direction, lengths of the plurality of second routing groups gradually increase in the first direction, a first end of each of the plurality of second routing groups is connected to one of the plurality of first routing groups through a first via, and the first via penetrates through the insulating layer.
In some embodiments of the present application, an orthographic projection of a first end of each of the second traces on the insulating layer covers the first via, and a width of the first end in the first direction is smaller than a width of the connection block in the first direction.
In some embodiments of the present application, the number of the first vias connecting the first wire group and the second wire is at least one.
In some embodiments of the present application, the display panel further includes a thin film transistor disposed in the display region of the substrate, the thin film transistor includes a gate electrode, an active layer, a source electrode, and a drain electrode, the first routing layer is disposed on the same layer as the gate electrode, and the second routing layer is disposed on the same layer as the source electrode and the drain electrode.
In some embodiments of the present application, the display panel further includes an electrostatic discharge unit, the peripheral area includes a first area, the electrostatic discharge unit is located in the first area, and a second end of each of the second wires is connected to one of the electrostatic discharge units.
In some embodiments of the present application, the display panel further includes a third routing layer and a fourth routing layer, and both the third routing layer and the fourth routing layer are disposed on the same layer as the second routing layer; the third routing layer and the fourth routing layer are distributed on two sides of the second routing layer; the third routing layer comprises a plurality of third routing groups extending along the first direction, and each third routing group comprises a plurality of third routings for transmitting the same signal; the fourth routing layer comprises a plurality of fourth routing groups extending along a first direction, and each fourth routing group comprises a plurality of fourth routings for transmitting the same signal; each third wire group and each fourth wire group are respectively connected with the same first wire group through a second via hole and a third via hole, and the second via hole and the third via hole penetrate through the insulating layer.
In some embodiments of the present application, the display panel further includes a GOA circuit and a flexible circuit board, the peripheral region further includes a second region and a third region, the GOA circuit is located in the second region, the flexible circuit board is located in the third region, the first wire group and the third wire group are connected to the GOA circuit, and the first wire group and the fourth wire group are connected to the flexible circuit board.
In some embodiments of the present application, the first trace, the third trace and the fourth trace are all PLG traces, and the second trace is an electrostatic discharge trace.
In some embodiments of the present application, the number of the second vias connecting the first wire group and the third wire group is at least one, and the number of the third vias connecting the first wire group and the fourth wire group is at least one.
Embodiments of a second aspect of the present application propose a display device comprising the display panel in embodiments of the first aspect.
According to the display device of the embodiment of the application, the display panel that it contains includes the connecting block, the connecting block can fill the bridging corner that forms between at least two first lines and the second line of walking in the first line group, thereby the bridging corner that a plurality of first lines that can reduce a second and walk the same signal in line group and the first line formed, and then can reduce the second in the whole display panel and walk the quantity of bridging corner that forms between line and the first line, then reduce the probability that the insulating layer of bridging corner position department takes place the burn when static electricity releases, reduce the probability that the metal signal line in the display panel takes place the short circuit, reduce the probability that the display panel takes place the black screen, improve the display badness of display panel, improve the quality of display panel, and then improve display device's quality.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art according to the drawings.
FIG. 1 is a schematic top view of a display panel according to some embodiments of the present disclosure;
FIG. 2 is an enlarged partial view of FIG. 1 at A;
FIG. 3 is an enlarged partial schematic view of FIG. 2;
FIG. 4 is a cross-sectional view at C-C of FIG. 2;
FIG. 5 is a cross-sectional view taken at D-D of FIG. 3;
fig. 6 is a schematic distribution diagram of the first routing group and the second routing group when no connection block is arranged;
fig. 7 is a schematic distribution diagram of connection blocks, first routing groups and second routing in some embodiments of the present application.
Description of the reference numerals:
10-a display panel;
100-a substrate base; 110 — peripheral region; 120-a display area;
111 — first region; 112 — a second region; 113 — third zone;
200-a first routing layer; 210 — a first wire group; 211 — a first trace; 220-connecting block;
300-a second routing layer; 310-a second trace;
400-an insulating layer; 410 — a first via; 420 — a second via; 430-third via;
500-third routing layer; 510 — a third wire group; 511 — a third trace;
600-a fourth routing layer; 610-a fourth wire group; 611 — fourth routing;
700 — a first overlap region; 800-second overlap region.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application are within the scope of protection of the present application.
It is to be understood that the terminology used herein is for the purpose of describing particular example embodiments only, and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises," "comprising," "includes," "including," and "having" are inclusive and therefore specify the presence of stated features, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order described or illustrated, unless specifically identified as an order of performance. It should also be understood that additional or alternative steps may be used.
Although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region, layer or section from another region, layer or section. Terms such as "first," "second," and other numerical terms when used herein do not imply a sequence or order unless clearly indicated by the context. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the example embodiments.
For convenience of description, spatially relative terms, such as "inner", "outer", "lower", "below", "upper", "above", and the like, may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. This spatially relative term is intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" or "over" the other elements or features. Thus, the example term "below … …" may include both an up and down orientation. The device may be otherwise oriented, such as rotated 90 degrees or at other orientations, and the spatially relative descriptors used herein interpreted accordingly.
It is noted that in the drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. Also, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or layer or intervening layers may also be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element or intervening layers or elements may also be present. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or more than one intermediate layer or element may also be present. Like reference numerals refer to like elements throughout.
In order to improve the quality of the display panel, embodiments of the present application provide a display panel and a display device, and the display panel and the display device provided in the embodiments of the present application will be described in detail with reference to the accompanying drawings. The Display panel may be an LCD (Liquid Crystal Display), an electroluminescent Display panel, or a photoluminescent Display panel. In the case where the display panel is an electroluminescent display panel, the electroluminescent display panel may be an OLED (Organic Light-Emitting Diode) or a QLED (Quantum Dot Light-Emitting Diode). In case the display panel is a photoluminescent display panel, the photoluminescent display panel may be a quantum dot photoluminescent display panel.
As shown in fig. 1 to 4, an embodiment of the first aspect of the present application provides a display panel 10, where the display panel 10 includes a substrate 100, a first routing layer 200, and a second routing layer 300. Specifically, the first routing layer 200 is located on one side of the substrate base plate 100, the first routing layer 200 includes a plurality of first routing groups 210, the plurality of first routing groups 210 are distributed in the peripheral area 110 of the substrate base plate 100, the plurality of first routing groups 210 extend along a first direction, and each first routing group 210 includes a plurality of first routing lines 211 for transmitting the same signal; the second routing layer 300 is located on a side of the first routing layer 200 away from the substrate 100, the second routing layer 300 includes a plurality of second traces 310 extending along a second direction, the second direction intersects with the first direction, and an orthographic projection of each second trace 310 on the first routing layer 200 intersects with the first trace 211; the first routing layer 200 further includes a connection block 220, the connection block 220 connects at least two first traces 211 in the first routing group 210, the connection block 220 is located at a position where an orthographic projection of the second trace 310 on the first routing layer 200 intersects with the first traces 211, and a width of the connection block 220 in the first direction is greater than a width of the second trace 310 in the first direction.
Note that the substrate base board 100 is divided into a display area 120 and a peripheral area 110 surrounding the display area 120. As indicated at B in fig. 3, "the second trace 310 is located at a position where the orthographic projection of the first trace layer 200 intersects with the first trace 211", and the intersecting position may include: an overlapping area of an orthographic projection of one second trace 310 on the first trace layer 200 and one first trace 211 and a ring-shaped area around the overlapping area, a circle center of the ring-shaped area coincides with a center of the overlapping area, and the ring-shaped area covers a gap between two adjacent first traces 211.
According to the display panel 10 of the embodiment of the application, the connection block 220 is arranged to reduce the probability that the metal signal lines in the display panel 10 are easy to be short-circuited, improve the display defects of the display panel 10 and improve the quality of the display panel 10. Specifically, the second routing layer 300 is located on a side of the first routing layer 200 away from the substrate 100, the first routing layer 200 includes a plurality of first routing groups 210, the plurality of first routing groups 210 extend along a first direction, each of the first routing groups 210 includes a plurality of first routing lines 211 transmitting a same signal, the second routing layer 300 includes a plurality of second routing lines 310 extending along a second direction, the first direction and the second direction intersect, so that an orthographic projection of the second routing lines 310 on the first routing layer 200 intersects with the first routing lines 211, one of the second routing lines 310 may form a plurality of cross corners with the plurality of first routing lines 211 transmitting a same signal in the first routing groups 210, such that the connection block 220 connects at least two first routing lines 211 in the first routing groups 210, the connection block 220 is located at a position where the orthographic projection of the second routing lines 310 on the first routing layers 200 intersects with the first routing lines 211, as shown in fig. 5 to fig. 7, the width of the connection block 220 in the first direction is greater than the width of the second trace 310 in the first direction, so that the connection block 220 may fill the cross-over corners formed between at least two first traces 211 and the second trace 310 in the first trace group 210, thereby reducing the cross-over corners formed by one second trace 310 and a plurality of first traces 211 transmitting the same signal in the first trace group 210, further reducing the number of cross-over corners formed between the first trace 211 and the second trace 310 in the entire display panel 10, further reducing the probability of burning of the insulating layer at the cross-over corner position during electrostatic discharge, reducing the probability of short-circuiting of the metal signal lines in the display panel 10, reducing the probability of black screen occurrence in the display panel 10, improving the display defect of the display panel 10, and improving the quality of the display panel 10.
Further, the widths of all the first wires 211 in the same first wire group 210 along the second direction are the same, and the widths of the first wires 211 in different first wire groups 210 along the second direction may be different, so that the line width of the first wires 211 of some groups may be set smaller according to actual requirements, thereby reducing the area occupied by the first wires 211, saving space, and facilitating the implementation of the narrow frame design of the display panel 10.
As shown in fig. 6 and 7, in some embodiments of the present application, the first routing group 210 may include three first traces 211, the connection block 220 connects the three first traces 211 in the first routing group 210, the connection block 220 is disposed at a position where an orthographic projection of the second trace 310 on the first routing layer 200 intersects the first trace 211, and a width of the connection block 220 in the first direction is greater than a width of the second trace 310 in the first direction. The first traces 211 extend along a first direction, the second traces 310 extend along a second direction, the first direction intersects with the second direction, and one second trace 310 and three first traces can form 12 crossoversCorner (1 to (1) in FIG. 6)
Figure BDA0003862018680000071
) Connecting block 220 is connected to three first traces 211 in the first trace group 210, the connecting block 220 is disposed at a position where an orthographic projection of the second trace 310 on the first trace layer 200 intersects with the first trace 211, and a width of the connecting block 220 in the first direction is greater than a width of the second trace 310 in the first direction, so that the connecting block 220 can fill 8 bridging corners formed between the three first traces 211 in the first trace group 210 and one second trace 310, thereby reducing the number of the bridging corners formed by one second trace 310 and the three first traces 211 transmitting the same signal in the first trace group 210 from 12 to 4 (1) (2) in fig. 7)>
Figure BDA0003862018680000072
) And then, the probability of burning of the insulating layer at the position of the cross-over corner during electrostatic discharge is reduced, the probability of short circuit of the metal signal line in the display panel 10 is reduced, the probability of black screen generation of the display panel 10 is reduced, the display defect of the display panel 10 is improved, and the quality of the display panel 10 is improved.
In some embodiments of the present application, as shown in fig. 4, the display panel 10 further includes an insulating layer 400, and the insulating layer 400 is disposed between the first routing layer 200 and the second routing layer 300. The first routing layer 200 and the second routing layer 300 are metal layers, and the insulation layer 400 separates the first routing layer 200 from the second routing layer 300, so that interference between the first routing layer 200 and the second routing layer 300 can be avoided.
In some embodiments of the present application, as shown in fig. 1 to 3, the plurality of first routing lines 210 are distributed at intervals along the second direction, the plurality of second routing lines 310 are distributed at intervals along the first direction, lengths of the plurality of second routing lines 310 gradually increase in the first direction, a first end of each second routing line 310 is connected to one first routing line 210 through a first via 410, and the first via 410 penetrates through the insulating layer 400. The first wire 211 may be a PLG wire, the second wire 310 may be an electrostatic discharge wire, the display panel 10 may be rectangular, the display panel 10 may include a data signal output side (DP, data pad), a data signal output side opposite side (DPO, data pad), a gate signal output left side (GPL, gate pad left), and a gate signal output right side (GPR, gate pad left), the PLG wire and the electrostatic discharge wire are generally disposed at a DP connector, that is, corners of the DP side and the GPL side and corners of the DP side and the GPR side, and a shape of the display panel 10 at the corners is generally set to be a circular arc. The lengths of the plurality of second wires 310 are gradually increased in the first direction, and the first end of each second wire 310 is connected to one first wire group 210 through the first via 410, so that the distribution of the connection positions of the second wires 310 and the first wire group 210 can be adapted to the shape of the corner of the display panel 10, which is beneficial to the appearance design of the display panel 10.
In some embodiments of the present application, as shown in fig. 2 and 3, an orthographic projection of the first end of each second trace 310 on the insulating layer 400 covers the first via 410, and a width of the first end in the first direction is smaller than a width of the connection block 220 in the first direction. By such arrangement, the first end of the second trace 310 can be better connected with the first trace 211, so that the first trace 211 and the second trace 310 can be reliably connected, and disconnection caused by poor contact can be prevented; and the width of the first end of the second trace 310 in the first direction is smaller than the width of the connection block 220 in the first direction, so that the bridging corner formed by the first end of the second trace 310 and the first trace 211 can be avoided, the bridging corner formed between the second trace 310 and the first trace 211 is reduced, and the probability of burning of the insulating layer at the bridging corner during electrostatic discharge is reduced.
In some embodiments of the present application, as shown in fig. 2 and fig. 3, the number of the first vias 410 connecting the first wire group 210 and the second wire 310 may be one, and the connection between the first wire group 210 and the second wire 310 can be satisfied by setting one first via 410; of course, the number of the first vias 410 may be multiple, and each via 410 may be distributed between two adjacent first traces 211 in the first trace group 210, so as to facilitate the connection operation and increase the connection reliability.
In some embodiments of the present disclosure, the display panel 10 further includes a thin film transistor disposed in the display region 120 of the substrate 100, the thin film transistor including a gate electrode, an active layer, a source electrode, and a drain electrode, the first routing layer 200 disposed in the same layer as the gate electrode, and the second routing layer 300 disposed in the same layer as the source electrode and the drain electrode.
Specifically, the thin film transistor may be a bottom gate type, the gate electrode is disposed on the substrate base plate 100, the gate electrode and the substrate base plate 100 are covered with the insulating layer 400, the active layer is disposed on one side of the insulating layer 400 away from the substrate base plate 100, and the source electrode and the drain electrode are located on both sides of the active layer and are in contact with the active layer. It should be understood that the thin film transistor may also be a top gate type, with the gate electrode disposed on the side of the active layer away from the base substrate 100.
In some embodiments of the present application, as shown in fig. 1, the display panel 10 further includes an electrostatic discharge unit, the peripheral region 110 includes a first region 111, the electrostatic discharge unit is located in the first region 111, and a second end of each of the second traces 310 is connected to an electrostatic discharge unit. ESD generally refers to a phenomenon in which a dielectric is broken down to discharge after the energy of an electrostatic field reaches a certain level. ESD typically damages the interface device to which it is connected, and in another case, devices subjected to ESD shock may not be damaged immediately, but rather performance degradation leads to premature product failure. The static electricity discharging unit is arranged to lead out static electricity in the display panel 10, and has a protective effect on the display panel 10.
In some embodiments of the present application, as shown in fig. 2 to 5, the display panel 10 further includes a third routing layer 500 and a fourth routing layer 600, and both the third routing layer 500 and the fourth routing layer 600 are disposed at the same layer as the second routing layer 300; the third routing layer 500 and the fourth routing layer 600 are distributed on both sides of the second routing layer 300; the third routing layer 500 includes a plurality of third routing groups 510 extending along the first direction, each third routing group 510 includes a plurality of third routing 511 for transmitting the same signal; the fourth routing layer 600 includes a plurality of fourth routing groups 610 extending along the first direction, each fourth routing group 610 includes a plurality of fourth routing 611 transmitting the same signal; each third wire group 510 and each fourth wire group 610 are respectively connected with the same first wire group 210 through a second via 420 and a third via 430, and both the second via 420 and the third via 430 penetrate through the insulating layer 400. Thus, the first wire group 210 and the third wire group 510 and the fourth wire group 610 connected thereto transmit the same signal at the same time, which can reduce the resistance and facilitate signal transmission.
In some embodiments, as shown in fig. 2 and 3, an orthographic projection of one third trace 511 of the third wire group 510 on the first wire layer 200 partially overlaps one first trace 211 of the first wire group 210, so that a first overlap region 700 is formed between the third wire group 510 and the first wire group 210, an orthographic projection of one fourth trace 611 of the fourth wire group 610 on the first wire layer 200 partially overlaps one first trace 211 of the first wire group 210, so that a second overlap region 800 is formed between the third wire group 510 and the first wire group 210, the second via 420 is located in the first overlap region 700, and the third via 430 is located in the second overlap region 800, thereby facilitating connection between each third wire group 510 and each fourth wire group 610 and the same first wire group 210.
In some embodiments of the present application, as shown in fig. 1, the display panel 10 further includes a GOA circuit and a flexible circuit board, the peripheral region 110 further includes a second region 112 and a third region 113, the GOA circuit is located in the second region 112, the flexible circuit board is located in the third region 113, the first routing group 210 and the third routing group 510 are connected to the GOA circuit, and the first routing group 210 and the fourth routing group 610 are connected to the flexible circuit board. The GOA (Gate Driver On Array) Circuit is an Integrated Gate driving Circuit, the flexible Circuit board is usually connected to an IC (data Integrated Circuit), and the GOA Circuit receives signals of the IC through the first wire set 210, the third wire set 510, and the fourth wire set 610, so that resistance can be reduced, and signal transmission is facilitated.
In some embodiments of the present application, the first trace 211, the third trace 511 and the fourth trace 611 are all PLG traces, and the second trace 310 is an electrostatic discharge trace.
In some embodiments of the present application, as shown in fig. 4, the number of the second vias 420 connecting the first routing group 210 and the third routing group 510 is at least one, and the number of the third vias 430 connecting the first routing group 210 and the fourth routing group 610 is at least one. The connection between the first routing group 210 and the third routing group 510 and the connection between the first routing group 210 and the fourth routing group 610 can be satisfied by arranging one second via 420 and one third via 430, and the connection reliability can be increased and the connection operation is facilitated by arranging a plurality of second vias 420 and third vias 430.
Embodiments of the second aspect of the present application propose a display device comprising the display panel 10 of the embodiments of the first aspect.
According to the display device of the embodiment of the application, the display panel 10 included therein includes the connection block 220, the connection block 220 may fill the bridging corners formed between the at least two first wires 211 and the second wires 310 in the first wire group 210, so as to reduce the bridging corners formed by the one second wire 310 and the plurality of first wires 211 transmitting the same signal in the first wire group 210, and further reduce the number of the bridging corners formed between the second wires 310 and the first wires 211 in the whole display panel 10, and further reduce the probability of burning of the insulating layer at the bridging corner position during electrostatic discharge, and reduce the probability of short circuit of the metal signal lines in the display panel 10, and reduce the probability of black screen generation of the display panel 10, thereby improving the display defect of the display panel 10, improving the quality of the display panel 10, and further improving the quality of the display device.
The above description is only for the preferred embodiment of the present application, and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application are included in the protection scope of the present application.

Claims (12)

1. A display panel, comprising:
a substrate base plate;
the first routing layer is positioned on one side of the substrate and comprises a plurality of first routing groups, the plurality of first routing groups are distributed in the peripheral area of the substrate, the plurality of first routing groups extend along a first direction, and each first routing group comprises a plurality of first routings for transmitting the same signal;
the second routing layer is positioned on one side, away from the substrate base plate, of the first routing layer and comprises a plurality of second routing wires extending along a second direction, the second direction is intersected with the first direction, and the orthographic projection of each second routing wire on the first routing layer is intersected with the first routing wire;
the first routing layer further comprises a connecting block, the connecting block is connected with at least two first routing wires in the first routing group, the connecting block is located at a position where the orthographic projection of the second routing wires on the first routing layer is intersected with the first routing wires, and the width of the connecting block in the first direction is larger than that of the second routing wires in the first direction.
2. The display panel according to claim 1,
the display panel further comprises an insulating layer, and the insulating layer is arranged between the first routing layer and the second routing layer.
3. The display panel according to claim 2,
the plurality of first routing groups are distributed at intervals along a second direction, the plurality of second routing groups are distributed at intervals along a first direction, the lengths of the plurality of second routing groups are gradually increased along the first direction, a first end of each second routing group is connected with one first routing group through a first via hole, and the first via holes penetrate through the insulating layer.
4. The display panel according to claim 3,
the first end of each second wire covers the first via hole in the orthographic projection of the insulating layer, and the width of the first end in the first direction is smaller than that of the connecting block in the first direction.
5. The display panel according to claim 3 or 4,
the number of the first via holes for connecting the first routing line group and the second routing line is at least one.
6. The display panel according to claim 1,
the display panel further comprises a thin film transistor, the thin film transistor is arranged in the display area of the substrate base plate and comprises a grid electrode, an active layer, a source electrode and a drain electrode, the first wiring layer and the grid electrode are arranged on the same layer, and the second wiring layer and the source electrode and the drain electrode are arranged on the same layer.
7. The display panel according to claim 3,
the display panel further comprises an electrostatic discharge unit, the peripheral area comprises a first area, the electrostatic discharge unit is located in the first area, and the second end of each second wire is connected with one electrostatic discharge unit.
8. The display panel according to claim 2,
the display panel also comprises a third routing layer and a fourth routing layer, and the third routing layer and the fourth routing layer are arranged on the same layer as the second routing layer; the third routing layer and the fourth routing layer are distributed on two sides of the second routing layer;
the third routing layer comprises a plurality of third routing groups extending along the first direction, and each third routing group comprises a plurality of third routings for transmitting the same signal; the fourth routing layer comprises a plurality of fourth routing groups extending along the first direction, and each fourth routing group comprises a plurality of fourth routings for transmitting the same signal; each third wire group and each fourth wire group are respectively connected with the same first wire group through a second via hole and a third via hole, and the second via hole and the third via hole penetrate through the insulating layer.
9. The display panel according to claim 8,
the display panel further comprises a GOA circuit and a flexible circuit board, the peripheral area further comprises a second area and a third area, the GOA circuit is located in the second area, the flexible circuit board is located in the third area, the first wire group and the third wire group are connected with the GOA circuit, and the first wire group and the fourth wire group are connected with the flexible circuit board.
10. The display panel according to claim 8,
the first wire, the third wire and the fourth wire are all PLG wires, and the second wire is an electrostatic discharge wire.
11. The display panel according to claim 8,
the number of the second via holes connecting the first routing group and the third routing group is at least one, and the number of the third via holes connecting the first routing group and the fourth routing group is at least one.
12. A display device characterized by comprising the display panel according to any one of claims 1 to 11.
CN202222534803.8U 2022-09-23 2022-09-23 Display panel and display device Active CN218867111U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202222534803.8U CN218867111U (en) 2022-09-23 2022-09-23 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202222534803.8U CN218867111U (en) 2022-09-23 2022-09-23 Display panel and display device

Publications (1)

Publication Number Publication Date
CN218867111U true CN218867111U (en) 2023-04-14

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202222534803.8U Active CN218867111U (en) 2022-09-23 2022-09-23 Display panel and display device

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Country Link
CN (1) CN218867111U (en)

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