CN218850785U - Network data isolation encryption system - Google Patents
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Abstract
The utility model discloses a network data keeps apart encryption system, relate to information security technical field, this system includes outer net computer and network isolation encryption board, network isolation encryption board is used for realizing the KVM function, network isolation and transmission data's encryption and decryption, network isolation encryption board includes the intranet computer, general processor chip, the FPGA chip, the high speed switch chip, the video chip, the network chip, USB changes network chip, USB extension chip and power chip, general processor chip, the high speed switch chip, the video chip, the network chip, USB changes network chip, power chip is connected with the FPGA chip, USB extension chip changes network chip with USB and is connected. According to the method, the intranet computer exists in the network isolation encryption board, so that risks of information leakage, information stealing and the like in the information transmission process between part of components in the network isolation encryption board and the intranet computer are effectively avoided; the method and the device can realize network isolation, data transmission encryption and decryption and KVM functions.
Description
Technical Field
The utility model relates to an information security technical field, concretely relates to network data keeps apart encryption system.
Background
The information security refers to the technology and management security protection adopted by a data processing system, computer hardware, software and data are protected from being damaged, changed and leaked due to accidental or malicious reasons, the system continuously, reliably and normally operates, information service is not interrupted, and finally service continuity is achieved.
The risks faced by information security mainly include computer virus threats, hacking attacks, security risks of information transfer and problems of identity authentication and access control. The computer virus is a program which can damage the normal work of a computer system and is very deep and easy to propagate, and can cause huge damage and loss which cannot be estimated; hacker attack means that bugs and defects in aspects of a computer system, a network protocol, a database and the like are utilized, a backdoor program, an information bomb, denial of service, network monitoring, password cracking and other means are adopted to invade the computer system, system secret information is stolen, and information is destroyed or system resources are occupied; the safety risk of information transmission comprises information interception by an illegal user, illegal tampering and illegal and fake legal identity; the problems of identity authentication and access control include too simple authority control and ineffective guarantee of account management and security.
The confidentiality, the integrity, the availability and the controllability of the information can be well guaranteed through a network isolation technology and a data encryption technology. The network isolation technology is used for realizing information exchange and resource sharing on the basis of disconnection of two or more computers or networks, is the best network security technology at present, and eliminates security threats based on networks and protocols; the data encryption technology is that a message is converted into a meaningless ciphertext through an encryption key and an encryption function, and a receiving party restores the ciphertext into a plaintext through a decryption function and a decryption key, and is a fundamental stone of the network security technology.
In the prior art, a network isolation encryption system (202222331306.8) with a KVM function adopts a hardware mode to realize network isolation, data transmission encryption and decryption and the KVM function, the hardware mode has no complicated operating system like software, and related information such as an algorithm cannot be called through an instruction, and important information cannot be intercepted by trojan viruses and the like. Although the technology has many advantages, because the intranet and the network isolation encryption board are not integrated, the risk of information leakage, stealing, attack and the like still exists in the information transmission process between the network isolation encryption board and the intranet.
SUMMERY OF THE UTILITY MODEL
Utility model purpose: the utility model aims at providing a network data keeps apart encryption system has solved the information that exists among the information transfer process between current network isolation encryption board and the intranet and has revealed, steal the scheduling problem. The intranet computer exists in the network isolation encryption board, so that the risks of information leakage, stealing and the like in the information transmission process between part of components in the network isolation encryption board and the intranet computer are effectively avoided; based on the fact that the intranet computer exists in the network isolation encryption board and a hardware mode, the network isolation, data transmission encryption and decryption and KVM functions are achieved.
The technical scheme is as follows: a network data isolation encryption system comprises an external network computer and a network isolation encryption board, wherein the network isolation encryption board comprises an internal network computer which performs data transmission with the external network computer;
the network isolation encryption board is used for realizing KVM function, network isolation and encryption and decryption of transmitted data;
the network isolation encryption board further comprises a general processor chip, an FPGA chip, a high-speed switch chip, a video chip, a network chip, a USB-to-network chip, a USB expansion chip and a power supply chip, wherein the general processor chip, the high-speed switch chip, the video chip, the network chip, the USB-to-network chip and the power supply chip are connected with the FPGA chip, and the USB expansion chip is connected with the USB-to-network chip;
the general processor chip is used for encrypting and decrypting transmission data;
the FPGA chip is used for state control of the high-speed switch chip, state control of the power supply chip, data isolation filtering and transmission and video data encoding and decoding;
the high-speed switch chip is used for switching signal transmission channels;
the power supply chip is used for power supply management of the network isolation encryption board;
the video chip is used for encoding and decoding video signals;
the network chip is used for converting network signals;
the USB-to-network chip is used for converting the USB protocol standard signal and the Ethernet protocol standard signal;
the USB expansion chip is used for expanding one USB interface into a plurality of USB interfaces.
Further, the video chip includes intranet video chip and outer net video chip, intranet video chip with FPGA chip, intranet computer are connected, the encryption board is kept apart to the network still includes outer net computer video interface, outer net video chip with FPGA chip, outer net computer video interface connection, outer net computer with outer net computer video interface connection.
Furthermore, the network isolation encryption board further comprises a user video interface for connecting video equipment, and the user video interface is connected with the FPGA chip.
Further, the network chip is connected with the intranet computer.
Furthermore, the network isolation encryption board further comprises a first USB interface and a second USB interface, the extranet computer is connected with the first USB interface, and the USB expansion chip is connected with the first USB interface and the second USB interface.
Further, the high-speed switch chip includes a first high-speed switch chip, a second high-speed switch chip, and a third high-speed switch chip.
Further, the network isolation encryption board further comprises a mouse interface for connecting a mouse and a keyboard interface for connecting a keyboard, the mouse interface and the keyboard interface are connected with the first high-speed switch chip, and the first high-speed switch chip is connected with the intranet computer and the USB expansion chip.
Further, the network isolation encryption board further comprises a camera interface for connecting a camera, the camera interface is connected with the second high-speed switch chip, and the second high-speed switch chip is connected with the intranet computer and the USB expansion chip.
Furthermore, the network isolation encryption board further comprises an outer network computer audio interface and a user audio interface for audio equipment connection, the user audio interface is connected with the third high-speed switch chip, the third high-speed switch chip is connected with the inner network computer and the outer network computer audio interface, and the outer network computer is connected with the outer network computer audio interface.
Furthermore, the network isolation encryption board further comprises a power supply key, and the power supply key is connected with the power supply chip.
Furthermore, the network isolation encryption board further comprises a KVM switch key, and the KVM switch key is connected with the FPGA chip.
Further, the general processor chip adopts an X86 chip or an ARM chip.
The utility model has the advantages that:
1. according to the method, the intranet computer exists in the network isolation encryption board, so that risks of information leakage, information stealing and the like in the information transmission process between part of components in the network isolation encryption board and the intranet computer are effectively avoided;
2. the method realizes the functions of network isolation, data transmission encryption and decryption and KVM (keyboard video mouse) based on the fact that an intranet computer exists in a network isolation encryption board and a hardware mode;
3. according to the method, a plurality of functions are realized based on a hardware mode, the hardware mode does not have an operating system which is as complicated as software, related information such as an algorithm cannot be called through instructions, and important information cannot be intercepted by Trojan horse viruses and the like;
4. according to the application, the network isolation, the data transmission encryption and decryption and the KVM function are integrated, so that the multifunctional performance is realized, and the problems of complex connecting line, high cost, difficult environment building, compatibility among equipment and the like in the realization of the functions in real products are solved;
5. according to the application, the switching of peripheral equipment such as a mouse and a keyboard can be realized between the intranet computer and the extranet computer, and the quantity of peripheral equipment required by the intranet computer and the extranet computer is reduced.
Drawings
Fig. 1 is the utility model relates to a network data isolation encryption system schematic diagram.
Detailed Description
The invention will be further described with reference to the following figures and examples:
as shown in fig. 1, a network data isolation encryption system includes an external network computer and a network isolation encryption board, where the network isolation encryption board includes an intranet computer, and the intranet computer of the present application is present in the network isolation encryption board, so that risks of information leakage, theft, and the like in an information transfer process between a part of components in the network isolation encryption board and the intranet computer can be effectively avoided, and meanwhile, based on the existence of the intranet computer in the network isolation encryption board and a hardware manner, functions of network isolation, data transmission encryption and decryption, and KVM are realized.
Data transmission is carried out between the outer network computer and the inner network computer;
the network isolation encryption board is used for realizing KVM function, network isolation and encryption and decryption of transmission data.
The outer net computer is provided with a net port and is connected with the internet through the net port, and the inner net computer receives and transmits network data and needs a network isolation encryption board and the outer net computer. The network data sent to the intranet computer is received by the extranet computer firstly and then sent to the network isolation encryption board by the extranet computer, and a component used for processing the network data in the network isolation encryption board analyzes and filters the network data sent by the extranet computer, decrypts the network data which accords with the security policy, and then sends the decrypted network data to the intranet computer in the network isolation encryption board. The network data of the intranet computer is sent outwards, the network data can be sent to the parts used for processing the network data in the network isolation encryption board, the parts complete analysis and filtration of the data to be sent, the network data meeting the security policy is encrypted and then sent to the extranet computer, and the network data is sent to the internet through the extranet computer. The utility model discloses network isolation security policy, data encryption and decryption algorithm on the network isolation encryption board are disposed in advance.
The network isolation security strategy is pre-configured on an FPGA chip in the network isolation encryption board, and the data encryption and decryption algorithm is pre-configured on a general processor chip in the network isolation encryption board, such as an X86 chip and an ARM chip. When the intranet computer sends data, the FPGA chip in the network isolation encryption board can keep apart data, filter, then resend to general processor chip, general processor chip can encrypt the data that accords with the security policy, the data after the encryption can resend to the FPGA chip, send the outer net computer again at last, send to the internet through the outer net computer, the data that send to the internet is the ciphertext data after the encryption. After a communication opposite-end user receives data, the received data can be sent to a network isolation encryption board of an opposite end by an opposite-end external network computer, an FPGA chip in the network isolation board of the opposite end can isolate and filter the data and then send the data to a general processor chip, the general processor chip can decrypt the data which accord with a safety strategy, the decrypted data can be sent to the FPGA chip again, and finally the data is sent to an internal network computer in the network isolation encryption board to finish communication. Because the data sent by the intranet computer is finally transmitted on the internet in a ciphertext form, the effective information cannot be obtained even if the data is intercepted by an illegal user.
The network isolation encryption board can be externally connected with peripheral equipment such as a mouse, a keyboard, audio equipment, video equipment, a camera and the like.
As shown in fig. 1, the network isolation encryption board further includes a general processor chip, an FPGA chip, a high-speed switch chip, a video chip, a network chip, a USB network-to-network chip, a USB expansion chip and a power chip, wherein the general processor chip, the high-speed switch chip, the video chip, the network chip, the USB network-to-network chip and the power chip are connected to the FPGA chip, and the USB expansion chip is connected to the USB network-to-network chip;
the general processor chip is used for encrypting and decrypting transmitted data, the general processor chip can adopt an X86 chip and an ARM chip, the X86 chip can adopt an Intel I5 chip, and the ARM chip can adopt an RK3399 chip.
The FPGA chip is used for state control of the high-speed switch chip, state control of the power supply chip, data isolation filtering and transmission and video data encoding and decoding, and can adopt a ZYNQ7020 chip;
the high-speed switch chip is used for switching signal transmission channels;
the power supply chip is used for power supply management of various chips such as a general processor chip, an FPGA chip, a high-speed switch chip, a USB-to-network chip, a USB expansion chip, a video chip and a network chip in the network isolation encryption board, and can adopt a TMI3244 chip;
the video chip is used for encoding and decoding video signals, and an ADV7611 chip can be adopted as the video chip;
the network chip is used for protocol conversion of a network signal physical layer, and the network chip can adopt an RTL8211 chip;
the USB-to-network chip is used for converting the USB protocol standard signal and the Ethernet protocol standard signal, and can adopt an RTL8153 chip;
the USB expansion chip is used for expanding one USB interface into a plurality of USB interfaces, and the USB expansion chip is a USB3.0 expansion chip and can adopt an F2.1 chip.
As shown in fig. 1, the video chip includes an intranet video chip and an extranet video chip, the intranet video chip is connected with the FPGA chip and the intranet computer, the network isolation encryption board further includes an extranet computer video interface, the extranet video chip is connected with the FPGA chip and the extranet computer video interface, the extranet computer is connected with the extranet computer video interface, the network isolation encryption board further includes a user video interface for connecting video equipment, the user video interface is connected with the FPGA chip, and the FPGA chip is connected with the KVM switch key.
The user video interface is connected with the video equipment, and the switching operation of the video equipment between the internal network computer and the external network computer is as follows: the KVM switches the button and sends the instruction of switching the video equipment to the FPGA chip, and the FPGA chip acts as high-speed switch chip this moment, and the FPGA chip can switch to the intranet video chip or switch to the intranet video chip from the extranet video chip of connection from the intranet video chip of connection to can realize switching the video equipment to the extranet computer or switch to the intranet computer from the extranet computer from the intranet computer. The FPGA chip carries out video coding and decoding on video signals input by the internal network video chip and the external network video chip, and then outputs the video signals through a user video interface.
As shown in fig. 1, the network chip is connected to the intranet computer, the network isolation encryption board further includes a first USB interface and a second USB interface, the extranet computer is connected to the first USB interface, the USB expansion chip is connected to the first USB interface and the second USB interface, and the first USB interface is a USB3.0 interface.
The outer net computer is provided with a net port, the outer net computer can be connected with the internet through the net port, and the internet data is sent to the inner net computer to be operated as follows: internet data can send the extranet computer earlier, the extranet computer can pass through USB extension chip with received network data, USB changes network chip and sends to the FPGA chip, the FPGA chip can carry out analysis, filtration to received data, then send to general processor chip again, general processor chip can decrypt the data that accords with the safety strategy, data after the decryption can be sent to the FPGA chip, rethread network chip transmits to the intranet computer.
The operation of sending the data of the intranet computer to the Internet is as follows: the data of intranet computer can be sent to the FPGA chip through the network chip, the FPGA chip can carry out the analysis to data, filter, then resend to general processor chip, general processor chip can encrypt the data that accords with the security policy, data after the encryption can be sent to the FPGA chip, the rethread USB changes the network chip, USB extension chip sends the extranet computer, the internet is connected to the extranet computer, the cryptograph data after the extranet computer will encrypt sends to the internet.
The second USB interface may be connected to a device such as a USB disk, and the data of the device such as the USB disk is sent to the intranet computer as follows: the data of equipment such as USB flash disk can be earlier sent to the outer net computer through USB extension chip, the outer net computer can be with the time data decomposition packing, rethread USB extension chip, USB changes network chip and sends to the FPGA chip, the FPGA chip can be to data analysis, filter, then send to general processor chip again, general processor chip can decipher the data that accords with the safety policy, data after the deciphering can be sent to the FPGA chip, rethread network chip sends to the intranet computer.
The data of the intranet computer is sent to equipment such as a USB flash disk and the like, and the operation is as follows: the data of intranet computer can be sent to the FPGA chip through the network chip, the FPGA chip can carry out the analysis to data, filter, then resend to general processor chip, general processor chip can encrypt the data that accords with the security policy, data after the encryption can be sent to the FPGA chip, the rethread USB changes the network chip, USB extension chip sends the extranet computer, the extranet computer is repackaged data decomposition, rethread USB extension chip sends equipment such as USB flash disk.
As shown in fig. 1, the high-speed switch chip includes a first high-speed switch chip, a second high-speed switch chip, and a third high-speed switch chip.
The network isolation encryption board further comprises a mouse interface used for mouse connection and a keyboard interface used for keyboard connection, the mouse interface and the keyboard interface are connected with a first high-speed switch chip, the first high-speed switch chip is connected with the intranet computer and the USB expansion chip, the FPGA chip is connected with the KVM switch key, and the RS2227XUTQK10 chip can be adopted as the first high-speed switch chip.
The mouse interface can be externally connected with a mouse, the keyboard interface can be externally connected with a keyboard, and the switching operation of the mouse and the keyboard between the intranet computer and the extranet computer is as follows: the first high-speed switch chip comprises an input channel and two output channels, the input end of the first high-speed switch chip is connected with a mouse interface and a keyboard interface, the two output ends of the first high-speed switch chip are respectively connected with the intranet computer and the USB expansion chip, the KVM switch key sends a command for switching the mouse and the keyboard to the FPGA chip, the FPGA chip sends a control command to the first high-speed switch chip after receiving the KVM switch key command, and the output of the first high-speed switch chip is switched from one output channel to the other output channel, so that the mouse and the keyboard can be switched from the intranet computer to the extranet computer or from the extranet computer to the intranet computer.
As shown in fig. 1, the network isolation encryption board further includes a camera interface for connecting a camera, the camera interface is connected with a second high-speed switch chip, the second high-speed switch chip is connected with the intranet computer and the USB expansion chip, the FPGA chip is connected with the KVM switch key, and the second high-speed switch chip may adopt an RS2227XUTQK10 chip.
The camera interface is externally connected with a camera, and the switching operation of the camera between the internal network computer and the external network computer is as follows: the second high-speed switch chip comprises an input channel and two output channels, the input end of the second high-speed switch chip is connected with the camera interface, the two output ends of the second high-speed switch chip are respectively connected with the intranet computer and the USB extension chip, the KVM switch key sends a camera switching instruction to the FPGA chip, the FPGA chip sends a control instruction to the second high-speed switch chip after receiving the KVM switch key instruction, the output of the second high-speed switch chip is switched to another output channel from one output channel, and therefore the camera can be switched to the extranet computer from the intranet computer or switched to the intranet computer from the extranet computer.
As shown in fig. 1, the network isolation encryption board further includes an external network computer audio interface and a user audio interface for audio device connection, the user audio interface is connected to a third high-speed switch chip, the third high-speed switch chip is connected to an internal network computer and an external network computer audio interface, the external network computer is connected to the external network computer audio interface, the FPGA chip is connected to the KVM switch key, and the third high-speed switch chip may adopt an RS2117YUTQK10 chip.
The user audio interface is externally connected with audio equipment, and the switching operation of the audio equipment between the internal network computer and the external network computer is as follows: the third high-speed switch chip comprises an input channel and two output channels, the input end of the third high-speed switch chip is connected with a user audio interface, two output ends of the third high-speed switch chip are respectively connected with an intranet computer and an extranet computer audio interface, the extranet computer is connected with the extranet computer audio interface, a KVM switch key sends an audio equipment switching instruction to the FPGA chip, the FPGA chip receives the KVM switch key instruction and then sends a control instruction to the third high-speed switch chip, the output of the third high-speed switch chip is switched from one output channel to the other output channel, and therefore switching of audio equipment from the intranet computer to the extranet computer or from the extranet computer to the intranet computer can be achieved.
As shown in fig. 1, the network isolation encryption board further includes a power key, the power key is connected to the power chip, and the power chip is connected to the general processor chip, the FPGA chip, the high-speed switch chip, the USB network-switching chip, the USB expansion chip, the video chip, the network chip, and other chips in the network isolation encryption board, so as to implement power control and management of each chip.
The power control operation of the network isolation encryption board is as follows: 1. the switch of the power supply chip can be directly controlled through the power supply key; 2. the intranet computer can control the on-off of the power chip through the network chip and the FPGA chip; 3. the external network computer can control the on-off of the power chip through the USB expansion chip, the USB network conversion chip and the FPGA chip.
The main function of this application FPGA chip in realizing the KVM function does: 1. judging the state of a KVM switching key; 2. controlling the state of the high-speed switch chip; 3. and video coding and decoding are carried out on the video signals input by the internal network video chip and the external network video chip, and then the video signals are output by a user video interface.
Claims (13)
1. A network data isolation encryption system is characterized by comprising an external network computer and a network isolation encryption board, wherein the network isolation encryption board comprises an internal network computer which performs data transmission with the external network computer;
the network isolation encryption board further comprises a general processor chip, an FPGA chip, a high-speed switch chip, a video chip, a network chip, a USB-to-network chip, a USB expansion chip and a power chip, wherein the general processor chip, the high-speed switch chip, the video chip, the network chip, the USB-to-network chip and the power chip are connected with the FPGA chip, and the USB expansion chip is connected with the USB-to-network chip.
2. The system according to claim 1, wherein the network isolation encryption board is configured to implement KVM function, network isolation and encryption and decryption of transmission data;
the general processor chip is used for encrypting and decrypting transmission data;
the FPGA chip is used for state control of the high-speed switch chip, state control of the power supply chip, data isolation filtering and transmission and video data encoding and decoding;
the high-speed switch chip is used for switching signal transmission channels;
the power supply chip is used for power supply management of the network isolation encryption board;
the video chip is used for encoding and decoding video signals;
the network chip is used for converting network signals;
the USB-to-network chip is used for converting a USB protocol standard signal and an Ethernet protocol standard signal;
the USB expansion chip is used for expanding one USB interface into a plurality of USB interfaces.
3. The system according to claim 1, wherein the video chip comprises an intranet video chip and an extranet video chip, the intranet video chip is connected to the FPGA chip and an intranet computer, the network isolation encryption board further comprises an extranet computer video interface, the extranet video chip is connected to the FPGA chip and the extranet computer video interface, and the extranet computer is connected to the extranet computer video interface.
4. The system according to claim 1, wherein the network data isolation encryption board further comprises a user video interface for video device connection, and the user video interface is connected to the FPGA chip.
5. The system according to claim 1, wherein the network chip is connected to the intranet computer.
6. The system according to claim 1, wherein the network data isolation encryption board further comprises a first USB interface and a second USB interface, the extranet computer is connected to the first USB interface, and the USB expansion chip is connected to the first USB interface and the second USB interface.
7. The system for isolating and encrypting network data according to claim 1, wherein the high-speed switch chip comprises a first high-speed switch chip, a second high-speed switch chip and a third high-speed switch chip.
8. The system according to claim 7, wherein the network data isolation encryption board further comprises a mouse interface for mouse connection and a keyboard interface for keyboard connection, the mouse interface and the keyboard interface are connected to the first high-speed switch chip, and the first high-speed switch chip is connected to the intranet computer and the USB expansion chip.
9. The system according to claim 7, wherein the network data isolation encryption board further comprises a camera interface for connecting a camera, the camera interface is connected to the second high-speed switch chip, and the second high-speed switch chip is connected to the intranet computer and the USB expansion chip.
10. The system according to claim 7, wherein the network data isolation encryption board further comprises an external network computer audio interface and a user audio interface for audio device connection, the user audio interface is connected to the third high-speed switch chip, the third high-speed switch chip is connected to the internal network computer and the external network computer audio interface, and the external network computer is connected to the external network computer audio interface.
11. The system for isolating and encrypting network data according to claim 1, wherein the network isolation encryption board further comprises a power key, and the power key is connected with the power chip.
12. The system according to claim 1, wherein the network isolated encryption board further comprises a KVM switch, and the KVM switch is connected to the FPGA chip.
13. The isolated encryption system of claim 1 wherein the general purpose processor chip is an X86 chip or an ARM chip.
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| CN202223158878.7U CN218850785U (en) | 2022-11-28 | 2022-11-28 | Network data isolation encryption system |
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| CN202223158878.7U CN218850785U (en) | 2022-11-28 | 2022-11-28 | Network data isolation encryption system |
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