CN218788374U - Semiconductor packaging shell and semiconductor packaging structure - Google Patents

Semiconductor packaging shell and semiconductor packaging structure Download PDF

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Publication number
CN218788374U
CN218788374U CN202222534087.3U CN202222534087U CN218788374U CN 218788374 U CN218788374 U CN 218788374U CN 202222534087 U CN202222534087 U CN 202222534087U CN 218788374 U CN218788374 U CN 218788374U
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Prior art keywords
side wall
heat sink
cavity
wall
plastic
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CN202222534087.3U
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Chinese (zh)
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种兆永
李岩
吴炳财
张新儿
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Quanzhou San'an Integrated Circuit Co ltd
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Quanzhou San'an Integrated Circuit Co ltd
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Abstract

The utility model discloses a semiconductor package casing and semiconductor package structure, this semiconductor package casing includes metal pin, the plastic envelope side wall, heat sink and lid, the plastic envelope side wall encircles the rigid coupling and constitutes the cavity around the heat sink, the heat sink is the bottom of cavity, and the gomphosis is on the plastic envelope side wall, the plastic envelope side wall has relative inner wall and outer wall, metal pin runs through in the inner wall and the outer wall of plastic envelope side wall, and extend to in the cavity with naked first surface that exposes, the lid closes with the cavity lid, realize good sealed effect. An embedded connecting structure of a convex edge and a groove can be adopted between the heat sink and the plastic packaging side wall, and the packaging structure has better packaging performance and reliability. And the plastic packaging side wall is fixedly connected with the heat sink in a pre-injection mode, so that the layering phenomenon is avoided, and the reliability and stability of the device are improved. The semiconductor packaging structure comprises the semiconductor packaging shell and at least one chip, wherein the chip is attached to the heat sink and is connected with the metal pins in the cavity through leads.

Description

Semiconductor packaging shell and semiconductor packaging structure
Technical Field
The utility model relates to a semiconductor package field especially relates to a semiconductor package casing and semiconductor package structure.
Background
Semiconductor packaging refers to the routing of circuit pins on a chip to external connections for connection to other devices. The package type is a case for mounting a semiconductor integrated circuit chip, which not only plays a role in mounting, fixing, sealing, protecting the chip, enhancing an electric heating performance, etc., but also is connected to pins of the package case by leads through pads on the chip, and the pins are connected to other devices through wires on a printed circuit board, thereby realizing connection of an internal chip with an external circuit.
At present, the packaging form of chips of high-power devices and base stations mostly adopts a plastic packaging or ceramic packaging mode, plastic packaging is commonly used for packaging plastic packaging materials, in the plastic packaging process, the temperature can be circulated from low temperature to high temperature and then to low temperature, and the difference of thermal expansion coefficients between the plastic packaging materials and a substrate or a lead frame can cause layering and cracking, so that the reliability is reduced, therefore, the plastic packaging has the advantage of low cost, but the reliability is relatively poor. While ceramic seals have the advantage of high reliability, but are costly.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome the not enough of prior art existence, provide a semiconductor package casing and semiconductor package structure.
In order to realize the above purpose, the technical scheme of the utility model is that:
a semiconductor packaging shell comprises metal pins, a plastic packaging side wall and a heat sink, wherein the plastic packaging side wall surrounds and is fixedly connected with the periphery of the heat sink to form a cavity, the heat sink is the bottom of the cavity and is embedded in the plastic packaging side wall, the plastic packaging side wall is provided with an inner wall and an outer wall which are opposite, and the metal pins penetrate through the inner wall and the outer wall of the plastic packaging side wall and extend into the cavity to expose a first surface.
Preferably, the heat sink is provided with a convex edge, the plastic package side wall is provided with a groove matched with the convex edge, and the convex edge is embedded into the groove.
Preferably, the bottom of the plastic package side wall is flush with the bottom of the heat sink.
Preferably, the plastic packaging structure further comprises a cover body, wherein the cover body is attached to the plastic packaging side wall and covers the cavity.
Preferably, the cover body is attached to the upper surface of the plastic package side wall through an adhesive.
A semiconductor packaging structure comprises the semiconductor packaging shell and at least one chip, wherein the chip is attached to the heat sink and is connected with the metal pins in the cavity through leads.
Preferably, the inner wall of the plastic package side wall is provided with a step part, and the step part is located between the second surface of the metal pin and the upper surface of the heat sink and flush with the side edge of the metal pin located in the cavity.
Preferably, the surfaces of the inner walls of the plastic package side walls, which are positioned at the upper side and the lower side of the metal pin in the cavity, are flush.
Preferably, the distance between the second surface of the metal pin and the upper surface of the heat sink is greater than the height of the chip.
Compared with the prior art, the beneficial effects of the utility model are that:
(1) The utility model discloses an adopt the embedded connection structure of protruding edge and recess between semiconductor packaging structure's the heat sink and the plastic envelope side wall, have better parcel nature and reliability.
(2) The utility model discloses an adopt the bonding agent bonding to be in the same place between semiconductor packaging structure's the lid and the plastic envelope side wall to the cover plays good sealed effect in the cavity top.
(3) The utility model discloses a semiconductor package structure's metal pin runs through between the inner wall and the outer wall of plastic envelope side wall to the plastic envelope side wall adopts the mode of moulding plastics in advance to realize with the fixed connection of heat sink, avoids appearing the layering phenomenon, improves the reliability and the stability of device, has solved the low reliability problem of plastic envelope, and is lower than the cost of ceramic sealing simultaneously.
Drawings
Fig. 1 is a schematic view of a semiconductor package housing according to a first embodiment of the present application;
fig. 2 is a schematic view of a semiconductor package structure according to a first embodiment of the present application;
fig. 3-6 are process flow diagrams of a method for fabricating a semiconductor package structure according to a first embodiment of the present application;
fig. 7 is a schematic view of a semiconductor package structure according to a second embodiment of the present application;
reference numerals: 1. a metal pin; 2. a cover body; 3. a chip; 4. plastically packaging the side wall; 5. a heat sink; 6. and (7) leading wires.
Detailed Description
The invention is further explained below with reference to the drawings and the specific embodiments. The drawings of the utility model are only schematic to facilitate understanding of the utility model, and the concrete proportion can be adjusted according to the design requirements. The above and below relationships and the front/back definitions of the relative elements in the drawings described herein are understood to refer to the relative positions of the elements, and therefore, the elements may be turned over to present the same elements, all within the scope of the present disclosure.
Example one
Referring to fig. 1, an embodiment of the present application provides a semiconductor package housing, which includes a metal pin 1, a cover body 2, a plastic package side wall 4 and a heat sink 5, wherein the plastic package side wall 4 is fixedly connected around the heat sink 5, and the bottom of the plastic package side wall 4 is flush with the bottom of the heat sink 5 to form a cavity, and the plastic package side wall 4 is connected with the heat sink 5 in an embedded manner, so as to enhance the connection strength between the plastic package side wall 4 and the heat sink 5. The heat sink 5 is the bottom of the cavity, the plastic package side wall 4 forms the side of the cavity, and the plastic package side wall 4 is formed by injection molding of a plastic material and is provided with an inner wall and an outer wall which are opposite. The metal pins 1 penetrate through the inner wall and the outer wall of the plastic package side wall 4 and extend into the cavity to expose the first surface. That is, the metal pins 1 penetrate into the cavity from the outside of the plastic package side wall 4. According to the embodiment of the application, the metal pins 1 are fixedly connected together in a mode of pre-injection molding of the plastic package side wall 4, so that the reliability of the packaging structure can be improved, and the layering phenomenon is avoided.
In a specific embodiment, the heat sink 5 is provided with a convex edge, the plastic package side wall 4 is provided with a groove matched with the convex edge, and the convex edge is embedded in the groove, so that the heat sink 5 is fixedly connected with the plastic package side wall 4, and the plastic package side wall has better wrapping property and reliability. Preferably, the raised edge may be provided on the side of the heat sink 5, with the top of the raised edge being flush with the top of the heat sink 5. Specifically, the inner wall of the plastic package side wall 4 is provided with a step portion, and the step portion is located between the second surface of the metal pin 1 and the upper surface of the heat sink 5 and flush with the side edge of the metal pin 1 located in the cavity. Therefore, the part of the metal pin 1 in the cavity is supported by the step part, and the metal pin 1 in the cavity is arranged on the step part, so that the connection between the subsequent lead and the metal pin 1 is facilitated, and the stability of the packaging structure is further improved.
In a specific embodiment, the cover body 2 is attached to the plastic package side wall 4, specifically, the cover body 2 and the plastic package side wall 4 are attached together by using an adhesive, and the cover body 2 covers the cavity to achieve a good sealing effect. The cover 2 is made of metal or nonmetal. If the lid 2 is made of metal, the semiconductor package casing has better sealing performance. If the cover body 2 is made of non-metal materials, the cost can be reduced.
Referring to fig. 2, an embodiment of the present application further provides a semiconductor package structure, which includes the above semiconductor package housing and at least one chip 3, a middle portion of the metal pin 1 is wrapped inside the plastic package side wall 4, one end of the metal pin 1 extends into the cavity for being connected to the chip 3, and the other end extends outward from an outer wall of the plastic package side wall 4 for being connected to the outside. Chip 3 sets up in the cavity, and is concrete, and chip 3 pastes the dress on heat sink 5, and heat sink 5 can go out the heat dissipation that chip 3 during operation produced, improves the radiating effect. Two adjacent chips 3 and/or chips 3 are connected with the metal pins 1 through leads 6 in the cavity, and the cover body 2 covers the upper part of the cavity, so that a good sealing effect can be realized.
In a specific embodiment, the metal pin 1 is exposed at least on the first surface in the cavity, and the lead 6 is connected to the first surface of the metal pin 1. The chip 3 is connected with the metal pins 1 through the leads 6, and is connected with the outside through the metal pins 1 on the outer side of the plastic packaging side wall 4, so that the chip 3 is electrically conducted with the outside.
Referring to fig. 2 to 6, an embodiment of the present application further provides a method for manufacturing a semiconductor package structure, which includes the following steps:
(1) Referring to fig. 3, several metal pins 1 are provided as a frame.
(2) Referring to fig. 4, a heat sink 5 is provided, a plastic package side wall 4 is formed on the heat sink 5 by a pre-injection molding method, and a part of metal pins 1 are arranged in the plastic package side wall 4, so that the metal pins 1 penetrate through the inner wall and the outer wall of the plastic package side wall 4 and extend into the cavity to expose the first surface, thereby realizing connection between the heat sink 5 and the frame, and forming a cavity, wherein the side edge of the cavity is the plastic package side wall 4, and the bottom of the cavity is the heat sink 5.
(3) Referring to fig. 5, the chip 3 is attached to the heat sink 5 in the cavity by silver paste, the back surface of the chip 3 is attached to the surface of the heat sink 5, and the front surface of the chip 3 faces upward.
(4) Referring to fig. 6, two chips 3 and/or a chip 3 and a metal pin 1 are connected by a wire 6, so that the chip 3 can be electrically conducted with the outside.
(5) Referring to fig. 2, the cover body 2 is covered at the opening of the cavity, the cover body 2 and the plastic package side wall 4 are hermetically connected by using an adhesive, and finally, the single semiconductor package structure is cut.
Example two
Referring to fig. 7, the second embodiment of the present application is different from the first embodiment in that the inner wall surfaces of the plastic-encapsulated side walls 4 located at the upper and lower sides of the metal pins 1 in the cavity are flush. The side of the plastic package side wall 4 has no step part, and the metal pin 1 in the cavity is arranged in a suspension way and is exposed out of the first surface and the second surface. The rest is the same as the first embodiment.
Further preferably, the distance between the second surface of the metal pin 1 and the upper surface of the heat sink 5 is greater than the height of the chip 3, and the space below the metal pin 1 can be partially filled with the chip 3, so as to increase the mounting space of the chip 3.
The above embodiments are only used to further illustrate the technical solution of the present invention, but the present invention is not limited to the embodiments, and any simple modification, equivalent change and modification made by the technical entity of the present invention to the above embodiments all fall into the protection scope of the technical solution of the present invention.

Claims (9)

1. A semiconductor package housing, comprising: the heat sink is the bottom of the cavity and is embedded in the plastic packaging side wall, the plastic packaging side wall is provided with an inner wall and an outer wall which are opposite, and the metal pins penetrate through the inner wall and the outer wall of the plastic packaging side wall and extend into the cavity to expose the first surface.
2. The semiconductor package housing of claim 1, wherein: the heat sink is provided with a convex edge, the plastic package side wall is provided with a groove matched with the convex edge, and the convex edge is embedded into the groove.
3. The semiconductor package housing of claim 1, wherein: the bottoms of the plastic package side walls are flush with the bottom of the heat sink.
4. The semiconductor package housing of claim 1, wherein: the plastic packaging side wall is attached to the plastic packaging side wall, and the cover body is covered with the cavity.
5. The semiconductor package housing of claim 4, wherein: and the cover body is attached to the upper surface of the plastic package side wall through an adhesive.
6. A semiconductor package structure, characterized in that: the semiconductor package shell of any one of claims 1-5 and at least one chip, said chip being attached to said heat sink and connected to said metal pins located in said cavity by leads.
7. The semiconductor package structure of claim 6, wherein: the inner wall of the plastic package side wall is provided with a step part, the step part is positioned between the second surfaces of the metal pins and the upper surface of the heat sink, and is flush with the side edge of the metal pins in the cavity.
8. The semiconductor package structure of claim 6, wherein: and the inner wall surfaces of the plastic package side walls on the upper side and the lower side of the metal pins in the cavity are flush.
9. The semiconductor package structure of claim 8, wherein: the distance between the second surface of the metal pin and the upper surface of the heat sink is larger than the height of the chip.
CN202222534087.3U 2022-09-23 2022-09-23 Semiconductor packaging shell and semiconductor packaging structure Active CN218788374U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202222534087.3U CN218788374U (en) 2022-09-23 2022-09-23 Semiconductor packaging shell and semiconductor packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202222534087.3U CN218788374U (en) 2022-09-23 2022-09-23 Semiconductor packaging shell and semiconductor packaging structure

Publications (1)

Publication Number Publication Date
CN218788374U true CN218788374U (en) 2023-04-04

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202222534087.3U Active CN218788374U (en) 2022-09-23 2022-09-23 Semiconductor packaging shell and semiconductor packaging structure

Country Status (1)

Country Link
CN (1) CN218788374U (en)

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