CN218603174U

CN218603174U - Drive protection circuit and three-phase converter

Info

Publication number: CN218603174U
Application number: CN202222446506.8U
Authority: CN
Inventors: 杜香玲; 于博洋
Original assignee: TCL Air Conditioner Zhongshan Co Ltd
Current assignee: TCL Air Conditioner Zhongshan Co Ltd
Priority date: 2022-09-13
Filing date: 2022-09-13
Publication date: 2023-03-10
Anticipated expiration: 2032-09-13

Abstract

The application provides a drive protection circuit and a three-phase converter. The drive protection circuit includes: the semiconductor switch device, the sampling comparison module and the AND gate module are connected with the first input end and the second input end of the AND gate module respectively through the level signal output by the driving control signal and the sampling comparison module, and the output end of the AND gate module is connected with the semiconductor switch device, so that the on-off of the semiconductor switch device can be controlled in real time when the sampling comparison module outputs the level signal according to the collected signal and the reference signal. Compared with the mode that overcurrent and overvoltage signals need to be transmitted to the main control module firstly and then the main control module turns off the drive control signal in the prior art, the method and the device have the advantages of real-time and rapid protection and no time delay.

Description

Drive protection circuit and three-phase converter

Technical Field

The application relates to the technical field of control circuits, in particular to a drive protection circuit and a three-phase converter.

Background

With the large-scale popularization of power electronic equipment and the rapid development of power electronic technology, semiconductor switching devices are widely applied to the switching control of high-power devices, and in order to ensure the safety of the devices, driving protection circuits for controlling and protecting the devices are rapidly developed.

However, the conventional driving protection circuit mainly transmits an overcurrent and overvoltage signal to a main control module (for example, a chip), and then the main control module sends a turned-off driving control signal, so that the problem of long feedback time exists, and the semiconductor switching device is easily damaged at this stage due to the long feedback time, and the control requires that the chip is in a normal working state, so that the chip cannot be protected if reset occurs due to surge or static electricity.

SUMMERY OF THE UTILITY MODEL

The application provides a drive protection circuit and a three-phase converter, which are used for solving one or more technical problems in the existing drive protection circuit.

In one aspect, the present application provides a driving protection circuit, including: the sampling and comparing module comprises a semiconductor switching device, a sampling and comparing module and an AND gate module;

the sampling comparison module is connected with the semiconductor switch device and used for acquiring voltages at two ends of the semiconductor switch device or current signals flowing through the semiconductor switch device and outputting first level signals according to the acquired signals and reference signals;

the AND gate module comprises a first input end, a second input end and an output end, one of the first input end and the second input end is connected with the output end of the sampling comparison module, the other one of the first input end and the second input end inputs a second level signal and is used for outputting a control signal according to the first level signal and the second level signal, and the control signal controls the semiconductor switch device to be switched on or switched off.

In some embodiments of the present application, the and gate module includes an input unit, a control unit, and an output unit;

the input unit is connected with the first input end and the second input end and is connected with a first node, and the input unit is used for controlling the potential of the first node under the control of a signal accessed by the first input end and a signal accessed by the second input end;

the control unit is connected with a first power supply end and the first node, and is connected with a second node, and the control unit is used for controlling the potential of the second node under the control of the potential of the first node and the potential of the first power supply end;

the output unit is connected to the second node, the first power end and the output end, and the output unit is configured to control the potential of the output end under the control of the potential of the second node and the potential of the first power end.

In some embodiments of the present application, the input unit includes a first diode and a second diode;

the cathode of the first diode is connected with the first input end, and the anode of the first diode is connected with the first node;

the cathode of the second diode is connected with the second input end, and the anode of the second diode is connected with the first node.

In some embodiments of the present application, the control unit includes a first resistor and a first transistor;

the base electrode of the first triode is connected with the first node, the emitting electrode of the first triode is connected with the first power supply end, and the collecting electrode of the first triode is connected with the second node;

one end of the first resistor is connected to the first power terminal, and the other end of the first resistor is connected to the first node.

In some embodiments of the present application, the output unit includes a second transistor and a second resistor;

the base electrode of the second triode is connected with the second node, the collector electrode of the second triode is connected with the output end, and the emitter electrode of the second triode is grounded;

one end of the second resistor is connected with the first power supply end, and the other end of the second resistor is connected with the output end.

In some embodiments of the present application, the input unit further includes a third resistor, one end of the third resistor is connected to the cathode of the first diode, and the other end of the third resistor is grounded; and/or the presence of a gas in the atmosphere,

the input unit further comprises a fourth resistor, one end of the fourth resistor is connected with the cathode of the second diode, and the other end of the fourth resistor is grounded.

In some embodiments of the present application, the output unit further includes a fifth resistor, one end of the fifth resistor is connected to the first power supply terminal, and the other end of the fifth resistor is connected to the collector of the second transistor; and/or the presence of a gas in the gas,

the output unit further comprises a sixth resistor, one end of the sixth resistor is connected with the collector of the second triode and the first power end respectively, and the other end of the sixth resistor is connected with the output end.

In some embodiments of the present application, the driving protection circuit further includes an amplifying module including an amplifying unit and a releasing unit;

the amplifying unit is used for amplifying the control signal output by the AND gate module into a driving signal for controlling the conduction of the semiconductor switching device;

the release unit is used for releasing the voltage at the output end of the amplification module when the semiconductor switch device is switched off.

In some embodiments of the present application, the amplifying unit includes a seventh resistor, an eighth resistor, a third transistor, and a fourth transistor;

the base electrode of the third triode is connected with the output end of the AND gate module, the emitting electrode of the third triode is grounded, the collecting electrode of the third triode is connected with one end of an eighth resistor, and the other end of the eighth resistor is connected with the base electrode of the fourth triode;

an emitting electrode of the fourth triode is connected with a second power supply end, and a collector electrode of the fourth triode is connected with the output end of the amplifying module;

one end of the seventh resistor is connected with the second power supply end, and one end of the seventh resistor is connected with the base electrode of the fourth triode;

wherein the potential of the second power supply terminal is greater than the potential of the first power supply terminal.

In some embodiments of the present application, the release unit includes a ninth resistor, a fifth transistor, and a sixth transistor;

a base electrode of the fifth triode is connected with the output end of the AND gate module, an emitting electrode of the fifth triode is grounded, and a collector electrode of the fifth triode is connected with a third node;

the base electrode of the sixth triode is connected with the third node, the emitting electrode of the sixth triode is grounded, and the collecting electrode of the sixth triode is connected with the output end of the amplifying module.

Another aspect of the present application provides a three-phase converter including a power supply and the above-described drive protection circuit, the power supply being disposed in series with the semiconductor switching device.

The application provides a drive protection circuit and three-phase converter, through with drive control signal and the output of sampling comparison module level signal is connected with the first input and the second input of AND gate module respectively, and the output and the switching element of AND gate module are connected to can be when sampling comparison module is according to the signal of gathering and reference signal output level signal (for example high level or low level), can real-time control semiconductor switch device open and close, need will overflow among the prior art, overvoltage signal transmits to host system earlier, the mode of drive control signal is shut off by host system again, this application has real-time quick protection, the advantage of no time delay.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a block diagram of a first embodiment of a drive protection circuit provided in an embodiment of the present application;

fig. 2 is a block diagram of a second embodiment of a drive protection circuit provided in an embodiment of the present application;

fig. 3 is a schematic structural diagram of an embodiment of an and gate module provided in the embodiment of the present application;

FIG. 4 is a schematic structural diagram of one embodiment of an amplification module provided in an embodiment of the present application;

fig. 5 is a schematic structural diagram of an embodiment of a sampling comparison module provided in the embodiment of the present application. Reference numbers: the circuit comprises a semiconductor switching device 100, a sampling comparison module 200, a signal acquisition unit 210, a reference voltage signal acquisition unit 220, an AND gate module 300, an input unit 310, a control unit 320, an output unit 330, an amplification module 400, an amplification unit 410, a release unit 420 and an isolation module 500.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it is to be understood that the terms "first", "second", and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to imply that the number of technical features indicated are in fact significant. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.

In this application, the word "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the invention. In the following description, details are set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known structures and processes are not shown in detail to avoid obscuring the description of the invention with unnecessary detail. Thus, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

The embodiment of the application provides a drive protection circuit and a three-phase converter. The drive protection circuit includes: the device comprises a semiconductor switch device, a sampling comparison module and an AND gate module. The sampling comparison module is connected with the switching device and used for acquiring voltages at two ends of the semiconductor switching device or current signals flowing through the semiconductor switching device and outputting first level signals according to the acquired signals and reference signals. The AND gate module includes a first input terminal, a second input terminal, and an output terminal. One of the first input end and the second input end is connected with the output end of the sampling comparison module, and the other of the first input end and the second input end inputs a second level signal and is used for outputting a control signal according to the first level signal and the second level signal. The control signal is used to control the semiconductor switching device to be turned on or off. According to the semiconductor switch device and the control method thereof, the first level signal and the second level signal are respectively input to the first input end and the second input end of the gate module, the control signal used for controlling the semiconductor switch device to be switched on or switched off is output at the output end of the gate module according to the first level signal and the second level signal, the first level signal corresponding to the abnormal signal can be output when the sampling comparison module collects the voltage at the two ends of the semiconductor switch device or the current signal flowing through the semiconductor switch device is the abnormal signal, and the semiconductor switch device is switched off by outputting the control signal after the gate module. This application needs to transmit earlier to host system with overflowing, excessive pressure signal among the prior art, by host system turn-offs drive control signal's mode again, this application has real-time quick protection, does not have the advantage of time delay.

In order to make the purpose, technical solution and effect of the present invention clearer and clearer, the following description refers to the accompanying drawings and examples to further explain the present invention in detail.

Fig. 1 is a block diagram illustrating an embodiment of a driving protection circuit according to the present application. The driving protection circuit includes a semiconductor switching device 100, a sampling comparison module 200, and an and gate module 300. The driving protection circuit is used for rapidly outputting a control signal to switch off the semiconductor switching device 100 when the voltage across the semiconductor switching device 100 or the current flowing through the semiconductor switching device 100 is abnormal, so as to protect the semiconductor switching device 100. The semiconductor switch device 100 may be an IGBT (insulated gate bipolar transistor) or a SiC MOSFET (silicon carbide field effect transistor), which is not limited herein.

Specifically, the sampling comparison module 200 is connected to the semiconductor switching device 100, and is configured to collect a voltage across the semiconductor switching device 100 or a current signal flowing through the semiconductor switching device 100, and output a first level signal (FO) according to the collected signal and a reference signal. The AND gate module 300 includes a first input, a second input, and an output. One of the first input terminal and the second input terminal is connected to the output terminal of the sampling comparison module 200 for inputting the first level signal FO. The other of the first and second input terminals inputs a second level signal PWM-1 for outputting a control signal PWM-2 according to the first and second level signals, the control signal PWM-2 for controlling the semiconductor switching device 100 to be turned on or off.

It is understood that the first level signal FO may be high or low. Illustratively, when the signal collected by the sampling comparison module 200 is within the reference signal range, it is determined that the driving protection circuit is working normally, and at this time, the first level signal FO is at a high level. When the signal collected by the sampling comparison module 200 is not within the reference signal range, it is determined that the driving protection circuit is in an abnormal working state, and at this time, the first level signal FO is at a low level. It should be noted that, the sampling comparison module 200 compares the acquired signal with a predetermined reference signal and then outputs a first level signal, which is not further described herein.

The second level signal PWM-1 may be a pulse control signal, which includes a low level and a high level, which is commonly used in the art. In the prior art, the power device is generally controlled to be turned on or off by a pulse control signal, and illustratively, the switching device is turned on when the PWM-1 outputs a high level and turned off when the PWM-1 outputs a low level.

When the driving protection circuit in the embodiment of the present application works, the second level signal PWM-1 is written into the first input terminal of the and gate module 300, and the first level signal FO is written into the second input terminal. When the sampling and comparing module 200 determines that the driving protection circuit is in an abnormal operating state and correspondingly outputs the first level signal FO as a low level, at this time, no matter the second level signal PWM-1 is a high level or a low level, the control signal PWM-2 output by the and gate module 300 is always a low level, so that the control signal PWM-2 can be rapidly output to disconnect the semiconductor switching device 100, thereby realizing protection of the semiconductor switching device 100.

It should be noted that, in the prior art, for example, CN109302169A discloses a SiC MOSFET driving protection circuit and a driving protection method thereof, which mainly transmit an overcurrent and overvoltage signal to a main control module (e.g., MCU), and then turn off a driving control signal of a switching device by the main control module, which has a problem of long feedback time, and the switching device is easily damaged at this stage due to the long feedback time, and the control requires that a chip is in a normal operating state, and if the chip is reset due to surge or static electricity, the chip cannot be protected. Compared with the prior art, the control chip is not required to be arranged, the structure of the driving protection circuit is effectively simplified, and the effect of time-delay-free rapid protection is achieved.

Further, please refer to fig. 3, wherein fig. 3 is a schematic structural diagram of an embodiment of an and gate module in the present application. The and gate module 300 includes an input unit 310, a control unit 320, and an output unit 330. The input unit 310 is connected to the first input terminal and the second input terminal, and is connected to the first node N1. The input unit 310 is configured to control a potential of the first node N1 under control of a signal input by the first input terminal and a signal input by the second input terminal. The control unit 320 is connected to a first power terminal (e.g., + 5V) and a first node N1, and is connected to a second node N2. The control unit 320 is used for controlling the potential of the second node N2 under the control of the potential of the first node N1 and the potential of the first power source terminal. The output unit 330 is connected to the second node N2, a first power source terminal (e.g., + 5V), and an output terminal. The output unit 330 is used for controlling the potential of the output terminal under the control of the potential of the second node N2 and the potential of the first power source terminal.

Specifically, the input unit 310 includes a first diode D1 and a second diode D2. The cathode of the first diode D1 is connected to the first input terminal, and the anode of the first diode D1 is connected to the first node N1. The cathode of the second diode D2 is connected to the second input terminal, and the anode of the second diode D2 is connected to the first node N1. Illustratively, when the first level signal FO is low level or the second level signal PWM-1 is low level, the first node N1 is controlled to be high level, for example, the voltage of the first node N1 is controlled to be about 5V; when the first level signal FO is at a high level and the second level signal PWM-1 is at a high level, the first node N1 is controlled to be at a low level, for example, the voltage of the first node N1 is controlled to be about 0V.

Further, the input unit 310 further includes a third resistor R3, and the third resistor R3 is a protection resistor. One end of the third resistor R3 is connected to the cathode of the first diode D1, and the other end of the third resistor R3 is grounded.

Further, the input unit 310 further includes a fourth resistor R4, and the fourth resistor R4 is a protection resistor. One end of the fourth resistor R4 is connected to the cathode of the second diode D2, and the other end of the fourth resistor R4 is grounded.

Further, the control unit 320 includes a first resistor R1 and a first transistor Q1. A base of the first triode Q1 is connected to a first node N1, an emitter of the first triode Q1 is connected to a first power source terminal (e.g., + 5V), and a collector of the first triode Q1 is connected to a second node N2. One end of the first resistor R1 is connected to a first power supply terminal (e.g., + 5V), and the other end of the first resistor R1 is connected to a first node N1. Illustratively, when the first node N1 is at a high level, the first transistor Q1 is in saturation conduction, the second node N2 is at the same potential as the first power supply terminal (ignoring the voltage drop of the first transistor), and the second node N2 is at a high level; when the first node N1 is at a low level, the first transistor Q1 is turned off, and the second node N2 is at a low level.

Further, the output unit 330 includes a second transistor Q2 and a second resistor R2. The base of the second triode Q2 is connected to the second node N2, the collector of the second triode Q2 is connected to the output (the end outputting PWM-2), and the emitter of the second triode Q2 is grounded. One end of the second resistor R2 is connected with the first power supply end, and the other end of the second resistor R2 is connected with the output end. Illustratively, when the second node N2 is at a high level, the second transistor Q2 is in saturation conduction, and the output signal PWM-2 at the output terminal is at a low level; when the second node N2 is at a low level, the second transistor Q2 is not turned on, and the output signal PWM-2 at the output terminal is at a high level.

Further, the output unit 330 further includes a fifth resistor R5. One end of the fifth resistor R5 is connected to the first power supply terminal, and the other end of the fifth resistor R5 is connected to the collector of the second transistor Q2, thereby preventing the gate of the second transistor Q2 from being directly connected to the first power supply terminal.

Further, the output unit 330 further includes a sixth resistor R6. One end of a sixth resistor R6 is connected with the collector of the second triode Q2 and one end of the second resistor R2, and the other end of the sixth resistor R6 is connected with the output end.

Further, please refer to fig. 1 and fig. 4, wherein fig. 4 is a schematic structural diagram of an embodiment of the amplifying module in the present application. The driving protection circuit disclosed in the embodiment of the present application further includes an amplifying module 400. The amplifying module 400 includes an amplifying unit 410 and a releasing unit 420. The amplifying unit 410 is configured to amplify the control signal PWM-2 output by the and gate module 300 into the driving signal GP _ a for controlling the semiconductor switching device 100 to be turned on. The release unit 420 serves to release the voltage at the output terminal of the amplifying module 400 when the semiconductor switching device 100 is turned off. In general, the semiconductor switching device 100 has a relatively long on-time and a relatively short off-time, and the release unit 420 is provided to release a large current generated at the moment when the semiconductor switching device 100 is turned off, thereby preventing the large current from damaging electronic components in the amplification unit and improving the stability of the device.

Specifically, the amplifying unit 410 includes a seventh resistor R7, an eighth resistor R8, a third transistor Q3, and a fourth transistor Q4. The base of the third transistor Q3 is connected to the output terminal of the and gate module 300, and receives the control signal PWM-2 output by the and gate module 300. The emitting electrode of the third triode Q3 is grounded, the collecting electrode of the third triode Q3 is connected with one end of an eighth resistor R8, and the other end of the eighth resistor R8 is connected with the base electrode of the fourth triode Q4. An emitter of the fourth transistor Q4 is connected to the second power source terminal (e.g., + 15V), and a collector of the fourth transistor Q4 is connected to an output terminal (one terminal of the output signal GP _ a) of the amplifying unit 410. One end of the seventh resistor R7 is connected to the second power source terminal (e.g., + 15V), and one end of the seventh resistor R7 is connected to the base of the fourth transistor Q4. Wherein the potential of the second power supply terminal is greater than the potential of the first power supply terminal. When the control signal PWM-2 is at a high level, the third transistor Q3 and the fourth transistor Q4 are both in saturation conduction, and the amplifying unit 410 outputs the signal GP _ a at a high level, for example, approximately 15V (neglecting the voltage division of the fourth transistor Q4 and the tenth resistor R10), which controls the semiconductor switching device 100 to be turned on. When the control signal PWM-2 is at a low level, the third transistor Q3 and the fourth transistor Q4 are both turned off, and the amplification unit 410 outputs a signal GP _ a at a low level, which controls the semiconductor switching device 100 to be turned off, thereby implementing protection of the semiconductor switching device 100. Further, the amplifying unit 410 further includes an eleventh resistor R11 and a twelfth resistor R12. The eleventh resistor R11 and the twelfth resistor R12 are voltage dividing resistors. One end of the eleventh resistor R11 is connected to the output end of the and module 300, and the other end of the eleventh resistor R11 is connected to the base of the third transistor Q3. One end of the twelfth resistor R12 is connected to the base of the third triode Q3 and one end of the eleventh resistor R11, respectively, and the other end of the twelfth resistor R12 is grounded.

The release unit 420 includes a ninth resistor R9, a fifth transistor Q5, and a sixth transistor Q6. The base of the fifth triode Q5 is connected to the output terminal of the and gate module 300, the emitter of the fifth triode Q5 is grounded, and the collector of the fifth triode Q5 is connected to the third node N3. The base electrode of the sixth triode Q6 is connected with the third node N3, the emitting electrode of the sixth triode Q6 is grounded, and the collecting electrode of the sixth triode Q6 is connected with the output end of the amplifying module. When the control signal PWM-2 is at a low level, the fifth transistor Q5 is turned off, and since the signal GP _ a at the output end of the amplifying module is at a high level at the previous stage, the sixth transistor Q6 is turned on in saturation, thereby rapidly releasing the voltage at the output end of the amplifying module to 0V, avoiding damage of a large current to electronic components in the amplifying unit 410, and improving the stability of the device. Further, the amplifying unit 410 further includes a thirteenth resistor R13 and a fourteenth resistor R14. The thirteenth resistor R13 and the fourteenth resistor R14 are voltage dividing resistors. One end of the thirteenth resistor R13 is connected to the output end of the and gate module 300, and the other end of the thirteenth resistor R13 is connected to the base of the fifth triode Q5. One end of the fourteenth resistor R14 is connected to the base of the fifth transistor Q5 and one end of the thirteenth resistor R13, respectively, and the other end of the thirteenth resistor R13 is grounded.

Further, please refer to fig. 5, fig. 5 is a schematic structural diagram of an embodiment of the sampling comparison module according to the present application. The sampling comparison module 200 is configured to collect a voltage across the semiconductor switching device 100 or a current signal thereof, and output a first level signal FO according to the collected signal and a reference signal. Illustratively, the semiconductor switching device 100 is a SiC MOSFET, and the sampling comparison module 200 samples a gate signal of the SiC MOSFET and compares it with a reference voltage signal, and outputs a low level when the comparison result is abnormal; when the comparison result is normal, a high level is output.

Specifically, the sampling comparison module 200 includes a signal acquisition unit 210, a reference voltage signal acquisition unit 220, and a comparator AR. The reference voltage signal acquisition unit 220 includes a capacitor C1, a resistor R16, a zener diode D3, and a power supply (e.g., + 5V), and is input to the positive input terminal of the comparator AR. The first ends of the capacitor C1 and the resistor R16 are both connected to the power supply, the second end of the capacitor C1 is connected to the first end of the zener diode D1, and the second end of the zener diode D1 and the second end of the resistor R16 are connected to the positive input end of the comparator AR. The signal acquisition unit 220 includes a capacitor C2, a capacitor C3, and a resistor R17. The first ends of the capacitor C2 and the resistor R17 are connected with the grid of the SiC MOSFET, the second end of the capacitor C2 is connected with the first end of the capacitor C3, and the second end of the capacitor C3 and the second end of the resistor R17 are connected with the negative input end of the comparator AR.

Further, referring to fig. 2, the driving protection circuit further includes an isolation module 500. The isolation module 500 is disposed between the output terminal of the and gate module 300 and the input terminal of the amplification module. It should be noted that the isolation module 500 may adopt an optical coupling isolation circuit in the existing design, or may adopt other existing isolation circuit structures capable of implementing the technical concept of the present invention, and is not limited herein.

A second aspect of the present application provides a three-phase converter, which includes a power supply and the above-mentioned driving protection circuit, wherein the power supply is connected in series with the semiconductor switching device 100, and when the semiconductor switching device 100 is subjected to an overcurrent, the driving protection circuit controls the semiconductor switching device 100 to be quickly turned off, so as to realize quick protection.

In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and parts that are not described in detail in a certain embodiment may refer to the above detailed descriptions of other embodiments, and are not described herein again.

Having thus described the basic concept, it will be apparent to those skilled in the art that the foregoing detailed disclosure is to be considered merely illustrative and not restrictive of the broad application. Various modifications, improvements and adaptations to the present application may occur to those skilled in the art, though not expressly described herein. Such modifications, improvements and adaptations are proposed in the present application and thus fall within the spirit and scope of the exemplary embodiments of the present application.

Also, this application uses specific language to describe embodiments of the application. Reference throughout this specification to "one embodiment," "an embodiment," and/or "some embodiments" means that a particular feature, structure, or characteristic described in connection with at least one embodiment of the present application is included in at least one embodiment of the present application. Therefore, it is emphasized and should be appreciated that two or more references to "an embodiment" or "one embodiment" or "an alternative embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, certain features, structures, or characteristics may be combined as suitable in one or more embodiments of the application.

Similarly, it should be noted that in the preceding description of embodiments of the application, various features are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure aiding in the understanding of one or more of the embodiments. This method of disclosure, however, is not intended to require more features than are expressly recited in the claims. Indeed, the embodiments may be characterized as having less than all of the features of a single disclosed embodiment.

For each patent, patent application publication, and other material cited in this application, such as articles, books, specifications, publications, documents, and the like, the entire contents of which are hereby incorporated by reference into this application, except for application history documents that are inconsistent with or conflict with the contents of this application, and except for documents that are currently or later become incorporated into this application as though fully set forth in the claims below. It is noted that the descriptions, definitions and/or use of terms in this application shall control if they are inconsistent or contrary to the present disclosure.

The above detailed description of the driving protection circuit and the three-phase converter provided in the embodiments of the present application has applied specific examples to explain the principles and embodiments of the present invention, and the above description of the embodiments is only used to help understanding the method and the core idea of the present invention; meanwhile, for those skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed, and in summary, the content of the present specification should not be construed as limiting the present invention.

Claims

1. A drive protection circuit, comprising: the device comprises a semiconductor switch device, a sampling comparison module and an AND gate module;

2. The drive protection circuit of claim 1, wherein the and gate module comprises an input unit, a control unit, and an output unit;

3. The drive protection circuit of claim 2, wherein the input unit includes a first diode and a second diode;

4. The drive protection circuit of claim 2, wherein the control unit comprises a first resistor and a first transistor;

5. The drive protection circuit of claim 2, wherein the output unit comprises a second transistor and a second resistor;

6. The driving protection circuit according to claim 3, wherein the input unit further comprises a third resistor, one end of the third resistor is connected to the cathode of the first diode, and the other end of the third resistor is grounded; and/or the presence of a gas in the gas,

7. The driving protection circuit according to claim 5, wherein the output unit further includes a fifth resistor, one end of the fifth resistor is connected to the first power supply terminal, and the other end of the fifth resistor is connected to a collector of the second transistor; and/or the presence of a gas in the gas,

8. The drive protection circuit according to claim 2, wherein the drive protection circuit further comprises an amplifying block including an amplifying unit and a releasing unit;

9. The drive protection circuit of claim 8, wherein the amplifying unit comprises a seventh resistor, an eighth resistor, a third transistor, and a fourth transistor;

10. The drive protection circuit of claim 8, wherein the discharging unit comprises a ninth resistor, a fifth transistor, and a sixth transistor;

11. A three-phase converter comprising a power supply and the drive protection circuit of any one of claims 1-10, the power supply being arranged in series with the semiconductor switching devices.