CN218512881U - Detachable and extensible core board of embedded Linux system - Google Patents

Abstract

The utility model relates to a detachable and expandable core board of an embedded Linux system, which comprises a PCB (printed circuit board), a connector, a PIN group and a via hole; the connector comprises a CON10, a CON11, a CON12 and a CON13; the length of the PCB is 60mm, and the width of the PCB is 50mm; the length of the connector is 23.2mm, and the width of the connector is 3.3mm; each connector is provided with two PIN foot groups; the connector is provided with 80PIN legs. The utility model discloses a nuclear core plate can embedded Linux system of independent operation, makes things convenient for the dismouting. The addition and deletion of specific peripherals can be carried out on the bottom plate, and the core plate does not need to be changed; all PIN PINs of the chip are led out, so that the performance of the chip is fully exerted. The problems that chips of different models are difficult to disassemble and assemble, peripheral equipment is difficult to expand, and chip interfaces are insufficient are successfully solved, production efficiency is improved, the repeatable utilization degree of the chips is improved, and cost is saved.

Description

Detachable and extensible core board of embedded Linux system

Technical Field

The utility model belongs to the technical field of integrated circuit, especially, relate to a core plate of embedded Linux system dismantled and assembled, extended.

Background

At present, in the embedded field, an arm chip and a peripheral are generally drawn in a schematic diagram, and as a result, the peripheral of the chip is fixed, and external chips and components which meet (or do not meet) the project cannot be added (or deleted) according to specific requirements, for example: serial port, USB, GPIO, camera, etc. Not only cause the waste of chip performance but also promoted development cost, developed dismantled and assembled, the embedded Linux system's of extension kernel board be the urgent need for the problem that awaits solution in this area.

Disclosure of Invention

To the above-mentioned technical problem among the correlation technique, the utility model provides a core plate of dismantled and assembled, extended embedded Linux system can overcome above-mentioned prior art's not enough. The technical scheme is as follows:

a detachable and expandable core board of an embedded Linux system comprises a PCB, wherein the length of the PCB is 60mm, and the width of the PCB is 50mm; four connectors of CON10, CON11, CON12 and CON13 are arranged on the bottom surface of the PCB; the length of the connector is 23.2mm, the width of the connector is 3.3mm, and the height of the connector is 1.5mm; each connector is provided with two PIN foot groups; the PIN foot group is provided with 40 PIN feet; the central line of the CON10 is 5mm away from the left frame of the PCB; the distance between the upper end face of the CON10 and the upper edge frame of the PCB is 13.4mm; the central line of the CON11 is 5mm away from the upper frame of the PCB, and the right end face of the CON11 is 18.4mm away from the right frame of the PCB; through holes are respectively arranged on four corners of the PCB.

Further, the distance between the center point of the via hole and the two nearest frames of the PCB is 4mm.

Further, the four connectors of the CON10, the CON11, the CON12, and the CON13 have the same length and width dimensions.

Further, two PIN foot groups in the connector are parallel to each other.

Further, the CON10 is left-right symmetrical to the CON 12.

Further, the CON11 and the connector CON13 are vertically symmetrical.

Further, the connector is provided with 80PIN legs.

The utility model discloses beneficial effect: a core board of an embedded Linux system which is detachable and can expand chips, internal memories and flash memory chips is characterized in that data are transmitted between the core board and the periphery of a bottom board in a connector mode. The core board can independently run the embedded Linux system, and is convenient to disassemble and assemble. The addition and deletion of the specific peripheral equipment can be carried out on the bottom plate, the core plate does not need to be changed, but all PIN PINs of the chip are led out, and the performance of the chip is fully exerted. The problems that chips of different models are difficult to disassemble and assemble, peripheral equipment is difficult to expand, and chip interfaces are not enough are successfully solved, production efficiency is improved, the repeatable utilization degree of the chips is improved, and cost is saved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

FIG. 1 is a schematic diagram of a connector of a core board;

fig. 2, PIN sequence number representation of CON 10;

fig. 3, PIN sequence number representation of CON 11;

fig. 4, PIN sequence number representation of CON 12;

fig. 5, PIN sequence number representation of CON13;

in the figure: 500.PCB board, 501.CON10, 502.CON11, 503.CON12, 504.CON13, 505.PIN group, 506. Via hole;

<xnotran> CON10 PIN :1.1VSYS, 2.2MCU_NSOE, 3.3GPIOC8, 3.4MCU_NSWE, 5.5WIFI_CHIP_EN, 6.6MCU_OTG_PWRON, 7.7MCU_CAMERA_PN, 8.8MCU_SA2, 9.9MCU_CAMERA_PD, 10.10MCU_ETHIRQ, 11.11MCU_CAM1_RST, 12.12GND, 13.13MCU_UART0_RX, 14.14MCU_SPI0_CLK, 15.15MCU_UART0_TX, 16.16MCU_SPI0_FRM, 17.17MCU_UART1_RX, 18.18MCU_SPI0_TXD, 19.19MCU_UART1_TX, 20.20MCU_SPI0_RXD, 21.21GND, 22.22GND, 23.23MCU_SCL_0, 24.24VBAT_SYS, 24.25MCU_SDA_0, 26.26VBAT_SYS, 27.27MCU_SDA_2, 28.28VBAT_SYS, 29.29MCU_SCL_2, 30.30VBAT_SYS, 31.31MCU_SDA_1, 32.32VBAT_SYS, 33.33MCU_SCL_1, 34.34VCC1P8_RTC, 35.35GND, 36.36GND, 37.37MCU_BACKLIGHT_PWM, 38.38MCU_SD1_CLK, 39.39GND, 40.40MCU_SD1_CMD, 41.41MCU_UART3_TX, 42.42MCU_SD1_D0, 43.43MCU_UART3_RX, 44.44MCU_SD1_D1, 45.45GND, 46.46MCU_SD1_D2, 47.47GPIOC17, 48.48MCU_SD1_D3, 49.49MCU_UART2_RX, 50.50GND, 51.51MCU_UART2_TX, 52.52MCU_I2S_LRCK, 53.53GPIOC24, 54.54MCU_I2S_SDOUT, 55.55MCU_ISO7816_CLK, 56.56MCU_I2S_MCLK, 57.57GND, 58.58MCU_I2S_BCK, 59.59GND, 60.60MCU_I2S_SDIN, 61.61GPIOD8, 62.62GND, 63.63ALIVE_GPIO5, 64.64GND, 65.65MCU_SD0_CD, 66.66GND, 67.67GND, 68.68GND, 69.69GND, 70.70GND, 71.71MCU_PWRKEY, 72.72GND, 73.73MCU_PWRKEY_GPIO, 74.74MCU_SPI1_CLK, 75.75MCU_NRESETOUT, 76.76MCU_SPI1_FRM, 77.77MCU_NRESETIN, 78.78MCU_SPI1_RXD, 79.79MCU_PWREN_SYS, 80.80MCU_SPI1_TXD; </xnotran>

PIN number of CON 11: 81.1GND, 82.2GND, 83.3GND, 84.4LCD _B0, 85.5GND, 86.6LCD _B1, 87.7MCU _CAM1_D0, 88.8LCD _B2, 89.9MCU _CAM1_D1, 90.10MCU LCD u B3, 91.11MCU CAM1_D2, 92.12LCD _B4, 93.13MCU _CAM1_D3, 94.14uLCD B5, 95.15MCU CAM1 u D4, 96.1112LCD B6, 97.17MCU CAM1 u D5, 98.18LCD B7, 99.1112M9 MCU CAMu 1_D6, 100.0Gu LCD, 101.12dU 1, 102.18LCD 103.23MCU _CAM1_PCLK, 104.24LCD _G2, 105.25MCU _CAM1_MCLK, 106.26LCD _G3, 107.27GND, 108.28LCD _G4, 109.29MCU _SD7, 110.30LCD _G5, 111.31MCU _SD6, 112.32LCD _G6, 113.33MCU _SD5, 114.34LCD _G7, 115.MCU SD4, 116.36LCD _R0, 117.37MCU SD3, 118.38LCD _R1, 119.MCU 39u SD2, 120.40LCD _R2, 121.41MCU SD1, 122.42 _R3 123.43MCU _SD0, 124.44LCD _R4, 125.45GND, 126.46LCD _R5, 127.47MCU _NANDwp, 128.48LCD _R6, 129.49MCU _NNFOE, 130.50LCD _R7, 131.51MCU _RNB, 132.52LCD _CLK, 133.53MCU _NNFWE, 134.54LCD _VSYNC, 135.55MCU _ALE, 136.56LCD _HSYNC, 137.57MCU _CLE, 138.58LCD _DE, 139.59MCU _NNCS1, 140.60GND, 141.61MCU _CS0, 142.62MCU SDU SD0_CLK 143.63GND, 144.64MCU_SD0_CMD, 145.65MCU _TSI _PWRON, 146.66MCU _SD0_D0, 147.67MCU _TSI _INT, 148.68MCU _SD0_D1, 149.69MCU _SPI _WP, 150.70MCU _SD0u D2, 151.71MCU _HPu DET, 152.72MCU SDu SD0_D3, 153.73MCU _SEN0_INT, 154.74GND, 155.75MCU _TOUCH _INT, 156.76GND, 157.77MCU _KEY _VOLUP, 158.78MCU u TSI ERR1, 159.79MCU _KEY _LDVON, 160.80GPIOCOCN 0;

PIN number of CON 12: 161.1GND, 162.2GND, 163.3MIPIDSI _DP0, 164.4MIPICSI _DP0, 165.5MIPIDSI _DN0, 166.6MIPICSI _DN0, 167.7MIPIDSI _DN1, 168.8MIPICSI _DP1, 169.9MIPIDSI _DN1, 170.10MIPICSI _1, 171.11MIPIDSI _DP2, 172.1MIPICSI _DP2, 173.13MIPIDSI _, 174.14MIPI DNSI dUu 2, 175.15MIPI IDSI _ DP3, 176.2MIPICSI dpu 3, 177.17MIPI IDSI DNu DN3, 178.18MIPI _3, 179.19IDU _, 180.0MIPI _ DPu _ DNSI, 180.10MIPI _ DPu 3, 177.1111116MIPI _ DPu 3, and MIPI _ DPu _1 181.21MIPIDSI _DNCLK, 182.22MIPICSI _DNCLK, 183.23MIPIDSI _VREG _P4V, 184.24GND, 185.25GND, 186.26MCU _HDMITx2P, 187.27GND, 188.28MCU _HDMITx2N, 189.29GND, 190.30MCU _HDMITx1P, 191.31GND, 192.32MCU HDMI Tx1TxN, 193.33GND, 194.34MCU _HDMITx0P, 195.35GND, 196.36MCU u _Tx0N, 197.37GMAC _TxCLK, 198.38MCU TxUCP, 199.39GMAC _TxCLK, 200.40Uu _HDMITxCu, HDMI CN 201.41GMAC _RXER, 202.42MCU _HDMI _CEC, 203.43GMAC _MDIO, 204.44MCU _HDMI _HPD, 205.45GPIOE8, 206.46GND, 207.47GPIOE10, 208.48MCU _USB _HOST _HOSTD +, 209.49MCU _CAM1_VSYNC, 210.50MCU _USB _HOSTD-, 211.51GPIO 9, 212.52USBHSIC DATA, 213.53GPIOE11, 214.54USBHSIC STROBE, 215.55GPIOE20, 216.56GND, 217.57MCU _CAM1HYU NC, 218.58MCU LVDS u _YM, 219.590GPI12, 220.600MCU _Yp _YOUP 221.61GPIOE19, 222.62MCU, LVDS, Y1M, 223.63GPIOE16, 224.64MCU, LVDS, Y1P, 225.65GPIOE18, 226.66MCU, LVDS, Y2M, 227.67GPIOE14, 228.68MCU, LVDS, Y2P, 229.69GPIOE17, 230.70MCU, LVDS, CLKM, 231.71OE15, 232.72MCU, LVDS, CLKP, 233.73GND, 234.74MCU, LVDS, Y3M, 235.75MCU, USB ID, 236.76MCU, LVDS, Y3P, 237.77MCU, 238.78MCU, LVDS, Y4Y4M, 239.79MCU, 240.80MCU, LVDS, Y4P;

PIN number of CON 13: 241.1GND, 242.2VCC3P3_SYS, 243.3MCU _TSI1_, SYNC, 244.4VCC3P3_, SYS, 245.5MCU _, TSI1_, CLK, 246.6VCC3P3_, SYS, 247.7MCU _, TSI1_, DP, 248.8VC3P3 _, 249.9MCU u TSI1_, D7, 250.10GND, 251.11MCU _, TSI1_, D6, 252.12VC1P8 _, CAM, 253.13MCU _, TSI1_, D5, 254.1VC1P8, GND, 255.15MCU, TSI1_, du, D4, 256.16, 257.17u, TSI1_, D3 Du, D5, 254.1VC1VCu, C1P8, GND, etc 258.18VC3P3 _WIFI, 259.19MCU _TSI1_D2, 260.20VC3P3, 261.21MCU _TSI1_D1, 262.22GND, 263.23MCU _TSI1_D0, 264.24GND, 265.25GND, 266.265V _OTG, 267.27 _TCLK, 268.285V _OTG, 269.29JTAG _TDO, 270.30DC5V OTG, 271.31JTAG NTu RST, 272.32GND, 273.33JTAG TMS, 274.34GND, 275.JTAG 35tdi TDI, 270.30DC5V OTG 276.36DCIN, 277.37GND, 278.38DCIN, 279.39GND, 280.40DCIN, 281.41ADC0, 282.42DCIN, 283.43ADC1, 284.44DCIN, 285.45GND, 286.46GND, 287.47ADC3, 288.48GND, 289.49ADC4, 290.50VBAT, 291.51ADC5, 292.52VBAT, 293.53ADC6, 294.54VBAT, 295.55ADC7, 296.56VBAT, 297.57GND, 298.58VBAT, 299.59GND, 300.60VBAT, 301.61GND, 302.62VBAT, 303.63GND, 304.64, 305.65GND, 306.66GND, 307.67, 308.68, 309.69, 310.70GND, 311.71, 312.72, 313.73, 314.74, 315.76 GND, 316.78 GND, 320.76 GND, 320 GND, 320.75 GND, 320 GND, and GND.

Detailed Description

The technical solution of the present invention will be described clearly and completely with reference to the accompanying fig. 1-5 of the specification of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments; all other embodiments obtained by a person skilled in the art based on the embodiments of the present invention belong to the scope of the present invention.

Embodiment 1 discloses a removable and expandable core board of an embedded Linux system, wherein the PCB board 500 has a length of 60mm and a width of 50mm, and four connectors, respectively CON10, CON11 502, CON12 503 and CON13 504, are disposed on a bottom surface; the length of the connector is 23.2mm, the width of the connector is 3.3mm, and the height of the connector is 1.5mm; the four connectors of the CON10, CON11, CON12, and CON13, 501, 502, 503, and 504 have the same length and width dimensions. The CON10 501 is symmetrical to the CON12 503 in left and right positions; the CON11 and the connector CON13 504 are vertically symmetrical; each connector is provided with two PIN foot groups 505; the two PIN groups 505 are parallel to each other. The PIN group 505 is provided with 40 PINs; each connector is provided with 80PIN PINs; the core board can independently run the embedded Linux system, so that the assembly and disassembly are convenient, the addition and deletion of specific peripherals can be carried out on the bottom board, the core board does not need to be changed, data is transmitted between the core board and the peripherals of the bottom board in a connector mode, all pins of a chip are led out, and the performance of the chip is fully exerted; the central line of the CON10 501 is 5mm away from the left frame of the PCB 500; the distance between the upper end face of the CON10 501 and the upper edge frame of the PCB board is 13.4mm; the distance between the central line of the CON11 502 and the upper frame of the PCB 500 is 5mm, and the distance between the right end surface of the CON11 and the right frame of the PCB 500 is 18.4mm; through holes 506 are respectively arranged at four corners of the PCB 500, and the distance between the center point of each through hole 506 and the two nearest frames of the PCB 500 is 4mm. The four connector PIN PINs of the CON10 501, CON11 502, CON12 503 and CON13 504 function as follows:

serial number

CON10-80PIN foot function

Action

Serial number

CON10-80PIN foot function

Function of

1

1GND

Ground

41

41MCU_UART3_TX

Serial port 3 write pin

2

2MCU_NSOE

Touch reset signal

42

42MCU_SD1_DO

SD1 data signal

3

3GPIOC8

GPS reset signal

43

43MCU_UART3_RX

Serial port 3 read pin

4

4MCU_NSWE

LCD screen power enable signal

44

44MCU_SD1_D1

SD1 data signal

5

5WIFI_CHIP_EN

WIFI Enable Signal

45

45GND

Ground

6

6MCU_OTG_PWRON

USB-OTG enable signal

46

46MCU_SD1_D2

SD1 data signal

7

7MCU_CAMERA_PN

Camera enable signal

47

47GPIOC17

WIFI/Bluetooth reset signal

8

8MCU_SA2

SA interface signal

48

4SMCU_SD1_D3

SD1 data signal

9

9MCU_CAMERA_PD

GPIO interface camera enable pin

49

49MCU_UART2_RX

Serial port 2 read pin

10

10MCU_ETHIRQ

RGB display touch interrupt signal

50

50GND

Ground

11

11MCU_CAM1_EST

Reset signal of camera

51

51MCU_UART2_TX

Serial port 2-write pin

12

12GND

Ground

52

52MCU_I2S_LRCK

I2S left and right sound track clock

13

13MCU_UARTO_RX

Serial port 0 read signal

53

53GPIOC24

Screen power supply enable pin

14

14MCU_SPI0_CLK

SPI0 clock signal

54

54MCU_I2S_SDOUT

I2SDA data output signal

15

15MCU_UARTO_TX

Serial port 0 writing signal

55

55MCU_ISO7816_CLK

Buzzer enabling pin

16

16MCU_SPI0_FRM

SPI0 chip select signal

56

56MCU_I2SMCLK

I2S Master clock

17

17MCU_UART1_RX

Serial port 0 read signal

57

57GND

Ground

18

18MCU_SPI0_TXD

SPI0 write signal

58

58MCU_I2S_BCK

I2S audio interface bit clock

19

19MCU_UART1_TX

Serial port 1 write signal

59

59GND

Ground (floor)

20

20MCU_SPI0_RXD

SPI0 read signal

60

60MCU_I2S_SDIN

I2SAD data input signal

21

21GND

Ground

61

61GPIOD8

Infrared signal receiving pin

22

22GND

Ground

62

62GND

Ground

23

23MCU_SCL_0

i2cO clock signal

63

63ALIVE_GPI05

WIFI interrupt pin

24

24VBAT_SYS

VBAT power supply

64

64GND

Ground

25

25MCU_SDA_O

i2cO time data signal

65

65MCU_SDO_CD

TF card detection signal

26

26VBAT_SYS

VBAT power supply

66

66GND

Ground

27

27MCU_SDA_2

i2c2 data signal

67

67GND

Ground

28

28VBAT_SYS

VBAT power supply

68

68GND

Ground

29

29MCU_SCL_2

i2c2 clock signal

69

69GND

Ground

30

30VBAT_SYS

VBAT power supply

70

70GND

Ground (floor)

31

31MCU_SDA_1

i2c1 clock signal

71

T1MCU_PWRKEY

Chip core power supply control pin

32

32VBAT_SYS

VBAT power supply

72

72GND

Ground

33

33MCU_SCL_1

i2c1 data signal

73

73MCU_PWRKEY_GPIO

GPIO pin for controlling chip core power supply

34

34VCC1P8_RTC

RTC battery power supply pin

74

74MCU_SPI1_CLK

SPI1 clock signal

35

35GND

Ground

75

75MCU_NRESETOUT

MCU reset signal

36

36GND

Ground

76

76MCU_SPI1_FRM

SPI1 chip select signal

37

37MCU_BACKLIGHT_PWM

RGB interface backlight pin

77

77MCU_NRESETIN

MCU reset signal

38

38MCU_SD1_CLK

SD1 clock signal

78

78MCU_SPI1_RXD

SPI1 read signal

39

39GND

Ground (floor)

79

79MCUPWREN_SYS

VBAT power supply conversion enable signal

40

AOMCU_SD1_CMD

SD1 control signal

80

80MCU_SPI1_TXD

SPI1 write signal

Serial number

CON 11-80 PIN foot function

Function of

Serial number

CON 11-807 IN pin functions

Function of

81

1GND

Ground

121

41MCU_SD1

NAND FALSH data signal

82

2GND

Ground

122

42LCD_R3

RGB data signal

83

3GND

Ground (floor)

123

43MCU_SDO

NAND FALSH data signal

84

4LCD_BO

RGB data signal

124

44LCD_R4

RGB data signal

85

5GND

Ground

125

45GND

Ground

86

6LCD_B1

RGB data signal

126

46LCD_R5

RGB data signal

87

7MCU_CAM1_DO

Camera data signal

127

47MCU_NAND_WP

NAND FALSH write protection

88

8LCD_B2

RGB data signal

128

48LCD_R6

RGB data signal

89

9MCU_CAM1_D1

Camera data signal

129

49MCU_NNFOE

NAND FALSH read enable

90

1OLCD_B3

RGB data signal

130

50LCD_R7

RGB data signal

91

11MCU_CAM1_D2

Camera data signal

131

51MCU_RNB

NAND FALSH ready/busy signal

92

12LCD_B4

RGB data signal

132

52LCD_CLK

RGB clock signal

93

13MCU_CAM1_D3

Camera data signal

133

53MCU_NNFWE

NAND FALSH write enable

94

14LCD_B5

RGB data signal

134

54LCD_VSYNC

RGB field sync signal

95

15MCU_CAM1_D4

Camera data signal

135

55MCU_ALE

NAND FALSH address

96

16LCD_B6

RGB data signal

136

56LCD_HSYNC

RGB line synchronization signal

97

17MCU_CAM1_D5

Camera data signal

137

57MCU_CLE

NAND FALSH command

98

18LCD_B7

RGB data signal

138

58LCD_DE

RGB Enable Signal

99

19MCU_CAM1_D6

Camera data signal

139

59MCU_NNCS1

NAND FALSH chip select signal

100

20LCD_GO

RGB data signal

140

60GND

Ground

101

21MCU_CAM1_D7

Camera data signal

141

61MCU_NNCSO

NAND FALSH chip select signal

102

22LCD_G1

RGB data signal

142

62MCU_SDO_CLK

TF card clock signal

103

23MCU_CAM1_PCLK

Camera pixel clock signal

143

63GND

Ground

104

24LCD_G2

RGB data signal

144

64MCU_SDO_CMD

TF card command signal

105

25MCU_CAM1_MCLK

Master clock signal of camera

145

65MCU_TSI_PWRON

Microphone enable signal

106

26LCD_G3

RGB data signal

146

66MCU_SDO_D0

TF card data signals

107

27GND

Ground (floor)

147

67MCU_TSI_INT

Bluetooth/GPS interrupt signal

108

28LCD_G4

RGB data signal

148

68MCU_SDO_D1

TF card data signals

109

29MCU_SD7

NAND FALSH data signal

149

69MCU_SPI_WP

SPI FLASH write protection signal

110

30LCD_G5

RGB data signal

150

70MCU_SDO_D2

TF card data signals

111

31MCU_SD6

NAND FALSH data signal

151

71MCU_HP_DET

Earphone insertion detection signal

112

32LCD_G6

RGB data signal

152

72MCU_SDO_D3

TF card data signals

113

33MCV_SD5

NAND FALSH data signal

153

73MCU_SENO_INT

3-axis acceleration sensor interrupt signal

114

34LCD_67

RGB data signal

154

74GND

Ground

115

35MCU_SD4

NAND FALSH data signal

155

75MCU_TOUCH_INT

LVDS touch interrupt signal

116

36LCD_RO

RGB data signal

156

76GND

Ground

117

37MCU_SD3

NAND FMLSH data signal

157

77MCU_KEY_VOLUP

Volume key input signal

118

38LCD_R1

RGB data signal

158

78MCU_TSI_ERR1

LED enable signal

119

39MCU_SD2

NAND FALSH data signal

159

79MCU_KEY_VOLDN

Volume key input signal

120

AOLCD_R2

RGB data signal

160

80GPIOCO

GPIO signal

Serial number

1-80PIN foot function of CON12

Function of

Serial number

1-80PIN foot function of CON12

Action

161

1GND

Ground (floor)

201

41GMAC_RXER

GMAC read error signal

162

2GND

Ground (floor)

202

42MCU_HDMI_CEC

HDMI user electric appliance control signal

163

3MIPIDSI_DPO

MIPI display differential data signal

203

43GMAC_MDIO

GMAC input output data management signal

164

4MIPICSI_DPO

MIPI CAMERA differential data signal

204

44MCU_HDMI_HPD

HDMI hot plug detection signal

165

5MIPIDSI_DNO

MIPI display differential data signal

205

45GPIOE8

GMAC write data signal

166

6MIPICSI_DNO

MIPI CAMERA differential data signal

206

46GND

Ground

167

7MIPIDSI_DN1

MIPIDSI_DN1

207

47GPIOE10

GMAC write data signal

168

8MIPICSI_DP1

MIPI CAMERA differential data signal

208

48MCU_USB_HOST_D+

USB HOST data differential signal

169

9MIPIDSI_DN1

MIPI display differentialAccording to the signal

209

49MCU_CAM1_VSYNC

GMAC write data signal

170

10MIPICSI_DN1

MIPI CAMERA differential data signal

210

50MCU_USB_HOST_D-

USB HOST data differential signal

171

11MIPIDSI_DP2

MIPI display differential data signal

211

51GPIOE9

GMAC write data signal

172

12MIPICSI_DP2

MIPI CAMERA differential data signal

212

52USBHSIC_DATA

USB HSIC data signal

173

13MIPIDSI_DN2

MIPI display differential data signal

213

53GPIOE11

GMAC write enable signal

174

14MIPICSI_DN2

MIPI CAMERA differential data signal

214

54USBHSIC_STROBE

USB HSIC STROBE signal

175

15MIPIDSI_DP3

MIPI display differential data signal

215

55GPIOE20

GMAC management data clock signal

176

16MIPICSI_DP3

MIPI CAMERA differential data signal

216

56GND

Ground

177

17MIPIDSI_DN3

MIPI display differential data signal

217

57MCU_CAM1_HYNC

Collision detection in GMAC half-duplex mode

178

18MIPICSI_DN3

MIPI CAMERA differential data signal

218

58MCU_LVDS_YOM

LVDS differential data signal

179

19MIPIDSI_DPCLK

MIPI display differential clock signal

219

59GPIOE12

GMAC write data errors

180

20MIPICSI_DPCLK

MIPI CAMERA differential clock signal

220

60MCU_LVDS_YOP

LVDS differential data signal

181

21MIPIDSI_DNCLK

MIPI display differential clock signal

221

61GPIOE19

GMAC read data validation

182

22MIPICSI_DNCLK

MIPI CAMERA differential clock signal

222

62MCU_LVDS_Y1M

LVDS differential data signal

183

23MIPIDSI_VREG_0P4V

-

223

63GPIOE16

GMAC read data signal

184

24GND

Ground (floor)

224

64MCU_LVDS_Y1P

LVDS differential data signal

185

25GND

Ground

225

65GPIOE18

GMAC read clock signal

186

26MCU_HDMI_TX2P

HDMI data differential signal

226

66MCU_LVDS_Y2M

LVDS differential data signal

187

27GND

Ground

227

67GPIOE14

GMAC read data signal

188

28MCU_HDMI_TX2N

HDMI data differential signal

228

68MCU_LVDS_Y2P

LVDS differential data signal

189

29GND

Ground (floor)

229

69GPIOE17

GMAC read data signal

190

30MCU_HDMI_TX1P

HDMI data differential signal

230

70MCU_LVDS_CLKM

LVDS differential clock signal

191

31GND

Ground (floor)

231

71GPIOE15

GMAC read data signal

192

32MCU_HDMI_TX1N

HDMI data differential signal

232

72MCU_LVDS_CLKP

LVDS differential clock signal

193

33GND

Ground

233

73GND

Ground

194

34MCU_HDMI_TXOP

HDMI data differential signal

234

74MCU_LVDS_Y3M

LVDS differential data signal

195

35GND

Ground

235

75MCU_USB_ID

USB ID detection signal

196

36MCU_HDMI_TXON

HDMI data differential signal

236

76MCU_LVDS_Y3P

MCU_LVDS_Y3M

197

37GMAC_TXCLK

GMAC write clock signal

237

77MCU_USB

USB data differenceSub-signal

198

38MCU_HDMI_TXCP

HDMI clock differential signal

238

78MCU_LVDS_Y4M

LVDS differential data signal

199

39GMAC_CRS

OMAC carrier sense signal

239

79MCU_USB

USB data differential signal

200

40MCU_HDMI_TXCN

HDMI clock differential signal

240

80MCU_LVDS_Y4P

LVDS differential data signal

Serial number

1-80PIN foot function of CON13

Function of

Serial number

1-80PIN foot function of CON13

Function of

241

1 GND

Ground (floor)

281

41ADCO

Digital-to-analog conversion signal

242

2VCC3P3_SYS

3.3V power supply

282

42DCIN

DC power supply

243

3MCU_TSI1_SYNC

Camera line synchronizing signal

283

43ADC1

Digital-to-analog conversion signal

244

4VCC3P3_SYS

3.3V power supply

284

44DCIN

DC power supply

245

5MCU_TSI1_CLK

Camera pixel clock

285

45GND

Ground

246

6VCC3P3_SYS

3.3V power supply

286

46GND

Ground

247

7MCU_TSI1_DP

Camera field sync signal

287

47ADC3

Digital-to-analog conversion signal

248

8VCC3P3_SYS

3.3V power supply

288

48GND

Ground

249

9MCU_TSI1_D7

Camera data signal

289

49ADC4

Digital-to-analog conversion signal

250

10GND

Ground (floor)

290

50VBAT

VBAT power supply

251

11MCU_TSI1_D6

Camera data signal

291

51ADC5

Digital-to-analog converted signal

252

12VCC1P8_CAM

1.8V power supply

292

52VBAT

VBAT power supply

253

13MCU_TSI1D5

Camera data signal

293

53ADC6

Digital-to-analog converted signal

254

14VCC1P8_CAM

1.8V power supply

294

54VBAT

VBAT power supply

255

15MCU_TSI1_D4

Camera data Signal

295

55ADC7

Digital-to-analog converted signal

256

16GND

Ground (floor)

296

56VBAT

VBAT power supply

257

17MCU_TSI1_D3

Camera data Signal

297

57GND

Ground (floor)

258

18VCC3P3_WIFI

3.3V power supply

298

58VBAT

VBAT power supply

259

19MCU_TSI1_D2

Camera data Signal

299

59GND

Ground (floor)

260

20VCC3P3_WIFI

3.3V power supply

300

60VBAT

VBAT power supply

261

21MCU_TSI1_D1

Camera data signal

301

61GND

Ground (floor)

262

22GND

Ground

302

62VBAT

VBAT power supply

263

23MCU_TSI1_D0

Camera data signal

303

63GND

Ground

264

24GND

Ground

304

64GND

Ground (floor)

265

25GND

Ground

305

65GND

Ground

266

26DC5V_OTG

5V power supply

306

66GND

Ground

267

27JTAG_TCLK

JTAG clock signal

307

67GND

Ground

268

28DC5V_OTG

5V power supply

308

68GND

Ground

269

29JTAG_TDO

JTAG data output signal

309

69GND

Ground

270

30DC5V_OTG

5V power supply

310

70GND

Ground

271

31JTAG_NTRST

JTAG reset signal

311

71GND

Ground

272

32GND

Ground

312

72GND

Ground

273

33JTAG_TMS

JTAG mode select signal

313

73GND

Ground

274

34GND

Ground

314

74GND

Ground

275

35JTAG_TDI

JTAG data input signals

315

75GND

Ground

276

36DCIN

DC power supply

316

76GND

Ground

277

37GND

Ground

317

77GND

Ground

278

38DCIN

DC power supply

318

78GND

Ground

279

39GND

Ground

319

79GND

Ground

280

40DCIN

DC power supply

320

806ND

Ground

The present invention is not limited to the above-mentioned preferred embodiments, and any person can obtain other products in various forms under the teaching of the present invention, but any variation on the method is possible, and all the technical solutions identical or similar to the present application fall within the protection scope of the present invention.

Claims (7)

1. A core board of a detachable and expandable embedded Linux system comprises a PCB (500), and is characterized in that the length of the PCB (500) is 60mm, and the width of the PCB is 50mm; four connectors, namely CON10 (501), CON11 (502), CON12 (503) and CON13 (504), are arranged on the bottom surface of the PCB (500); the length of the connector is 23.2mm, the width of the connector is 3.3mm, and the height of the connector is 1.5mm; each connector is provided with two PIN foot groups (505); the PIN foot group (505) is provided with 40 PIN feet; the central line of the CON10 (501) is 5mm away from the left frame of the PCB board (500); the distance between the upper end face of the CON10 (501) and the upper edge frame of the PCB board (500) is 13.4mm; the central line of the CON11 (502) is 5mm away from the upper frame of the PCB (500), and the right end face of the CON11 (502) is 18.4mm away from the right frame of the PCB (500); through holes (506) are respectively arranged at four corners of the PCB (500).

2. The removable, extensible core board for an embedded Linux system of claim 1, wherein the vias (506) have center points that are 4mm from the nearest borders of the PCB (500).

3. The core board of the removable, extensible embedded Linux system of claim 1, wherein the four connectors of the CON10 (501), the CON11 (502), the CON12 (503), and the CON13 (504) have the same length and width dimensions.

4. The removable, extensible core board for an embedded Linux system of claim 1, wherein two sets of PIN pads (505) within the connector are parallel to each other.

5. The core board of the removable, extensible embedded Linux system of claim 1, wherein the CON10 (501) is left-right symmetric with the CON12 (503).

6. The removable, extensible core board for embedded Linux system of claim 1, wherein the CON11 (502) is vertically symmetrical to the connector CON13 (504).

7. The removable, extensible core board for an embedded Linux system of claim 1, wherein the connectors have a total of 80PIN PINs.

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