CN218273375U - AST 2500-based BMC management module and server system - Google Patents

Abstract

The utility model provides a BMC management module and server system based on AST2500 constitutes BMC management module based on AST2500 through BMC chip, connector, SDRAM device, FLASH device, circuit board, and dispose two way IPMB buses on the BMC chip, USB bus and the PCIE bus of the at least way all the way at least, SDRAM device and FLASH device all are connected with BMC chip electricity, the connector simultaneously with two way IPMB buses, the USB bus of the at least way, PCIE bus electricity is connected all the way at least. In other words, during implementation, because the BMC chip, the connector, the SDRAM device, and the FLASH device are all disposed on the circuit board (forming an integrated structure), a corresponding BMC circuit does not need to be designed for each server motherboard, but connection between the BMC chip and the server motherboard is established through the plugging effect of the connector, so as to achieve data interaction between the BMC chip and the server motherboard. The development difficulty of the BMC part of the server project is reduced, the development period of the whole project is greatly shortened, and the professional technical requirements on the BMC of developers are reduced.

Description

AST 2500-based BMC management module and server system

Technical Field

The utility model relates to a circuit board technical field, concretely relates to BMC management module and server system based on AST 2500.

Background

Currently, a BMC (Baseboard management Controller) is an indispensable component of a server for monitoring operating conditions of the server, such as temperature, fan speed, power supply condition, operating system status …, and the like. The BMC operates independently of the server system, is not influenced by the server system, can perform operations such as firmware upgrading on the machine, checking machine equipment, remotely controlling the machine to be started and the like in a state that the machine is not started, and can record key logs when the server system is broken down.

In the existing manufacturing process, the BMC management circuit and the server mainboard are designed on the same printed circuit board, so that the BMC circuit is redesigned once when one server mainboard is produced, and the BMC management circuit has strong speciality, so that requirements on software and hardware personnel for designing the server are high. The software development speciality of BMC is also strong, and specialized people are often required to develop the BMC. The development difficulty of the BMC part of the server project is increased, the development period of the whole project is greatly increased, and the professional technical requirement on the BMC of a developer is high.

Meanwhile, a great deal of time, energy and money are needed in the development process of the server, so that the related functions of the server can be realized through the BMC and the server mainboard. In addition, some existing BMCs have a problem of poor compatibility, for example, cannot adapt to different server motherboards.

Therefore, the prior art is to be improved.

SUMMERY OF THE UTILITY MODEL

The utility model discloses a main aim at provides a BMC management module and server system based on AST2500 to solve the big technical problem of the server development degree of difficulty among the correlation technique at least.

The utility model discloses a first aspect provides a BMC management module based on AST2500, BMC management module based on AST2500 includes BMC chip, connector, SDRAM device, FLASH device and circuit board; the BMC chip is provided with two IPMB buses, at least one USB bus and at least one PCIE bus; the SDRAM device and the FLASH device are both electrically connected with the BMC chip; the connector is electrically connected with the two IPMB buses, the at least one USB bus and the at least one PCIE bus simultaneously; the connector is used for being inserted on a server mainboard, and the BMC chip, the SDRAM device, the FLASH device and the connector are all arranged on the circuit board.

The utility model discloses a second aspect provides a server system, the BMC management module based on AST2500 including server mainboard and first aspect.

The utility model provides a BMC management module and server system based on AST2500 constitutes BMC management module based on AST2500 through BMC chip, connector, SDRAM device, FLASH device, circuit board to and dispose two way IPMB buses on the BMC chip, USB bus and the at least PCIE bus of the same kind all the way at least, SDRAM device and FLASH device all are connected with the BMC chip electricity, the connector simultaneously with two way IPMB buses, the USB bus of the same kind at least, PCIE bus electricity is connected all the way at least. When the method is implemented, the BMC chip, the connector, the SDRAM device and the FLASH device are all arranged on the circuit board (form an integrated structure), so that the connection between the BMC chip and the server mainboard is established through the plugging function of the connector without designing a corresponding BMC circuit when one server mainboard is produced, and the data interaction between the BMC chip and the server mainboard is realized. The development difficulty of the BMC part of the server project is reduced, the development period of the whole project is greatly shortened, and the professional technical requirements on the BMC of developers are reduced.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art without creative efforts.

Fig. 1 is a schematic structural diagram of a BMC management circuit and a server motherboard in the related art;

fig. 2 is a schematic structural diagram of an AST 2500-based BMC management module according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of a BMC management module based on AST2500 according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of a circuit board according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of a circuit board according to an embodiment of the present invention;

fig. 6 is a schematic software configuration diagram of the BMC management module based on AST2500 according to an embodiment of the present invention.

The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.

Detailed Description

It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

It is noted that relative terms such as "first," "second," and the like may be used to describe various components, but these terms are not intended to limit the components. These terms are only used to distinguish one component from another component. For example, a first component could be termed a second component, and, similarly, a second component could be termed a first component, without departing from the scope of the present invention. The term "and/or" refers to a combination of any one or more of the associated items and the descriptive items.

Referring to fig. 1, in the server disclosed in the related art, conventionally, in the current manufacturing process, the BMC management circuit and the server motherboard are directly designed on the same printed circuit board, the BMC circuit needs to be redesigned once when one server motherboard is produced, and the BMC management circuit has high speciality, which may cause high requirements on software and hardware personnel designing the server. The software development speciality of BMC is also strong, and specialized people are often required to develop the BMC. The technical problem that the development difficulty of the BMC part of the server project is increased is caused, meanwhile, the development period of the whole project is greatly increased, and the requirement on professional technology in the aspect of BMC of developers is high.

To solve the above technical problem, referring to fig. 2-3, the BMC management module based on AST2500 includes a BMC chip 1, a connector 2, an SDRAM device 4 (synchronous dynamic random access memory), a FLASH device 3 (FLASH memory), and a circuit board 6.

Specifically, the BCM chip 1 is configured with two IPMB buses (Intelligent Platform Management buses), at least one USB Bus (Universal Serial Bus), and at least one PCIE Bus (peripheral component interconnect express, high-speed Serial computer expansion Bus standard). For a BCM chip 1 configuration bus, two IPMB buses are provided, which is understood to be that two interfaces are provided on the BCM chip 1, and functional pin definitions are performed on the two interfaces so that the two interfaces meet the transmission protocol of the IPMB bus; similar principles apply to other bus configurations and will not be described further. And the specific model of the BCM chip 1 may be AST2500, which is a chip belonging to the AST2000 series of products for a server.

The IPMB bus is a general term for two sets of redundant I2C buses for communication between FRU backplanes of an Advanced Telecom Computing platform (ATCA), and is used for interconnection with other server motherboards (interconnection between server motherboards through connectors). At least one USB bus and at least one PCIE bus are matched together and used for being connected with a Central Processing Unit (CPU) to realize interconnection.

Specifically, the connector 2 may be a connector having a connection function, such as an RJ45, which has a plugging function and is used for plugging onto the server motherboard 7, so as to indirectly achieve connection between the BMC chip 1 and the server motherboard 7.

The SDRAM device 4 and the FLASH device 3 are both electrically connected with the BMC chip 1 and provide data storage and cache functions for the BMC chip 1; the connector 2 is simultaneously electrically connected with the two IPMB buses, the at least one USB bus and the at least one PCIE bus, and the BMC chip 1, the SDRAM device 4, the FLASH device 3 and the connector 2 are all arranged on the circuit board 6. In implementation, because the BMC chip 1, the connector 2, the SDRAM device 4, and the FLASH device 3 are all disposed on one circuit board (forming an integrated structure and a module), a corresponding BMC circuit does not need to be designed for each server motherboard 7, but the connection between the BMC chip 1 and the server motherboard 7 is established through the plugging effect of the connector 2, so as to implement data interaction between the two. The development difficulty of the BMC part of the server project is reduced, the development period of the whole project is greatly shortened, and the professional technical requirements on the BMC of developers are reduced.

Referring to fig. 4 and 5, the circuit board 6 has a first surface 61 and a second surface opposite to the first surface 61, the first surface 61 includes a first central area 61A and a plurality of side areas surrounding the first central area, the side areas are a first side area 61B, a second side area 61C, a third side area 61D, and a fourth side area 61E, respectively; wherein the BMC chip 1 is disposed in the first central region 61A, the connector 2 is disposed on the second surface, and the SDRAM device 4 and the FLASH device 3 are disposed in the side regions.

It should be noted that the first central region 61A, the first side region 61B, the second side region 61C, the third side region 61D, and the fourth side region 61E shown in fig. 5 all only approximately indicate the relative positions of the regions, and the specific shape and coverage of each region may be actually and appropriately adjusted according to the shape and thickness of the actual main board, and are not limited to those shown in fig. 5. It should be understood that the division of the areas on the circuit board 6 is mainly to distribute the corresponding devices in a reasonable position, so as to fully utilize the space of the circuit board.

In this embodiment, more buses for transmitting various information are further configured on the BMC chip 1, and the following details are provided for the other configured buses: the BMC chip 1 is also provided with a gigabit Ethernet bus supporting IPMI1.5/2.0 protocol, and the gigabit Ethernet bus is electrically connected with the connector 2; thereby enabling the creation of a local area network and allowing multiple local devices to share information and work in concert. A CPU communication bus is also configured on the BMC chip 1 and used for exchanging information with a CPU; therefore, the BMC chip 1 performs data transmission with the CPU through one CPU communication bus. The BMC chip is also provided with a VGA bus which is used for being electrically connected with the display. Meanwhile, a PWR device 5 (Power) is further included so as to receive Power to drive the BMC chip 1.

In this embodiment, the AST 2500-based BMC management module further includes an intelligent fan disposed on the circuit board, and the BMC chip is further configured with four PWM signal buses for controlling the intelligent fan, so that the entire BMC management module is subjected to heat dissipation processing by the intelligent fan.

In this embodiment, the AST 2500-based BMC management module further includes a first LED lamp and a second LED lamp, both of which are electrically connected to the BMC chip, the first LED lamp is used to display an operating state of the BMC chip, and the second LED lamp is used to display an operating state of the system.

In this embodiment, the BMC chip is further configured with a slot number reading signal bus and a Serial Peripheral Interface (SPI) bus for offline updating of BIOS (Basic Input Output System) firmware. And 8 external ADC (Analog-to-Digital Converter) channels for detecting Analog quantity information; 1 path of Inter-Integrated Circuit (I2C) bus is led out to the outside and is used for hanging a sensor of an I2C interface; the external 4-way General-purpose GPIO (General-purpose input/output) is provided, and the function can be flexibly configured.

Referring to fig. 6, a debug bus is further configured on the BMC chip 1, and the debug bus is used for accessing a Linux terminal of the BMC chip; the software of the BMC management module is based on a Linux operating system. The IPMI function is realized in a BMC management program, the web page function is developed based on lighttpd service, and all processes communicate through UDS.

In this embodiment, the AST 2500-based BMC management module further includes a heat dissipation structure, the heat dissipation structure is attached to the BMC chip, and a heat conducting medium is filled between the heat dissipation structure and the BMC chip and used for dissipating heat from the BMC chip, so that the entire BMC management module is more stable in operation. The heat dissipation structure can be made of a ceramic substrate and metal (such as copper, aluminum and the like), and can comprise a body and a plurality of fins arranged on the body at intervals, wherein the body is attached to the BMC chip.

In this embodiment, the circuit board further includes a clock module disposed in a region where the third side region intersects with the fourth side region and electrically connected to the BMC chip, and the clock module is configured to record the system time without a network.

It should be noted that, in other embodiments, the three-dimensional visual development board may further include other interfaces or other functional modules, which are not limited herein.

The above is only the preferred embodiment of the present invention, and not the scope of the present invention, all the equivalent structures or equivalent flow changes made by the contents of the specification and the drawings or the direct or indirect application in other related technical fields are included in the patent protection scope of the present invention.

Claims (10)

1. A BMC management module based on AST2500 is characterized in that the BMC management module based on AST2500 comprises a BMC chip, a connector, an SDRAM device, a FLASH device and a circuit board;

the BMC chip is provided with two IPMB buses, at least one USB bus and at least one PCIE bus;

the SDRAM device and the FLASH device are both electrically connected with the BMC chip;

the connector is electrically connected with the two IPMB buses, the at least one USB bus and the at least one PCIE bus simultaneously;

the connector is used for being inserted on a server mainboard, and the BMC chip, the SDRAM device, the FLASH device and the connector are all arranged on the circuit board.

2. The AST 2500-based BMC management module of claim 1, wherein the circuit board has a first surface and a second surface opposite the first surface, the first surface comprising a first central region and a plurality of side regions surrounding the first central region;

the BMC chip is arranged in the first central area, the connector is arranged on the second surface, and the SDRAM device and the FLASH device are arranged in the side areas.

3. The AST 2500-based BMC management module of claim 2, wherein a gigabit ethernet bus is further configured on the BMC chip, the gigabit ethernet bus being electrically connected to the connector.

4. The AST 2500-based BMC management module of claim 3, wherein the BMC chip is further configured with a debug bus, the debug bus being configured to access a Linux terminal of the BMC chip.

5. The AST 2500-based BMC management module of claim 4, wherein the BMC chip is further configured with a CPU communication bus, the CPU communication bus being configured to exchange information with a CPU.

6. The AST 2500-based BMC management module of claim 5, wherein the AST 2500-based BMC management module further comprises a smart fan disposed on the circuit board, the BMC chip further configured with a four-way PWM signal bus thereon, the PWM signal bus to control the smart fan.

7. The AST 2500-based BMC management module of claim 6, wherein the BMC chip is further configured with a VGA bus, the VGA bus configured to electrically couple to a display.

8. The AST 2500-based BMC management module of claim 1, further comprising a first LED lamp and a second LED lamp, the first LED lamp and the second LED lamp each electrically connected to the BMC chip, the first LED lamp for displaying an operational status of the BMC chip, the second LED lamp for displaying an operational status of a system.

9. The AST 2500-based BMC management module of claim 1, wherein the AST 2500-based BMC management module further comprises a heat dissipation structure attached to the BMC chip, the heat dissipation structure and the BMC chip being filled with a thermally conductive medium therebetween.

10. A server system comprising a server motherboard and the AST 2500-based BMC management module of any one of claims 1-9.

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