CN217824741U - Switching power supply and passive phase-shifted full-bridge ZVZCS converter thereof - Google Patents
Switching power supply and passive phase-shifted full-bridge ZVZCS converter thereof Download PDFInfo
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- CN217824741U CN217824741U CN202222019839.2U CN202222019839U CN217824741U CN 217824741 U CN217824741 U CN 217824741U CN 202222019839 U CN202222019839 U CN 202222019839U CN 217824741 U CN217824741 U CN 217824741U
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Abstract
The utility model discloses a switching power supply and passive phase-shifting full-bridge ZVZCS converter thereof, include: the bridge comprises a leading bridge arm consisting of a first switch device and a second switch device, a lagging bridge arm consisting of a third switch device and a fourth switch device, a first capacitor, a first transformer and a second transformer; the output end of the leading bridge arm is connected with one end of the primary winding of the first transformer through a first capacitor, and the output end of the lagging bridge arm is connected with one end of the primary winding of the second transformer; the other end of the primary winding of the first transformer is connected with the other end of the primary winding of the second transformer; one end of the secondary winding of the first transformer is connected with the first output end of the converter; one end of the secondary winding of the second transformer is connected with the first output end of the converter; and the other end of the secondary winding of the first transformer is connected with the second output end of the converter and the other end of the secondary winding of the second transformer. Thus, the conversion efficiency of the converter can be improved.
Description
Technical Field
The utility model relates to a switching power supply technical application field, concretely relates to switching power supply and passive phase-shifting full-bridge ZVZCS converter thereof.
Background
With the rapid development of electronic power systems, switching power supplies are widely applied, are generally realized by adopting a topological structure, have low structural cost, and have the defects of serious duty ratio loss, large on-off loss, poor stability and the like in a converter control circuit due to the loss in actual work, so that the conversion efficiency of the converter is low.
Therefore, the conversion efficiency of the conventional switching power converter still needs to be improved.
SUMMERY OF THE UTILITY MODEL
The utility model provides a pair of switching power supply and passive full-bridge ZVZCS converter that moves phase thereof aims at improving conversion efficiency.
According to a first aspect, there is provided in an embodiment a passive phase-shifted full-bridge ZVZCS converter comprising: the first capacitor is connected with the first transformer, and the second capacitor is connected with the second transformer;
the first switching device, the second switching device, the third switching device and the fourth switching device form a full-bridge circuit; the first switch device and the second switch device form a leading bridge arm, and the third switch device and the fourth switch device form a lagging bridge arm;
the output end of the leading bridge arm is connected with one end of the primary winding of the first transformer through a first capacitor, and the output end of the lagging bridge arm is connected with one end of the primary winding of the second transformer; the other end of the primary winding of the first transformer is connected with the other end of the primary winding of the second transformer; one end of the secondary winding of the first transformer is connected with the first output end of the converter; one end of the secondary winding of the second transformer is connected with the first output end of the converter; the other end of the secondary winding of the first transformer is connected with the second output end of the converter and the other end of the secondary winding of the second transformer;
the first output end of the converter is used for being connected with one end of a load, and the second output end of the converter is used for being connected with the other end of the load.
An embodiment provides the passive phase-shifted full-bridge ZVZCS converter, further including: a first excitation inductor of the first transformer and a second excitation inductor of the second transformer;
the first excitation inductor is connected with a primary winding of the first transformer in parallel; the second excitation inductor is connected with the primary winding of the second transformer in parallel.
An embodiment provides in the passive phase-shifted full-bridge ZVZCS converter, further including: a first diode, a second diode and a second capacitor;
one end of the secondary winding of the first transformer is connected with the anode of a first diode, and the cathode of the first diode is connected with the first output end of the converter and one end of a second capacitor; the other end of the second capacitor is connected with a second output end of the converter; one end of the secondary winding of the second transformer is connected with the anode of a second diode, and the cathode of the second diode is connected with the first output end of the converter.
In the passive phase-shifted full-bridge ZVZCS converter provided by an embodiment, a filter capacitor is further included;
one end of the filter capacitor is used for connecting one end of the first switching device and one end of the third switching device and is also used for connecting the anode of the power supply; the other end of the first switch device is the output end of the leading bridge arm and is connected with one end of a second switch device, and the other end of the second switch device is connected with the other end of the filter capacitor and the other end of the fourth switch device; the other end of the filter capacitor is connected with the negative electrode of the power supply; the other end of the third switching device is an output end of the hysteresis bridge arm and is connected with one end of the fourth switching device.
An embodiment provides in the passive phase-shifted full-bridge ZVZCS converter, further including: a third diode, a fourth diode, a fifth diode and a sixth diode;
one end of the first switching device is connected with the cathode of the third diode, and the other end of the first switching device is connected with the anode of the third diode; one end of the second switching device is connected with the cathode of the fourth diode, and the other end of the second switching device is connected with the anode of the fourth diode; the other end of the third switching device is connected with the anode of a fifth diode, the cathode of the fifth diode is the output end of the hysteresis bridge arm and is connected with the anode of a sixth diode, and the cathode of the sixth diode is connected with one end of the fourth switching device.
An embodiment provides the passive phase-shifted full-bridge ZVZCS converter, further including a third capacitor and a fourth capacitor;
one end of the first switch device is connected with the other end of the first switch device through a third capacitor; one end of the second switching device is connected with the other end of the second switching device through a fourth capacitor.
An embodiment provides that in the passive phase-shifted full-bridge ZVZCS converter,
the control end of the first switching device is used for receiving a first control signal in one switching period; the first control signal is used for controlling the first switching device to be switched on in a time interval from the starting moment of a switching period to a preset first moment, to be switched off in a time interval from the preset first moment to a preset eighth moment, and to be switched on in a time interval from the preset eighth moment to the starting moment of the next switching period;
the control end of the second switching device is used for receiving a second control signal in a switching period; the second control signal is used for controlling the second switching device to be turned off in a time interval from the starting moment of the switching period to a preset second moment, to be turned on in a time interval from the preset second moment to a preset seventh moment, and to be turned off in a time interval from the preset seventh moment to the starting moment of the next switching period;
the control end of the third switching device is used for receiving a third control signal in one switching period; the third control signal is used for controlling the third switching device to be turned off in a time interval from the starting moment of the switching period to a preset fifth moment, to be turned on in a time interval from the preset fifth moment to a preset ninth moment, and to be turned off in a time interval from the preset ninth moment to the starting moment of the next switching period;
the control end of the fourth switching device is used for receiving a fourth control signal in one switching period; the fourth control signal is used for controlling the fourth switching device to be switched on in a time interval from the starting time of the switching period to a preset fourth time and to be switched off in a time interval from the preset fourth time to the starting time of the next switching period;
the starting time, the first time, the second time, the fourth time, the fifth time, the seventh time, the eighth time and the ninth time are time sequences from first to last in the same switching cycle.
In the passive phase-shifted full-bridge ZVZCS converter according to an embodiment, the first switching device is a first MOS transistor, the second switching device is a second MOS transistor, the third switching device is a first triode, and the fourth switching device is a second triode; the drain electrode of the first MOS tube is one end of the first switch device, the source electrode of the first MOS tube is the other end of the first switch device, and the grid electrode of the first MOS tube is the control end of the first switch device; the drain electrode of the second MOS tube is one end of a second switch device, the source electrode of the second MOS tube is the other end of the second switch device, and the grid electrode of the second MOS tube is the control end of the second switch device; the collector of the first triode is one end of the third switching device, the emitter of the first triode is the other end of the third switching device, and the base of the first triode is the control end of the third switching device; the collector of the second triode is one end of the fourth switching device, the emitter of the second triode is the other end of the fourth switching device, and the base of the second triode is the control end of the fourth switching device.
In the passive phase-shifted full-bridge ZVZCS converter according to an embodiment, a time when a voltage between the output terminal of the leading bridge arm and the output terminal of the lagging bridge arm decreases to 0 is a second time.
An embodiment provides a switching power supply comprising a passive phase-shifted full-bridge ZVZCS converter as described above.
According to the above embodiment, a switching power supply and its passive phase-shifted full-bridge ZVZCS converter includes: the system comprises a leading bridge arm consisting of a first switching device and a second switching device, a lagging bridge arm consisting of a third switching device and a fourth switching device, a first capacitor, a first transformer and a second transformer; the output end of the leading bridge arm is connected with one end of a primary winding of a first transformer through a first capacitor, and the output end of the lagging bridge arm is connected with one end of a primary winding of a second transformer; the other end of the primary winding of the first transformer is connected with the other end of the primary winding of the second transformer; one end of the secondary winding of the first transformer is connected with a first output end of the converter; one end of the secondary winding of the second transformer is connected with the first output end of the converter; the other end of the secondary winding of the first transformer is connected with the second output end of the converter and the other end of the secondary winding of the second transformer. Thus, the conversion efficiency of the converter can be improved.
Drawings
Fig. 1 is a schematic circuit diagram of an embodiment of a converter according to the present invention;
fig. 2 is a waveform diagram of various voltages and currents in a switching cycle in the converter provided by the present invention;
fig. 3 is an equivalent circuit diagram of the converter at time t0-t1 in the converter provided by the present invention;
fig. 4 is an equivalent circuit diagram of the converter at time t1-t2 in the converter provided by the present invention;
fig. 5 is an equivalent circuit diagram of the converter at time t2-t3 in the converter provided by the present invention;
fig. 6 is an equivalent circuit diagram of the converter at time t3-t4 in the converter provided by the present invention;
fig. 7 is an equivalent circuit diagram of the converter at time t5-t6 in the converter provided by the present invention;
fig. 8 is an equivalent circuit diagram of the converter at time t6-t7 in the converter provided by the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings. Wherein like elements in different embodiments have been given like element numbers associated therewith. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, one skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of clearly describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where a certain sequence must be followed.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).
Aiming at the problems of working efficiency of the existing switching power supply, the passive phase-shifting full-bridge ZVZCS converter is provided, the problems of conversion circulation current, duty ratio and IGBT tailing of a leading bridge arm and a lagging bridge arm are solved, soft switching of a transistor ZVZCS (zero-voltage zero-current switch) is realized in a range with large load change of a secondary end, the problem of leakage inductance oscillation interference is eliminated, and the working efficiency and the noise suppression ratio of the whole circuit are improved. The following is a detailed description of some specific examples.
As shown in fig. 1, the utility model provides a passive phase-shifted full-bridge ZVZCS converter, include: the circuit comprises a first switching device Q1, a second switching device Q2, a third switching device Q3, a fourth switching device Q4, a first capacitor C1, a first transformer T1 and a second transformer T2. The first switching device Q1, the second switching device Q2, the third switching device Q3 and the fourth switching device Q4 form a full bridge circuit, specifically, the first switching device Q1 and the second switching device Q2 form a leading bridge arm, and the third switching device Q3 and the fourth switching device Q4 form a lagging bridge arm.
The output end a of the leading bridge arm is connected to one end of the primary winding of the first transformer T1 through the first capacitor C1, and in this embodiment, the output end a of the leading bridge arm is specifically connected to the end of the same name of the primary winding of the first transformer T1 through the first capacitor C1. The first capacitor C1 is a blocking capacitor. The output end b of the lagging bridge arm is connected with one end of the primary winding of the second transformer T2, in the embodiment, the homonymous end of the primary winding of the second transformer T2 is connected with the output end b of the lagging bridge arm. The other end of the primary winding of the first transformer T1 is connected to the other end of the primary winding of the second transformer T2, and in this embodiment, specifically, the synonym end of the primary winding of the first transformer T1 is connected to the synonym end of the primary winding of the second transformer T2. One end of the secondary winding of the first transformer T1 is connected to the first output end a of the converter, and in this embodiment, specifically, the end of the same name of the secondary winding of the first transformer T1 is connected to the first output end a of the converter. One end of the secondary winding of the second transformer T2 is connected to the first output end a of the converter, in this embodiment, specifically, the end of the secondary winding of the second transformer T2 with the same name is connected to the first output end a of the converter. The other end of the secondary winding of the first transformer T1 is connected to the second output terminal B of the converter and the other end of the secondary winding of the second transformer T2, and in this embodiment, specifically, the synonym terminal of the secondary winding of the first transformer T1 is connected to the second output terminal B of the converter and the synonym terminal of the secondary winding of the second transformer T2.
The first output terminal a of the converter is used for connecting one end of the load RL, and the second output terminal B of the converter is used for connecting the other end of the load RL.
The converter further includes: a first magnetizing inductance (exciting inductance) LM1 of the first transformer T1 and a second magnetizing inductance (exciting inductance) LM2 of the second transformer T2. The first excitation inductor LM1 is connected in parallel with the primary winding of the first transformer T1, that is, one end of the first excitation inductor LM1 is connected to the dotted end of the primary winding of the first transformer T1, and the other end of the first excitation inductor LM1 is connected to the dotted end of the primary winding of the first transformer T1. Similarly, the second excitation inductor LM2 is connected in parallel with the primary winding of the second transformer T2, that is, one end of the second excitation inductor LM2 is connected to the other end of the first excitation inductor LM1 and is also connected to the synonym end of the primary winding of the second transformer T2, and the other end of the second excitation inductor LM2 is connected to the synonym end of the primary winding of the second transformer T2. Magnetic flux generated by the actual excitation inductor always leaks a little outside the excitation inductor and cannot be transmitted to a secondary coil (winding) through a magnetic core, generally called leakage magnetic flux, and the formed inductor is leakage inductance which is connected in series in the primary coil (winding). As shown in fig. 1, a first leakage inductance Lk1 of a first excitation inductance LM1 is connected in series between C1 and the dotted terminal of the primary winding of T1, and a second leakage inductance Lk2 of a second excitation inductance LM2 is connected in series between b and the dotted terminal of the primary winding of T2.
The converter may further include: a first diode D1, a second diode D2 and a second capacitor C2. The first diode D1, the second diode D2 and the second capacitor C2 constitute a rectifying and filtering circuit on the output side of the transformer, which rectifies and filters the output of the transformer.
Specifically, the dotted terminal of the secondary winding of the first transformer T1 is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the first output terminal a of the converter and one end of the second capacitor C2, in this embodiment, one end of the second capacitor C2 is the first output terminal a of the converter. The other end of the second capacitor C2 is connected to the second output terminal B of the converter, and in this embodiment, the other end of the second capacitor C2 is the second output terminal B of the converter. The dotted terminal of the secondary winding of the second transformer T2 is connected to the anode of a second diode D2, and the cathode of the second diode D2 is connected to the first output terminal a of the converter.
The converter may further comprise a third capacitance C3 and a fourth capacitance C4. One end of the first switching device Q1 is connected to the other end of the first switching device Q1 through a third capacitor C3; one end of the second switching device Q2 is connected to the other end of the second switching device Q2 through a fourth capacitor C4.
In the full closed loop circuit corresponding strategy, the working process of the passive phase-shifted full-bridge ZVZCS converter is as follows:
the converter consists of a control MOSFET, a transformer and a rectifying and filtering circuit on the output side, wherein the two transformers are independently connected, one transformer is used as a secondary energy transmission in the first half of a switching period, the other transformer is used as an output inductor, the functions of the two transformers are interchanged in the second half of the switching period, the MOSFET is selected as a leading arm switch, the switching loss is reduced to the maximum extent by a lagging arm switch, the voltage of C3 (C4) is discharged to the end voltage of zero through the charging and discharging processes of two parallel capacitors C3 and C4 and an exciting inductor, the condition that the primary current ip is reduced to zero by blocking a capacitor C1 in the secondary current changing period is realized, the turning-off of a rear arm is realized, and a diode is connected in series with the lagging arm to prevent the generation of ip, so that the leading arm synchronously realizes the zero switching while the zero switching of the lagging arm is realized, the converter is enabled to work in a CCM mode (continuous conduction mode) repeatedly, and the conversion efficiency of the converter is effectively improved.
The converter may further comprise a filter capacitor C for filtering the output of the power supply U. One end of the filter capacitor C is used for connecting one end of the first switching device Q1 and one end of the third switching device Q3, and is also used for connecting the anode of the power supply U. The other end of the first switching device Q1 is an output end a of the leading bridge arm and is connected with one end of a second switching device Q2, and the other end of the second switching device Q2 is connected with the other end of the filter capacitor C and the other end of a fourth switching device Q4. The other end of the filter capacitor C is used for being connected with the negative electrode of the power supply U. The other end of the third switching device Q3 is an output end b of the hysteresis bridge arm and is connected to one end of the fourth switching device Q4. In some embodiments, the converter may further include the power source U described above.
The converter may further include: a third diode D3, a fourth diode D4, a fifth diode D5 and a sixth diode D6. One end of the first switching device Q1 is connected to the cathode of the third diode D3, and the other end of the first switching device Q1 is connected to the anode of the third diode D3. One end of the second switching device Q2 is connected to the cathode of the fourth diode D4, and the other end of the second switching device Q2 is connected to the anode of the fourth diode D4. The other end of the third switching device Q3 is connected to the anode of a fifth diode D5, the cathode of the fifth diode D5 is the output end b of the hysteresis bridge arm and is connected to the anode of a sixth diode D6, and the cathode of the sixth diode D6 is connected to one end of the fourth switching device Q4.
According to the circuit diagram, the utility model discloses constitute auxiliary circuit with passive component electric capacity and diode and realize the zero current switch of leading bridge arm switching device's zero voltage switch and lag bridge arm, increased effective duty cycle, not increased any voltage current stress, realized that energy repayment and absorption component reset, return the energy to the output and realize the soft switch of transistor ZVZCS, thereby the harmless magnetism of transformer resets and has promoted conversion efficiency greatly.
The above four switching devices may all adopt transistors, and in this embodiment, the first switching device Q1 is taken as a first MOS transistor (for example, a switching tube), the second switching device Q2 is taken as a second MOS transistor (for example, a switching tube), the third switching device Q3 is taken as a first triode, and the fourth switching device Q4 is taken as a second triode for example. Compared with the MOS tube or the triode which is used entirely, the MOS tube for the leading bridge arm and the triode for the lagging bridge arm can reduce loss and achieve high-efficiency conversion.
The drain electrode of the first MOS transistor is one end of the first switching device Q1, the source electrode of the first MOS transistor is the other end of the first switching device Q1, and the gate electrode of the first MOS transistor is the control end of the first switching device Q1. The drain electrode of the second MOS transistor is one end of the second switching device Q2, the source electrode of the second MOS transistor is the other end of the second switching device Q2, and the gate electrode of the second MOS transistor is the control end of the second switching device Q2. The collector of the first triode is one end of the third switching device Q3, the emitter of the first triode is the other end of the third switching device Q3, and the base of the first triode is the control end of the third switching device Q3. The collector of the second triode is one end of the fourth switching device Q4, the emitter of the second triode is the other end of the fourth switching device Q4, and the base of the second triode is the control end of the fourth switching device Q4.
As shown in fig. 2, the control terminal of the first switching device Q1 is configured to receive a first control signal during a switching period T. The first control signal is used to control the first switching device Q1 to be turned on in a time interval between a starting time T0 of the switching period T and a preset first time T1, to be turned off in a time interval between the preset first time T1 and a preset eighth time T8, and to be turned on in a time interval between the preset eighth time T8 and a starting time of a next switching period. In fig. 2, ugvq1 represents a high level signal received by the gate of the first MOS transistor Q1, and the first MOS transistor is turned on at a high level.
The control terminal of the second switching device Q2 is configured to receive the second control signal during a switching period T. The second control signal is used for controlling the second switching device Q2 to turn off in a time interval between the starting time T0 of the switching period T and a preset second time T2, to turn on in a time interval between the preset second time T2 and a preset seventh time T7, and to turn off in a time interval between the preset seventh time T7 and the starting time T0 of the next switching period. In fig. 2, ugvq2 represents a high level signal received by the gate of the second MOS transistor Q2, and the second MOS transistor Q2 is turned on at a high level.
The control terminal of the third switching device Q3 is configured to receive the third control signal during one switching period T. The third control signal is used to control the third switching device Q3 to turn off in a time interval between the starting time T0 of the switching period T and a preset fifth time T5, turn on in a time interval between the preset fifth time T5 and a preset ninth time T9, and turn off in a time interval between the preset ninth time T9 and the starting time of the next switching period. In fig. 2, ugvq3 represents a high level signal received by the base of the first transistor Q3, and the first transistor Q3 is turned on at a high level.
The control terminal of the fourth switching device Q4 is configured to receive the fourth control signal during one switching period T. The fourth control signal is used to control the fourth switching device Q4 to be turned on in a time interval between the starting time T0 of the switching period T and a preset fourth time T4, and to be turned off in a time interval between the preset fourth time T4 and the starting time of the next switching period. In fig. 2, ugvq4 represents a high level signal received by the base of the second transistor Q4, and the second transistor Q4 is turned on at a high level.
As shown in fig. 2, the starting time t0, the first time t1, the second time t2, the fourth time t4, the fifth time t5, the seventh time t7, the eighth time t8, and the ninth time t9 are in time sequence from first to last in the same switching cycle.
The converter may further include a controller for outputting a first control signal to the control terminal of the first switching device Q1 during a switching period, outputting a second control signal to the control terminal of the second switching device Q2 during a switching period, outputting a third control signal to the control terminal of the third switching device Q3 during a switching period, and outputting a fourth control signal to the control terminal of the fourth switching device Q4 during a switching period. The operation of the converter is explained in detail below.
(1) In the time interval between the starting time T0 of the switching period T and the preset first time T1, that is, at the time T0 to the time T1, the first switching device Q1 and the fourth switching device Q4 are turned on, and the current trend is as shown in fig. 3. The current ip between the output end a of the leading bridge arm and the output end b of the lagging bridge arm charges the blocking capacitor C1, the initial voltage of the C1 is-uc 1p, each secondary of the first transformer T1 transfers energy, the second transformer T2 is an output inductor, and the expression at this time is as follows:
uc1 is the voltage of the first capacitor C1, uc1 (T) is the voltage of the first capacitor C1 at time T, ip is the current between the output end a of the leading bridge arm and the output end B of the lagging bridge arm, C1 is the capacitance of the first capacitor, iLm1 is the current of the first magnetizing inductor Lm1, iLm2 is the current of the second magnetizing inductor Lm2, U is the voltage of the power supply, N1 is the turn ratio of the first transformer T1, lm1 is the inductive reactance of the first magnetizing inductor of the first transformer T1, N2 is the turn ratio of the second transformer T2, lm2 is the inductive reactance of the second magnetizing inductor of the second transformer T2, and uo is the output voltage of the converter, i.e. the voltage between the first output end a and the second output end B of the converter.
(2) In a time interval between a first time T1 and a second time T2, which are preset in the switching period T, that is, between time T1 and time T2, the first switching device Q1 is turned off at time T1, and C3 charges C4 to discharge so as to maintain ip, where Lm is large enough to be regarded as ip (T1), and C1 can be regarded as a constant voltage source uc1p in a short time, and an equivalent circuit diagram thereof is shown in fig. 4. At time t2, zero point, the second diode D2 is turned on, and the expression is:
wherein uc3 is the voltage of the third capacitor C3, uc3 (t) is the voltage of the third capacitor C3 at time t, C3 is the capacitance of the third capacitor, uc4 is the voltage of the fourth capacitor C4, uc4 (t) is the voltage of the fourth capacitor C4 at time t, C4 is the capacitance of the fourth capacitor, and ip (t 1) is the current between time ab at time t 1.
(3) In a time interval between a second time T2 preset in the switching period T and a third time T3 preset in the switching period T, that is, when a time T2 is time T3, as shown in fig. 5, the second switching tube Q2 is turned on under a zero voltage condition, at this time up =0, that is, a time when the voltage up between the output end of the leading bridge arm and the output end of the lagging bridge arm drops to 0 is a second time T2, -uc1p is added to the leakage inductance of the two transformers and the primary coil (primary winding), so that ip drops, when io is insufficient to provide a load current, the second diode D2 is turned on, the secondary coil (secondary winding) is turned on in the forward direction, ip drops to zero at T3, and at this time ip (T) = I = 1 -uc1p × t/(2 Lk). Wherein Lk is the inductive reactance of the total leakage inductance in the circuit, i.e. the sum of the first leakage inductance Lk1 and the second leakage inductance Lk 2.
(4) In a time interval between a third preset time T3 and a fourth preset time T4 of the switching period T, that is, at time T3 to time T4, ip =0, and up = -uc1p, the diodes (D1 and D2) connected to the secondary windings of the two transformers are both turned on, as shown in fig. 6, and the passing current is 0.5io, so that generation of a conventional ZVS environment circulating current is effectively suppressed, and efficiency is improved.
(5) During the time interval between the preset fourth time T4 and the preset fifth time T5 of the switching cycle T, i.e. when the time T4 is from the time T5, the fourth switching device Q4 is turned off at the time T4.
(6) In a time interval between a fifth preset time T5 and a sixth preset time T6 of the switching period T, that is, at a time from T5 to T6, at the time T5, as shown in fig. 7, the third switching device Q3 is turned on at zero current, ip increases in a reverse direction under the action of the blocking capacitor C1 and the power supply voltage U, and at this time, the first diode D1 and the second diode D2 are still turned on, then: ip (t) = - (U + uc1 p) t/(2 Lk).
(7) In the time interval between the sixth time T6 preset in the switching period T and the seventh time T7 preset in the switching period T, that is, when the time T6 is from the time T7 to the time T7, as shown in fig. 8, the first diode D1 is turned off, the second diode D2 is turned on at this time, when the next switching period starts, the primary winding of the second transformer T2 stores energy, the iD2 drops to turn off the second diode D2, the first diode D1 is turned on, and the cycle is repeated, so that the PWM full-bridge conversion is achieved.
The converter can improve the usability of the whole circuit and reduce the loss; each switch tube is the ideal device of power tube, and magnetizing inductance Lm1> magnetic leakage inductance Lk1, lm2> Lk2, and the relative Lm of the relative Lk of leakage inductance is very little, utilizes the utility model discloses a converter can reduce switching loss when the circuit is at continuous operation state, reduces the on-state loss simultaneously, when the circuit gets into continuous operation state, avoids the reverse problem of surging of transformer exciting current, reduces the transformer loss, improves the whole work efficiency of circuit.
The utility model discloses improve the EMI (electromagnetic interference) of circuit when the zero switch-over of switch mode, the circuit does not all have main switch pipe drain-source both ends voltage oscillation when continuous operation state, has improved circuit EMI.
The utility model also provides a switching power supply, it has as above converter. The switching power supply made of the converter has high power conversion efficiency.
It is right to have used specific individual example above the utility model discloses expound, only be used for helping to understand the utility model discloses, not be used for the restriction the utility model discloses. To the technical field of the utility model technical personnel, the foundation the utility model discloses an idea can also be made a plurality of simple deductions, warp or replacement.
Claims (10)
1. A passive phase-shifted full-bridge ZVZCS converter comprising: the first capacitor is connected with the first transformer, and the second capacitor is connected with the second transformer;
the first switching device, the second switching device, the third switching device and the fourth switching device form a full-bridge circuit; the first switch device and the second switch device form a leading bridge arm, and the third switch device and the fourth switch device form a lagging bridge arm;
the output end of the leading bridge arm is connected with one end of the primary winding of the first transformer through a first capacitor, and the output end of the lagging bridge arm is connected with one end of the primary winding of the second transformer; the other end of the primary winding of the first transformer is connected with the other end of the primary winding of the second transformer; one end of the secondary winding of the first transformer is connected with the first output end of the converter; one end of the secondary winding of the second transformer is connected with the first output end of the converter; the other end of the secondary winding of the first transformer is connected with the second output end of the converter and the other end of the secondary winding of the second transformer;
the first output end of the converter is used for being connected with one end of a load, and the second output end of the converter is used for being connected with the other end of the load.
2. The passive phase-shifted full-bridge ZVZCS converter according to claim 1, further comprising: a first excitation inductor of the first transformer and a second excitation inductor of the second transformer;
the first excitation inductor is connected with a primary winding of the first transformer in parallel; the second excitation inductor is connected with the primary winding of the second transformer in parallel.
3. The passive phase-shifted full-bridge ZVZCS converter according to claim 1, further comprising: a first diode, a second diode and a second capacitor;
one end of the secondary winding of the first transformer is connected with the anode of a first diode, and the cathode of the first diode is connected with the first output end of the converter and one end of a second capacitor; the other end of the second capacitor is connected with a second output end of the converter; one end of the secondary winding of the second transformer is connected with the anode of a second diode, and the cathode of the second diode is connected with the first output end of the converter.
4. The passive phase-shifted full-bridge ZVZCS converter according to claim 1 further comprising a filter capacitor;
one end of the filter capacitor is used for connecting one end of the first switching device and one end of the third switching device and is also used for connecting the anode of the power supply; the other end of the first switch device is the output end of the leading bridge arm and is connected with one end of a second switch device, and the other end of the second switch device is connected with the other end of the filter capacitor and the other end of the fourth switch device; the other end of the filter capacitor is used for being connected with the negative electrode of a power supply; the other end of the third switching device is an output end of the hysteresis bridge arm and is connected with one end of the fourth switching device.
5. The passive phase-shifted full-bridge ZVZCS converter according to claim 4, further comprising: a third diode, a fourth diode, a fifth diode and a sixth diode;
one end of the first switching device is connected with the cathode of the third diode, and the other end of the first switching device is connected with the anode of the third diode; one end of the second switching device is connected with the cathode of the fourth diode, and the other end of the second switching device is connected with the anode of the fourth diode; the other end of the third switching device is connected with the anode of a fifth diode, the cathode of the fifth diode is the output end of the hysteresis bridge arm and is connected with the anode of a sixth diode, and the cathode of the sixth diode is connected with one end of a fourth switching device.
6. The passive phase-shifted full-bridge ZVZCS converter of claim 5 further comprising a third capacitor and a fourth capacitor;
one end of the first switching device is connected with the other end of the first switching device through a third capacitor; one end of the second switching device is connected with the other end of the second switching device through a fourth capacitor.
7. The passive phase-shifted full-bridge ZVZCS converter according to claim 4,
the control end of the first switching device is used for receiving a first control signal in a switching period; the first control signal is used for controlling the first switching device to be switched on in a time interval from the starting moment of a switching period to a preset first moment, to be switched off in a time interval from the preset first moment to a preset eighth moment, and to be switched on in a time interval from the preset eighth moment to the starting moment of the next switching period;
the control end of the second switching device is used for receiving a second control signal in a switching period; the second control signal is used for controlling the second switching device to be switched off in a time interval from the starting moment of the switching period to a preset second moment, to be switched on in a time interval from the preset second moment to a preset seventh moment, and to be switched off in a time interval from the preset seventh moment to the starting moment of the next switching period;
the control end of the third switching device is used for receiving a third control signal in one switching period; the third control signal is used for controlling the third switching device to be turned off in a time interval from the starting moment of the switching period to a preset fifth moment, to be turned on in a time interval from the preset fifth moment to a preset ninth moment, and to be turned off in a time interval from the preset ninth moment to the starting moment of the next switching period;
the control end of the fourth switching device is used for receiving a fourth control signal in one switching period; the fourth control signal is used for controlling the fourth switching device to be switched on in a time interval from the starting time of the switching period to a preset fourth time and to be switched off in a time interval from the preset fourth time to the starting time of the next switching period;
the starting time, the first time, the second time, the fourth time, the fifth time, the seventh time, the eighth time and the ninth time are time sequences from first to last in the same switching cycle.
8. The passive phase-shifted full-bridge ZVZCS converter of claim 7 wherein the first switching device is a first MOS transistor, the second switching device is a second MOS transistor, the third switching device is a first transistor, and the fourth switching device is a second transistor; the drain electrode of the first MOS tube is one end of the first switch device, the source electrode of the first MOS tube is the other end of the first switch device, and the grid electrode of the first MOS tube is the control end of the first switch device; the drain electrode of the second MOS tube is one end of the second switching device, the source electrode of the second MOS tube is the other end of the second switching device, and the grid electrode of the second MOS tube is the control end of the second switching device; the collector of the first triode is one end of the third switching device, the emitter of the first triode is the other end of the third switching device, and the base of the first triode is the control end of the third switching device; the collector of the second triode is one end of the fourth switching device, the emitter of the second triode is the other end of the fourth switching device, and the base of the second triode is the control end of the fourth switching device.
9. The passive phase-shifted full-bridge ZVZCS converter of claim 7 wherein the second time is the time at which the voltage between the output of the leading leg and the output of the lagging leg drops to 0.
10. A switching power supply comprising a passive phase-shifted full-bridge ZVZCS converter according to any of claims 1-9.
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| CN202222019839.2U CN217824741U (en) | 2022-08-02 | 2022-08-02 | Switching power supply and passive phase-shifted full-bridge ZVZCS converter thereof |
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| CN202222019839.2U CN217824741U (en) | 2022-08-02 | 2022-08-02 | Switching power supply and passive phase-shifted full-bridge ZVZCS converter thereof |
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