CN217643132U - Power control circuit and electronic equipment - Google Patents

Power control circuit and electronic equipment Download PDF

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Publication number
CN217643132U
CN217643132U CN202221184628.8U CN202221184628U CN217643132U CN 217643132 U CN217643132 U CN 217643132U CN 202221184628 U CN202221184628 U CN 202221184628U CN 217643132 U CN217643132 U CN 217643132U
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circuit
power supply
control circuit
isolation
reverse connection
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CN202221184628.8U
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罗能武
何轩泽
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Shenzhen Yingzhong Century Intelligent Technology Co ltd
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Shenzhen Yingzhong Century Intelligent Technology Co ltd
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Abstract

The application discloses power control circuit and electronic equipment relates to power technical field. A power control circuit comprising: a primary power supply circuit; the first slave power supply circuit is electrically connected with the master power supply circuit, and the master power supply circuit is used for controlling the on-off of the first slave power supply circuit according to the access state of the first power supply. According to the scheme, the power supply connected can be stably controlled, and the electronic equipment is effectively prevented from being burnt.

Description

Power control circuit and electronic equipment
Technical Field
The application relates to the technical field of power supplies, in particular to a power supply control circuit and electronic equipment.
Background
In the related art, in a modern society with highly developed informatization, human dependence on electronic devices is increasing day by day. In order to meet the requirements of high speed, high performance, light weight, small size and small size of electronic products, notebook computers (including tablet computers) have become indispensable application tools in modern life and work due to convenient operation and portability. At present, a notebook computer is mainly powered by an adapter with good heat dissipation effect and stable power supply, and due to continuous technology updating and product iteration, a power supply mode of the notebook computer is provided with the adapter which is supported as a power supply input, and meanwhile, one or more interfaces in other forms are required to be arranged to support the power supply input or power supply output of one or more other interfaces, and if the control is improper, the corresponding electronic equipment is burnt. In the current technology, a software plus hardware mode is usually adopted for control, and if a notebook computer is halted, the software controlled part is easily disordered to cause improper control, so that the corresponding electronic equipment is burnt.
SUMMERY OF THE UTILITY MODEL
The present application is directed to solving at least one of the problems in the prior art. Therefore, the power supply control circuit and the electronic equipment are provided, the accessed power supply can be stably controlled, and the electronic equipment is effectively prevented from being burnt.
According to the power supply control circuit of the embodiment of the first aspect of the application, the power supply control circuit comprises:
a primary power supply circuit;
the first slave power supply circuit is electrically connected with the master power supply circuit, and the master power supply circuit is used for controlling the on-off of the first slave power supply circuit according to the access state of a first power supply.
According to some embodiments of the present application, the power control circuit further includes a second slave power supply circuit, the second slave power supply circuit is electrically connected to the master power supply circuit and the first slave power supply circuit, and the master power supply circuit is further configured to control on/off of the second slave power supply circuit according to an access state of the first power supply and an access state of the first slave power supply circuit and a second power supply.
According to some embodiments of the application, the main stage power supply circuit includes first anti-reverse connection circuit and first isolation control circuit, the one end electricity of first anti-reverse connection circuit is connected the first power, the other end of first anti-reverse connection circuit respectively with first isolation control circuit first from the stage power supply circuit the second is from the stage power supply circuit electricity and is connected, first anti-reverse connection circuit is used for working as protection circuit when first power is reverse-connected, first isolation control circuit is used for right isolation control is carried out to the first power.
According to some embodiments of the application, first follow level supply circuit includes that the second prevents reverse connection circuit and second isolation control circuit, the second prevents reverse connection circuit's one end electricity and connects the second power, the second prevent reverse connection circuit's the other end respectively with the second follow level supply circuit second isolation control circuit electricity is connected, first prevent reverse connection circuit's the other end with second isolation control circuit electricity is connected, the second prevents reverse connection circuit and is used for working as protection circuit when the second power is reverse connection, second isolation control circuit is used for right second power carries out isolation control.
According to some embodiments of this application, the second is followed stage power supply circuit and is included third prevention reversal circuit and third isolation control circuit, the third power is connected to the one end electricity of third prevention reversal circuit, the other end of third prevention reversal circuit with third isolation control circuit electricity is connected, third isolation control circuit respectively with the second prevent the other end of reversal circuit first prevent that the other end electricity of reversal circuit is connected, third prevention reversal circuit is used for working as protection circuit when the third power is reversed, third isolation control circuit is used for right isolation control is carried out to the third power.
According to some embodiments of this application, first anti-reverse connection circuit includes first binding post, first one-way TVS pipe, first electric capacity, second electric capacity, third electric capacity, fourth electric capacity, fifth electric capacity, first resistance, first binding post's anodal pin respectively with the negative pole of first one-way TVS pipe the one end of first electric capacity the one end of second electric capacity the one end of third electric capacity the one end of fourth electric capacity the one end of fifth electric capacity the one end of first resistance first isolation control circuit second isolation control circuit third isolation control circuit electricity is connected, first binding post's negative pole pin respectively with the positive pole of first one-way TVS pipe the other end of first electric capacity the other end of second electric capacity the other end of third electric capacity the other end of fourth electric capacity the other end of fifth electric capacity the other end of first resistance electricity is connected.
According to some embodiments of the present application, the first isolation control circuit includes a first isolation circuit and a main control circuit, the first isolation circuit is electrically connected to the other end of the first anti-reverse connection circuit and the main control circuit, respectively, the first isolation circuit is used for isolating the first power supply, and the main control circuit is used for controlling the connection and disconnection of the first isolation circuit.
According to some embodiments of the present application, the second isolation control circuit includes a second isolation circuit and a first slave stage control circuit, the second isolation circuit respectively with the second prevent reverse connection circuit's the other end the first slave stage control circuit electricity is connected, the first slave stage control circuit respectively with the first prevent reverse connection circuit's the other end the second prevents reverse connection circuit's the other end electricity is connected, the second isolation circuit is used for keeping apart the second power, the first slave stage control circuit is used for according to the voltage control that first prevent reverse connection circuit provided the switching on and off of second isolation circuit.
According to some embodiments of the application, the third isolation control circuit includes third isolation circuit and second slave stage control circuit, the third isolation circuit respectively with the other end of third prevention reverse connection circuit the second is connected from the stage control circuit electricity, the second slave stage control circuit respectively with the other end of first prevention reverse connection circuit the other end of second prevention reverse connection circuit the other end electricity of third prevention reverse connection circuit is connected, the third isolation circuit is used for keeping apart the third power, the second slave stage control circuit is used for according to the voltage that the second reverse connection prevention circuit provided, the voltage control that the second reverse connection prevention circuit provided the switching on and shutting off of third isolation circuit.
According to the electronic device of the embodiment of the second aspect of the present application, the electronic device is provided with the circuit board, and the circuit board comprises the power supply control circuit of the embodiment of the first aspect.
According to the power supply control circuit of the embodiment of the application, the following beneficial effects are at least achieved: the power supply system is provided with a main-stage power supply circuit and a first slave-stage power supply circuit, wherein the first slave-stage power supply circuit is electrically connected with the main-stage power supply circuit, and the main-stage power supply circuit controls the on-off of the first slave-stage power supply circuit according to the access state of a first power supply; that is to say, when the primary power supply circuit accessed first power, the primary power supply circuit can control the disconnection of first slave power supply circuit for first power supplies power alone, and at this moment, whether first slave power supply circuit accessed the second power, can not supply power through the second power, has effectively completely cut off the impact to electronic equipment when the second power accessed, has avoided the electronic equipment that a plurality of powers simultaneous workings lead to burn out. In conclusion, by setting the priority levels of the master power supply circuit and the first slave power supply circuit, when different power supplies are connected, the power supplies with low priority levels are isolated, the power supplies with high priority levels are used as power supply sources, and then stable control of the power supplies is realized, so that impact of a plurality of power supplies on the electronic equipment is effectively avoided. Therefore, the power control circuit of the application can stably control the accessed power supply, and effectively avoids electronic equipment from being burnt.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The present application is further described with reference to the following figures and examples, in which:
FIG. 1 is a schematic block diagram of a power control circuit provided in one embodiment of the present application;
FIG. 2 is a circuit schematic of the primary power supply circuit shown in FIG. 1;
FIG. 3 is a circuit schematic of the first slave stage supply circuit shown in FIG. 1;
fig. 4 is a circuit schematic of the second slave supply circuit shown in fig. 1.
Reference numerals:
the circuit comprises a main power supply circuit 100, a first anti-reverse connection circuit 110, a first isolation control circuit 120, a first isolation circuit 121 and a main control circuit 122;
a first slave stage power supply circuit 200, a second isolation control circuit 210, a second isolation circuit 211, a first slave stage control circuit 212;
the circuit comprises a second slave stage power supply circuit 300, a third isolation control circuit 310, a third isolation circuit 311 and a second slave stage control circuit 312.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
In the description of the present application, it is to be understood that the positional descriptions, such as the directions of up, down, front, rear, left, right, etc., referred to herein are based on the directions or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, and do not indicate or imply that the referred device or element must have a specific direction, be constructed and operated in a specific direction, and thus, should not be construed as limiting the present application.
In the description of the present application, the meaning of a plurality is one or more, the meaning of a plurality is two or more, and the above, below, exceeding, etc. are understood as excluding the present number, and the above, below, within, etc. are understood as including the present number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present application, unless otherwise expressly limited, terms such as set, mounted, connected and the like should be construed broadly, and those skilled in the art can reasonably determine the specific meaning of the terms in the present application by combining the detailed contents of the technical solutions.
In the description of the present application, reference to the description of the terms "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
A power supply control circuit according to an embodiment of the present application is described below with reference to fig. 1 to 4.
It can be understood that, as shown in fig. 1, the power supply control circuit according to the embodiment of the present application includes:
a primary supply circuit 100;
and the first slave power supply circuit 200, the first slave power supply circuit 200 is electrically connected with the master power supply circuit 100, and the master power supply circuit 100 is used for controlling the on-off of the first slave power supply circuit 200 according to the connection state of the first power supply.
It can be understood that, as shown in fig. 1, the power control circuit further includes a second slave power supply circuit 300, the second slave power supply circuit 300 is electrically connected to the master power supply circuit 100 and the first slave power supply circuit 200 respectively, and the master power supply circuit 100 is further configured to control on/off of the second slave power supply circuit 300 according to the connection state with the first power supply and the connection state of the first slave power supply circuit 200 and the second power supply.
The power supply system is provided with a main-stage power supply circuit 100 and a first slave-stage power supply circuit 200, wherein the first slave-stage power supply circuit 200 is electrically connected with the main-stage power supply circuit 100, and the main-stage power supply circuit 100 controls the on-off of the first slave-stage power supply circuit 200 according to the access state of a first power supply; that is to say, when the primary power supply circuit 100 accesses the first power supply, the primary power supply circuit 100 can control the first secondary power supply circuit 200 to be disconnected, so that the first power supply supplies power alone, at this time, the first secondary power supply circuit 200 cannot supply power through the second power supply regardless of whether accessing the second power supply, impact on the electronic device when the second power supply is accessed is effectively isolated, and the electronic device that is caused by simultaneous operation of a plurality of power supplies is prevented from being burnt. In summary, by setting the priorities of the master power supply circuit 100 and the first slave power supply circuit 200, when different power supplies are connected, the power supply with the lower priority is isolated, and the power supply with the higher priority is used as the power supply, so as to achieve smooth control of the power supply, thereby effectively avoiding the impact of multiple power supplies on the electronic device. Therefore, the power control circuit of the application can stably control the accessed power supply, and effectively avoids electronic equipment from being burnt.
It can be understood that, as shown in fig. 2, the main stage power supply circuit 100 includes a first reverse connection prevention circuit 110 and a first isolation control circuit 120, one end of the first reverse connection prevention circuit 110 is electrically connected to the first power supply, the other end of the first reverse connection prevention circuit 110 is electrically connected to the first isolation control circuit 120, the first slave stage power supply circuit 200, and the second slave stage power supply circuit 300, the first reverse connection prevention circuit 110 is used for protecting the circuit when the first power supply is reversely connected, and the first isolation control circuit 120 is used for performing isolation control on the first power supply.
It can be understood that, as shown in fig. 3, the first slave stage power supply circuit 200 includes a second reverse connection prevention circuit and a second isolation control circuit 210, one end of the second reverse connection prevention circuit is electrically connected to the second power supply, the other end of the second reverse connection prevention circuit is electrically connected to the second slave stage power supply circuit 300 and the second isolation control circuit 210, the other end of the first reverse connection prevention circuit 110 is electrically connected to the second isolation control circuit 210, the second reverse connection prevention circuit is used for protecting the circuit when the second power supply is reversely connected, and the second isolation control circuit 210 is used for performing isolation control on the second power supply.
It can be understood that, as shown in fig. 4, the second slave stage power supply circuit 300 includes a third protection reverse connection circuit and a third isolation control circuit 310, one end of the third protection reverse connection circuit is electrically connected to the third power supply, the other end of the third protection reverse connection circuit is electrically connected to the third isolation control circuit 310, the third isolation control circuit 310 is electrically connected to the other end of the second reverse connection prevention circuit and the other end of the first reverse connection prevention circuit 110, the third protection reverse connection circuit is used for protecting the circuit when the third power supply is reversely connected, and the third isolation control circuit 310 is used for performing isolation control on the third power supply.
It can be understood that, as shown in fig. 2, the first anti-reverse connection circuit 110 includes a first connection terminal, a first unidirectional TVS tube, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, and a first resistor, where an anode pin of the first connection terminal is electrically connected to a cathode of the first unidirectional TVS tube, one end of the first capacitor, one end of the second capacitor, one end of the third capacitor, one end of the fourth capacitor, one end of the fifth capacitor, one end of the first resistor, the first isolation control circuit 120, the second isolation control circuit 210, and the third isolation control circuit 310, respectively, and a cathode pin of the first connection terminal is electrically connected to an anode of the first unidirectional TVS tube, the other end of the first capacitor, the other end of the second capacitor, the other end of the third capacitor, the other end of the fourth capacitor, the other end of the fifth capacitor, and the other end of the first resistor, respectively.
It should be noted that, as shown in fig. 2, the first connection terminal, the first unidirectional TVS tube, the first capacitor, the second capacitor, the third capacitor, the fourth capacitor, the fifth capacitor, and the first resistor are J1, D1, C2, C3, C4, C5, and R1, respectively, in sequence.
It can be understood that, as shown in fig. 2, the first isolation control circuit 120 includes a first isolation circuit 121 and a main control circuit 122, the first isolation circuit 121 is electrically connected to the other end of the first anti-reverse connection circuit 110 and the main control circuit 122, respectively, the first isolation circuit 121 is used for isolating the first power supply, and the main control circuit 122 is used for controlling the first isolation circuit 121 to be turned on and off.
It can be understood that, as shown in fig. 3, the second isolation control circuit 210 includes a second isolation circuit 211 and a first slave stage control circuit 212, the second isolation circuit 211 is electrically connected to the other end of the second anti-reverse connection circuit and the first slave stage control circuit 212, respectively, the first slave stage control circuit 212 is electrically connected to the other end of the first anti-reverse connection circuit 110 and the other end of the second anti-reverse connection circuit, respectively, the second isolation circuit 211 is used for isolating the second power source, and the first slave stage control circuit 212 is used for controlling the second isolation circuit 211 to be turned on and off according to a voltage supplied from the first anti-reverse connection circuit 110.
It is understood that, as shown in fig. 4, the third isolation control circuit 310 includes a third isolation circuit 311 and a second slave control circuit 312, the third isolation circuit 311 is electrically connected to the other end of the third anti-reverse connection circuit and the second slave control circuit 312, the second slave control circuit 312 is electrically connected to the other end of the first anti-reverse connection circuit 110, the other end of the second anti-reverse connection circuit and the other end of the third anti-reverse connection circuit, the third isolation circuit 311 is used for isolating a third power source, and the second slave control circuit 312 is used for controlling the third isolation circuit 311 to be turned on and off according to the voltage provided by the second anti-reverse connection circuit and the voltage provided by the second anti-reverse connection circuit.
It can be understood that, as shown in fig. 2, the first isolation control circuit 120 includes a first isolation circuit 121 and a main control circuit 122, the first isolation circuit 121 is electrically connected to the other end of the first anti-reverse connection circuit 110 and the main control circuit 122, respectively, the first isolation circuit 121 is used for isolating the first power supply, and the main control circuit 122 is used for controlling the first isolation circuit 121 to be turned on and off.
It can be understood that, as shown in fig. 2, the first isolation circuit 121 includes a first P-channel MOS transistor, a second resistor, a sixth capacitor, and a seventh capacitor, the primary control circuit 122 includes a first N-channel MOS transistor, a second N-channel MOS transistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth capacitor, a D electrode of the first P-channel MOS transistor is electrically connected to one end of the fifth capacitor, an S electrode of the first P-channel MOS transistor is electrically connected to one end of the second resistor, one end of the sixth capacitor, and an S electrode of the second P-channel MOS transistor, a G electrode of the first P-channel MOS transistor is electrically connected to the other end of the second resistor, the other end of the sixth capacitor, a G electrode of the second P-channel MOS transistor, one end of the third resistor, a D electrode of the second P-channel MOS transistor is electrically connected to one end of the seventh capacitor, a D electrode of the first N-channel MOS transistor is electrically connected to the other end of the third resistor, a G electrode of the first N-channel MOS transistor is electrically connected to the other end of the sixth resistor, a fourth electrode of the sixth resistor, a fifth N-channel MOS transistor, a fourth electrode of the fifth resistor, and a fourth electrode of the seventh capacitor, and a fourth electrode are electrically connected to the fifth resistor.
As shown in fig. 2, the first P-channel MOS transistor, the second P-channel MOS transistor, the first N-channel MOS transistor, the second resistor, the third resistor, the fourth resistor, the fifth resistor, the sixth resistor, the seventh resistor, the sixth capacitor, the seventh capacitor, and the eighth capacitor are Q11, Q12, Q21, Q22, R2, R3, R4, R5, R6, R7, C6, C7, and C8, respectively, in this order.
It is understood that, as shown in fig. 3, the second isolation control circuit 210 includes a second isolation circuit 211 and a first slave control circuit 212, the second isolation circuit 211 is electrically connected to the other end of the second anti-reverse connection circuit and the first slave control circuit 212, the first slave control circuit 212 is electrically connected to the other end of the first anti-reverse connection circuit 110 and the other end of the second anti-reverse connection circuit, respectively, the second isolation circuit 211 is used for isolating the second power source, and the first slave control circuit 212 is used for controlling the second isolation circuit 211 to be turned on and off according to the voltage provided by the first anti-reverse connection circuit 110.
It is understood that, as shown in fig. 3, the second isolation circuit 211 includes a third P-channel MOS transistor, a fourth P-channel MOS transistor, an eighth resistor, a ninth capacitor, and a tenth capacitor, the first slave control circuit 212 includes a third N-channel MOS transistor, a fourth N-channel MOS transistor, an eleventh capacitor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, and a thirteenth resistor, the second anti-reverse connection circuit includes a second connection terminal, a positive pin of the second connection terminal is electrically connected to a D-pole of the third P-channel MOS transistor and the third isolation control circuit 310, an S-pole of the third P-channel MOS transistor is electrically connected to one end of the ninth capacitor, one end of the eighth resistor, and an S-pole of the fourth P-channel MOS transistor, a G-pole of the third P-channel MOS transistor is electrically connected to the other end of the ninth capacitor, the other end of the eighth resistor, the G-pole of the fourth P-channel MOS transistor, and one end of the ninth resistor, the electrode D of the fourth P-channel MOS tube is electrically connected with one end of a tenth capacitor, the electrode D of the third N-channel MOS tube is electrically connected with the other end of a ninth resistor, the electrode G of the third N-channel MOS tube is electrically connected with one end of a tenth resistor, one end of a thirteenth resistor and the electrode D of the fourth N-channel MOS tube, the other end of the tenth resistor is electrically connected with the positive pin of the second wiring terminal, the electrode G of the fourth N-channel MOS tube is electrically connected with one end of an eleventh resistor, one end of a twelfth resistor and one end of an eleventh capacitor respectively, and the other end of the tenth capacitor, the electrode S of the fourth N-channel MOS tube, the other end of the twelfth resistor, the other end of the eleventh capacitor, the electrode S of the third N-channel MOS tube and the other end of the thirteenth resistor are all grounded.
As shown in fig. 3, the third P-channel MOS transistor, the fourth P-channel MOS transistor, the third N-channel MOS transistor, the fourth N-channel MOS transistor, the ninth capacitor, the tenth capacitor, the eleventh capacitor, the eighth resistor, the ninth resistor, the tenth resistor, the eleventh resistor, the twelfth resistor, and the thirteenth resistor are Q13, Q14, Q23, Q24, C9, C10, C11, R8, R9, R10, R11, R12, and R13, respectively, in this order.
It is understood that, as shown in fig. 4, the third isolation control circuit 310 includes a third isolation circuit 311 and a second slave control circuit 312, the third isolation circuit 311 is electrically connected to the other end of the third anti-reverse connection circuit and the second slave control circuit 312, the second slave control circuit 312 is electrically connected to the other end of the first anti-reverse connection circuit 110, the other end of the second anti-reverse connection circuit and the other end of the third anti-reverse connection circuit, the third isolation circuit 311 is used for isolating a third power source, and the third control circuit is used for controlling the third isolation circuit 311 to be turned on and off according to the second slave control circuit 312.
It is understood that, as shown in fig. 4, the third isolation circuit 311 includes a fifth P-channel MOS transistor, a sixth P-channel MOS transistor, a twelfth capacitor, a thirteenth capacitor, and a fourteenth resistor, the second slave control circuit 312 includes a fifth N-channel MOS transistor, a sixth N-channel MOS transistor, a seventh N-channel MOS transistor, a fourteenth capacitor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, and a twenty-second resistor, the third protection circuit includes a third connection terminal, an anode pin of the third connection terminal is electrically connected to a D pole of the fifth P-channel MOS transistor, an S pole of the fifth P-channel MOS transistor is electrically connected to one end of the twelfth capacitor, one end of the fourteenth resistor, and an S pole of the sixth P-channel MOS transistor respectively, the G pole of the fifth P-channel MOS tube is electrically connected with the other end of the twelfth capacitor, the other end of the fourteenth resistor, the G pole of the sixth P-channel MOS tube and one end of the fifteenth resistor respectively, the D pole of the sixth P-channel MOS tube is electrically connected with one end of the thirteenth capacitor, the other end of the fifteenth resistor is electrically connected with the D pole of the fifth N-channel MOS tube, the G pole of the fifth N-channel MOS tube is electrically connected with one end of the sixteenth resistor, one end of the nineteenth resistor, the D pole of the sixth N-channel MOS tube and the D pole of the seventh N-channel MOS tube respectively, the other end of the sixteenth resistor is electrically connected with the positive pin of the third wiring terminal, the G pole of the sixth N-channel MOS tube is electrically connected with one end of the seventeenth resistor, one end of the eighteenth resistor and one end of the fourteenth capacitor respectively, the other end of the seventeenth resistor is electrically connected with one end of the fifth capacitor, the G pole of the seventh N-channel MOS tube is electrically connected with one end of the twentieth resistor, and the other end of the twenty-first resistor are electrically connected with one end of the twenty-first resistor respectively, one end of a twenty-second resistor and one end of a fifteenth capacitor, the other end of the twenty-second resistor is electrically connected with the anode pin of the second wiring terminal, and the other end of the thirteenth capacitor, the S pole of the fifth N-channel MOS transistor, the other end of the nineteenth resistor, the S pole of the sixth N-channel MOS transistor, the other end of the eighteenth resistor, the other end of the fourteenth capacitor, the S pole of the seventh N-channel MOS transistor, the other end of the twenty-first resistor and the other end of the fifteenth capacitor are all grounded.
As shown in fig. 4, the fifth P-channel MOS transistor, the sixth P-channel MOS transistor, the fifth N-channel MOS transistor, the sixth N-channel MOS transistor, the seventh N-channel MOS transistor, the twelfth capacitor, the thirteenth capacitor, the fourteenth capacitor, the fifteenth capacitor, the fourteenth resistor, the fifteenth resistor, the sixteenth resistor, the seventeenth resistor, the eighteenth resistor, the nineteenth resistor, the twentieth resistor, the twenty-first resistor, and the twenty-second resistor are Q15, Q16, Q25, Q26, Q27, C12, C13, C14, C15, R14, R15, R16, R17, R18, R19, R20, R21, and R22, respectively, in this order.
According to the power supply control circuit of the embodiment of the application, on one hand, by providing the primary power supply circuit 100 and the first secondary power supply circuit 200, the first secondary power supply circuit 200 is electrically connected with the primary power supply circuit 100, and the primary power supply circuit controls the on/off of the first secondary power supply circuit 200 according to the access state of the first power supply; that is to say, when the primary power supply circuit 100 accesses the first power supply, the primary power supply circuit 100 can control the first secondary power supply circuit 200 to be disconnected, so that the first power supply supplies power alone, at this time, the first secondary power supply circuit 200 cannot supply power through the second power supply regardless of whether accessing the second power supply, impact on the electronic device when the second power supply is accessed is effectively isolated, and the electronic device that is caused by simultaneous operation of a plurality of power supplies is prevented from being burnt. On the other hand, a second slave power supply circuit 300 is further provided, the second slave power supply circuit 300 is respectively electrically connected with the master power supply circuit 100 and the first slave power supply circuit 200, and the master power supply circuit controls the on/off of the second slave power supply circuit 300 according to the connection state of the first power supply and the connection state of the first slave power supply circuit 200 and the second power supply; that is, when the master power supply circuit 100 is connected to the first power supply, the master power supply circuit 100 controls the first slave power supply circuit 200 and the second slave power supply circuit 300 to be disconnected, so that the first power supply alone supplies power; when the primary power supply circuit 100 does not access the first power supply and the first secondary power supply circuit 200 accesses the second power supply, the first secondary power supply circuit 200 controls the second secondary power supply circuit 300 to be disconnected, so that the second power supply supplies power independently; in summary, by setting the priorities of the master power supply circuit 100, the first slave power supply circuit 200, and the second slave power supply circuit 300, when the power supply is not connected, the power supply with the lower priority is isolated, and the power supply with the higher priority is used as the power supply, so as to realize smooth control of the power supply, thereby effectively avoiding the impact of multiple power supplies on the electronic device. Therefore, the power supply control circuit can stably control the accessed power supply, and effectively avoids burning of electronic equipment.
Next, the operation principle of the power supply control circuit of the embodiment of the present application is described with reference to fig. 2 to 4.
Due to continuous technology updating and product iteration, the power supply mode of the notebook computer, including the tablet computer, supports both the traditional adapter input and one or more TYPE-C/Thunderbolt (TBT) inputs, and needs to ensure that any one of the devices cannot be burnt during use.
If the first power supply is an adapter, the second power supply is an input power supply of a TYPE-C interface, the third power supply is an input power supply of a TYPE-C interface, and when only the adapter is connected to the system, as shown in fig. 2, the first connection terminal is J1, if the first power supply is an adapter, the second power supply is an input power supply of a TYPE-C interface, and the third power supply is an input power supply of a TYPE-C interface, when the adapter is connected to the system, + VADP is generated due to the voltage generated when the first power supply is connected to the system, as shown in fig. 3, a VADP _ ON signal becomes high level, Q24 turns ON and pulls down a G pole of Q23, Q23 turns off, and Q13 and Q14 are not both turned ON, and the second isolation circuit 211 in fig. 3 is off, even if the first power supply and the second power supply are connected simultaneously, the second isolation circuit 211 is turned off due to the connection of the first power supply, and therefore, the second power supply is in a non-working state, and is under pure hardware control. Similarly, as shown in fig. 4, when Q26 is turned on, and the G pole of Q25 is pulled down, Q25 is turned off, and thus Q15 and Q16 are not turned on, so the third isolation circuit 311 is also turned off, even if the first power supply, the second power supply, and the third power supply are simultaneously connected, since the first power supply is connected, the second isolation circuit 211 and the third isolation circuit 311 are turned off, and thus the second power supply and the third power supply are in a non-operating state, and also belong to pure hardware control.
When only the second power supply of the system is accessed through the TYPE-C interface, its insertion detection signal TYPE-C/TBT1 will turn off the third isolation circuit 311. If the electronic equipment is connected with the TYPE-C interface of the third power supply at the moment, the system does not supply power to the electronic equipment; alternatively, the third power supply is switched on, and does not supply power to the system. If the adapter is connected at this time, the insertion detection signal + VADP of the adapter preferentially turns off the second isolation circuit 211 and the third isolation circuit 311, and the system power supply is switched from the currently-supplied second power supply to the adapter with the highest priority. That is, as shown in fig. 3, when only the second power supply is connected to the system, TYPE-C/TBD1 is high, Q27 in fig. 4 is turned on, Q25 is turned off, Q15 and Q16 are turned off, so that the third isolation circuit 311 of the third power supply is turned off. At the moment, if the electronic equipment is accessed through the TYPE-C interface of the third power supply, the system does not supply power to the electronic equipment; alternatively, the third power supply, when engaged, does not provide power to the system. If the adapter is connected at the same time, the VADP _ ON signal in fig. 3 goes high, Q24 turns ON and pulls down the G pole of Q23, and Q23 turns off, and Q13 and Q14 are not turned ON, so the second isolation circuit 211 of the second power supply is turned off and belongs to pure hardware control; meanwhile, when Q26 turns on to pull down the G pole of Q25, Q25 is turned off, and then Q15 and Q16 are not turned on, so that the third isolation circuit 311 of the third power supply is also turned off, which is also under pure hardware control, and all devices are protected.
When the system has only the third power supply access, the insertion detection signal TYPE-C/TBT2 of the third power supply is in the lowest level of priority. If the adapter or the second power supply is connected at this time, the two insertion detection signals will close the third isolation circuit 311 of the third power supply at the first time, and then open one of the adapter or the second power supply; if both are connected simultaneously, only the adapter will conduct and power the system, and the principle can be referred to the above description, and all devices are protected.
According to the electronic equipment of the embodiment of the application, the electronic equipment is provided with the circuit board, and the circuit board comprises the power supply control circuit of the embodiment.
The embodiments of the present application have been described in detail with reference to the drawings, but the present application is not limited to the embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present application. Furthermore, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.

Claims (10)

1. A power control circuit, comprising:
a primary power supply circuit;
the first slave power supply circuit is electrically connected with the master power supply circuit, and the master power supply circuit is used for controlling the on-off of the first slave power supply circuit according to the access state of a first power supply.
2. The power control circuit according to claim 1, further comprising a second slave power supply circuit, wherein the second slave power supply circuit is electrically connected to the master power supply circuit and the first slave power supply circuit, respectively, and the master power supply circuit is further configured to control on/off of the second slave power supply circuit according to an access state of the first power supply and an access state of the first slave power supply circuit and a second power supply.
3. The power supply control circuit according to claim 2, wherein the primary power supply circuit comprises a first reverse connection prevention circuit and a first isolation control circuit, one end of the first reverse connection prevention circuit is electrically connected with the first power supply, the other end of the first reverse connection prevention circuit is electrically connected with the first isolation control circuit, the first secondary power supply circuit and the second secondary power supply circuit respectively, the first reverse connection prevention circuit is used for protecting the circuit when the first power supply is reversely connected, and the first isolation control circuit is used for carrying out isolation control on the first power supply.
4. The power supply control circuit according to claim 3, wherein the first slave stage power supply circuit comprises a second reverse connection prevention circuit and a second isolation control circuit, one end of the second reverse connection prevention circuit is electrically connected with the second power supply, the other end of the second reverse connection prevention circuit is electrically connected with the second slave stage power supply circuit and the second isolation control circuit respectively, the other end of the first reverse connection prevention circuit is electrically connected with the second isolation control circuit, the second reverse connection prevention circuit is used for protecting the circuit when the second power supply is reversely connected, and the second isolation control circuit is used for carrying out isolation control on the second power supply.
5. The power control circuit according to claim 4, wherein the second slave power supply circuit comprises a third anti-reverse connection circuit and a third isolation control circuit, one end of the third anti-reverse connection circuit is electrically connected with a third power supply, the other end of the third anti-reverse connection circuit is electrically connected with the third isolation control circuit, the third isolation control circuit is electrically connected with the other end of the second anti-reverse connection circuit and the other end of the first anti-reverse connection circuit respectively, the third anti-reverse connection circuit is used for protecting the circuit when the third power supply is reversely connected, and the third isolation control circuit is used for carrying out isolation control on the third power supply.
6. The power control circuit according to claim 5, wherein the first reverse-connection preventing circuit comprises a first connection terminal, a first unidirectional TVS tube, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a first resistor, a positive pin of the first connection terminal is electrically connected with a negative electrode of the first unidirectional TVS tube, one end of the first capacitor, one end of the second capacitor, one end of the third capacitor, one end of the fourth capacitor, one end of the fifth capacitor, one end of the first resistor, the first isolation control circuit, the second isolation control circuit and the third isolation control circuit respectively, and a negative pin of the first connection terminal is electrically connected with a positive electrode of the first unidirectional TVS tube, the other end of the first capacitor, the other end of the second capacitor, the other end of the third capacitor, the other end of the fourth capacitor, the other end of the fifth capacitor and the other end of the first resistor respectively.
7. The power control circuit according to claim 5, wherein the first isolation control circuit comprises a first isolation circuit and a main control circuit, the first isolation circuit is electrically connected to the other end of the first anti-reverse connection circuit and the main control circuit respectively, the first isolation circuit is used for isolating the first power supply, and the main control circuit is used for controlling the first isolation circuit to be switched on and off.
8. The power control circuit of claim 7, wherein the second isolation control circuit comprises a second isolation circuit and a first secondary control circuit, the second isolation circuit is electrically connected with the other end of the second anti-reverse connection circuit and the first secondary control circuit respectively, the first secondary control circuit is electrically connected with the other end of the first anti-reverse connection circuit and the other end of the second anti-reverse connection circuit respectively, the second isolation circuit is used for isolating the second power supply, and the first secondary control circuit is used for controlling the second isolation circuit to be switched on and off according to the voltage provided by the first anti-reverse connection circuit.
9. The power control circuit of claim 8, wherein the third isolation control circuit comprises a third isolation circuit and a second secondary control circuit, the third isolation circuit is electrically connected to the other end of the third anti-reverse connection circuit and the second secondary control circuit, the second secondary control circuit is electrically connected to the other end of the first anti-reverse connection circuit, the other end of the second anti-reverse connection circuit and the other end of the third anti-reverse connection circuit, the third isolation circuit is used for isolating the third power supply, and the second secondary control circuit is used for controlling the on and off of the third isolation circuit according to the voltage provided by the second anti-reverse connection circuit and the voltage provided by the second anti-reverse connection circuit.
10. An electronic device characterized in that the electronic device is provided with a circuit board including the power supply control circuit according to any one of claims 1 to 9.
CN202221184628.8U 2022-05-17 2022-05-17 Power control circuit and electronic equipment Active CN217643132U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221184628.8U CN217643132U (en) 2022-05-17 2022-05-17 Power control circuit and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221184628.8U CN217643132U (en) 2022-05-17 2022-05-17 Power control circuit and electronic equipment

Publications (1)

Publication Number Publication Date
CN217643132U true CN217643132U (en) 2022-10-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Link
CN (1) CN217643132U (en)

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