CN217640194U - PCIE switching circuit based on sea light server - Google Patents
PCIE switching circuit based on sea light server Download PDFInfo
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- CN217640194U CN217640194U CN202220088329.8U CN202220088329U CN217640194U CN 217640194 U CN217640194 U CN 217640194U CN 202220088329 U CN202220088329 U CN 202220088329U CN 217640194 U CN217640194 U CN 217640194U
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Abstract
A PCIE switching circuit based on a sea light server comprises a processor, a PCIE switching chip, an X16 connector and an X8 connector; an X16PCIE bus of the processor is respectively communicated with an X16 connector and a signal input interface of a PCIE switching chip; the PCIE switching chip comprises two signal output interfaces which are respectively communicated with the X16 connector and the X8 connector; the utility model discloses an increase PCIE and switch the chip, richen the application scene of one-way server, cause the waste of communication bandwidth when avoiding not needing full speed accelerator card, the performance of the low time delay of host processor also obtains better utilization in two-way server moreover.
Description
Technical Field
The utility model relates to a computer technology field especially relates to a PCIE switching circuit based on extra large light server.
Background
The server in the current market is applied to different scenes, and the demand difference is large; the low-end server still has a large market at present due to the characteristics of low cost and high cost performance. However, the processor resource of the low-end server is limited, and the speed of the server configured with the X8 bandwidth is slow enough to meet the time requirement of low delay in the process of processing big data; in most use processes, the server configured with the bandwidth of X16 wastes the bandwidth of X8, and cannot fully use the resources, so that the multiple requirements of the user and the full application of the resources cannot be met.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a PCIE switching circuit based on extra large light server to solve the aforementioned problem that exists among the prior art.
In order to realize the purpose, the utility model adopts the technical scheme as follows:
a PCIE switching circuit based on a sea light server comprises a processor, a PCIE switching chip, an X16 connector and an X8 connector; an X16PCIE bus of the processor is respectively communicated with an X16 connector and a signal input interface of a PCIE switching chip; the PCIE switching chip comprises two signal output interfaces which are respectively communicated with the X16 connector and the X8 connector through an X8 signal channel.
Preferably, the in-place signal of the X8 connector is respectively connected to a GPIO interface of the processor and an SEL interface of the PCIE switch chip.
Preferably, the X16PCIE bus of the processor is switched to two X8 signal channels or one X16 signal channel through the state of the GPIO interface of the processor.
The beneficial effects of the utility model are that: the utility model discloses a PCIE switching circuit based on a sea light server, which can accelerate the card at a full speed when the server works as a single-path server by adding a PCIE switching chip, and the uplink bandwidth can also reach the full speed; when the full-speed acceleration card is not needed, the PCIE switching chip is used for gating, so that two cards with the bandwidth of X8 and the bandwidth of less than X8 are used, resources are fully utilized, waste of communication bandwidth is avoided when the full-speed acceleration card is not needed, and application scenes are enriched; even in the case of a two-way server, the full-speed accelerator card is mounted under the main processor, so that the delay in the data processing process can be reduced, and the speed is higher.
Drawings
Fig. 1 is a PCIE switching circuit topology diagram;
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the invention, are given by way of illustration only.
A PCIE switching circuit based on a sea light server is disclosed, as shown in figure 1, and comprises a processor, a PCIE switching chip, an X16 connector and an X8 connector; the X16PCIE bus of the processor is respectively communicated with the X16 connector and a signal input interface of the PCIE switching chip, and the X16PCIE bus of the processor is switched into two X8 signal channels or one X16 signal channel through the state of a GPIO interface of the processor; the PCIE switching chip comprises two signal output interfaces which are respectively communicated with the X16 connector and the X8 connector through an X8 signal channel; the in-place signal of the X8 connector is respectively connected with a GPIO interface of the processor and an SEL interface of the PCIE switching chip; and the PCIE switching chip controls the connection state between the signal access interface and the two signal output interfaces through the state of the in-place signal received by the SEL interface.
The working principle of the PCIE switching circuit is as follows: transmitting the in-place signal of the X8 connector to a GPIO interface of the processor and an SEL interface of the PCIE switching chip, wherein the in-place signal Present is in a normal state 1 when the X8 connector is not inserted; the state of 1 of the Present signal Present is sent to the processor, the processor configures the corresponding PCIE links into an X16 bandwidth, the state of 1 of the Present signal Present is sent to the SEL interface of the PCIE switch chip, after receiving the state of 1, the PCIE switch chip is set to interface a-interface B gating, the X16 connector originally has signal access of X8, and the signal is added with the X8 signal gated by the PCIE switch chip, so that the X16 connector operates according to the signal of the X16 bandwidth; when the X8 connector is inserted into the card, the Present signal is pulled down to 0; the state 0 of the Present signal is sent to the processor, the processor configures the corresponding PCIE links into two X8 bandwidths, the state 0 of the Present signal is sent to the SEL interface of the PCIE switch chip, the PCIE switch chip sets interface a-interface C gating after receiving the state 0, the X16 connector performs normal operation according to an access X8 signal of an X8 signal channel, the PCIE switch chip is connected to the X8 connector, and the X8 connector accesses the X8 signal to perform normal operation.
Examples
In the embodiment, two processors of the ocean light 5200 are selected for the ocean light two-way server, and each processor of the ocean light 5200 is integrated with 4 signal channels with X16 bandwidth; two of the signal channels with the bandwidth of X16 are used for cross-connecting two processors, and the remaining two signal channels are configured as X16 or X8 or X4 or X2, and have a maximum of 16 bandwidth of X1; since the server may work as a one-way server, one processor needs to meet the general requirements of all servers, wherein a starting disk, a network card and a BMC need to be hung on a main processor, so that at least one signal channel with the X16 bandwidth needs to be split, at most one signal channel with the X16 bandwidth can be configured to be the X16PCIE bandwidth, the one-way server of the processor of the maritime light 5200 can be used for uploading a full-speed accelerator card, and the uplink bandwidth can also reach full speed; when the full-speed acceleration card is not needed, the PCIE switching chip is used for gating, so that two cards with the bandwidth of X8 and the bandwidth of X8 are inserted, resources are fully utilized, and waste of communication bandwidth is avoided when the full-speed acceleration card is not needed.
Through adopting the utility model discloses an above-mentioned technical scheme has obtained following profitable effect:
the utility model discloses a PCIE switching circuit based on a sea light server, which can accelerate the card at a full speed when the server works as a single-path server by adding a PCIE switching chip, and the uplink bandwidth can also reach the full speed; when the full-speed acceleration card is not needed, the PCIE switching chip is used for gating, so that two cards with the bandwidth of X8 and the bandwidth of less than X8 are used, resources are fully utilized, waste of communication bandwidth is avoided when the full-speed acceleration card is not needed, and application scenes are enriched; even in the case of a two-way server, the full-speed accelerator card is mounted under the main processor, so that the delay in the data processing process can be reduced, and the speed is higher.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations should also be viewed as the protection scope of the present invention.
Claims (3)
1. A PCIE switching circuit based on a sea light server is characterized by comprising a processor, a PCIE switching chip, an X16 connector and an X8 connector; an X16PCIE bus of the processor is respectively communicated with an X16 connector and a signal input interface of a PCIE switching chip; the PCIE switching chip comprises two signal output interfaces which are respectively communicated with the X16 connector and the X8 connector through an X8 signal channel.
2. The PCIE switch circuit based on the sunlight server of claim 1, wherein in-place signals of the X8 connector are respectively connected to a GPIO interface of the processor and a SEL interface of the PCIE switch chip.
3. The PCIE switch circuit based on a marine optical server as claimed in claim 1, wherein an X16PCIE bus of the processor is switched to two X8 signal channels or one X16 channel through a state of a GPIO interface of the processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220088329.8U CN217640194U (en) | 2022-01-13 | 2022-01-13 | PCIE switching circuit based on sea light server |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220088329.8U CN217640194U (en) | 2022-01-13 | 2022-01-13 | PCIE switching circuit based on sea light server |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217640194U true CN217640194U (en) | 2022-10-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220088329.8U Active CN217640194U (en) | 2022-01-13 | 2022-01-13 | PCIE switching circuit based on sea light server |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217640194U (en) |
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2022
- 2022-01-13 CN CN202220088329.8U patent/CN217640194U/en active Active
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