CN217443483U - Test needle card for testing semiconductor device and test equipment - Google Patents
Test needle card for testing semiconductor device and test equipment Download PDFInfo
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- CN217443483U CN217443483U CN202120570687.8U CN202120570687U CN217443483U CN 217443483 U CN217443483 U CN 217443483U CN 202120570687 U CN202120570687 U CN 202120570687U CN 217443483 U CN217443483 U CN 217443483U
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Abstract
The application discloses a test needle card and test equipment for testing a semiconductor device, and relates to the technical field of electronic device testing. The test pin card includes: the protection circuit comprises a probe and a protection circuit, wherein when the current in the probe is within a first preset range, the resistance value of the protection circuit is within a first resistance range, and when the current in the probe is within a second preset range, the resistance value of the protection circuit is within a second resistance range. The resistance value of the protection circuit can be located in a first resistance range when the current in the probe is located in a first preset range, the error of a tested device test result can be ensured to be small due to the fact that any value in the first resistance range is small, the resistance value of the protection circuit can also be located in a second resistance range when the current in the probe is located in a second preset range, needle clamping and needle burning caused by the fact that the current is too large at the moment of breakdown of the tested device due to the fact that any value in the second resistance range is large can be prevented, and follow-up failure analysis is facilitated.
Description
Technical Field
The present application relates to the field of electronic device testing technologies, and in particular, to a test pin card and a test apparatus for testing a semiconductor device.
Background
With the development of science and technology, our lives are not away from various electronic devices, and the electronic devices generally need to be supported by semiconductor devices such as chips or memory devices, so that test equipment for semiconductor devices is also one of the important points of research for those skilled in the art.
In the related art, when performing an electrical test on a semiconductor device, a test probe card access signal may be used for performing the test, but this method often causes a large error in the test result or a probe card burning.
SUMMERY OF THE UTILITY MODEL
The application provides a test needle card and test equipment for testing a semiconductor device, which can solve the technical problem that when the semiconductor device is tested in the related technology, the test result error is large or the needle card burns the needle.
In a first aspect, an embodiment of the present application provides a test pin card for testing a semiconductor device, the test pin card including:
a probe, a first end of the probe is used for contacting and electrically connecting with the semiconductor device;
the protection circuit is connected with the second end of the probe and used for adjusting the resistance value according to the current in the probe;
when the current in the probe is within a first preset range, the resistance value of the protection circuit is within a first resistance range, and when the current in the probe is within a second preset range, the resistance value of the protection circuit is within a second resistance range, any value within the second resistance range is larger than any value within the first resistance range, and any value within the second preset range is larger than any value within the first preset range.
Optionally, the protection circuit comprises at least a self-recovery resistor, the resistance value of which is positively correlated with the current in the probe.
Optionally, the protection circuit includes at least a resistance circuit and an amplification circuit;
the first end of the resistance circuit is connected with the second end of the probe and the first end of the amplifying circuit, the second end of the resistance circuit is connected with the second end of the amplifying circuit, and the resistance circuit at least has one resistance value.
Optionally, the resistance circuit comprises at least: the circuit comprises a first resistor, a second resistor, a fourth resistor and an analog switch;
the first end of the first resistor is connected with the second end of the probe and the first end of the amplifying circuit, the second end of the first resistor is connected with the first end of the second resistor and the first end of the analog switch, the second end of the second resistor is connected with the second end of the analog switch, the third end of the analog switch, the fourth end of the analog switch is connected with the first end of the fourth resistor, and the second end of the fourth resistor is connected with the second end of the amplifying circuit.
Optionally, when the current in the probe is within the first preset range, the analog switch turns on the first end of the analog switch and the third end of the analog switch, so that the resistor circuit has a first resistance value, where the first resistance value is a resistance value of the first resistor connected in parallel with the fourth resistor.
Optionally, when the current in the probe is within the second preset range, the analog switch turns on a second end of the analog switch and a fourth end of the analog switch, so that the resistor circuit has a second resistance value, where the second resistance value is a resistance value of the first resistor and the second resistor connected in series and then connected in parallel with the fourth resistor;
wherein the second resistance value is greater than the first resistance value.
Optionally, the amplifying circuit includes a first amplifying module and a second amplifying module;
the first end of the first amplification module is connected with the first end of the resistance circuit and the second end of the probe, the second end of the first amplification module is connected with the first end of the second amplification module, and the second end of the second amplification module is connected with the second end of the resistance circuit.
Optionally, the first amplification module at least comprises: a third resistor, a fifth resistor and a first operational amplifier;
the first end of the third resistor is connected with the first end of the resistor circuit and the second end of the probe, the first end of the first operational amplifier is grounded, the second end of the first operational amplifier is respectively connected with the second end of the third resistor and the first end of the fifth resistor, and the second end of the fifth resistor is connected with the third end of the first operational amplifier and the first end of the second amplification module.
Optionally, the second amplifying module at least comprises: the digital-to-analog converter, the second operational amplifier, the third operational amplifier, the sixth resistor and the seventh resistor;
the first end of the digital-to-analog converter is connected with the second end of the first amplification module, the first end of the second operational amplifier is connected with the second end of the digital-to-analog converter, the second end of the second operational amplifier is grounded, the third end of the second operational amplifier is connected with the third end of the digital-to-analog converter and the first end of the sixth resistor, the second end of the sixth resistor is connected with the second end of the third operational amplifier and the first end of the seventh resistor, the first end of the third operational amplifier is grounded, and the third end of the third operational amplifier is connected with the second end of the seventh resistor and the second end of the resistor circuit.
In a second aspect, embodiments of the present application provide a test apparatus including a test pin card as described in any one of the above.
The beneficial effects brought by the technical scheme provided by some embodiments of the application at least comprise:
the application provides a test needle card for testing semiconductor device, the test needle card includes: the protection circuit comprises a probe and a protection circuit, wherein when the current in the probe is within a first preset range, the resistance value of the protection circuit is within a first resistance range, when the current in the probe is within a second preset range, the resistance value of the protection circuit is within a second resistance range, any value in the second resistance range is larger than any value in the first resistance range, and any value in the second preset range is larger than any value in the first preset range. The test needle card comprises a protection circuit, the resistance value of the protection circuit can be located in a first resistance range when the current in the probe is located in a first preset range, the error of a test result of the tested device can be ensured to be small due to the fact that any value in the first resistance range is small, the resistance value of the protection circuit can also be located in a second resistance range when the current in the probe is located in a second preset range, needle card burning caused by the fact that the current is too large at the moment of breakdown of the tested device due to the fact that any value in the second resistance range is large can be prevented, meanwhile, the tested device cannot be broken down seriously, and follow-up failure analysis is facilitated.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic structural diagram of a probe card for testing a semiconductor device according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a protection circuit according to another embodiment of the present application;
fig. 3 is a schematic circuit diagram of a resistor circuit according to another embodiment of the present application;
fig. 4 is a schematic circuit diagram of an amplifying circuit according to another embodiment of the present disclosure;
fig. 5 is a schematic circuit structure diagram of a protection circuit according to another embodiment of the present application.
Detailed Description
In order to make the features and advantages of the present application more obvious and understandable, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of circuits and methods consistent with certain aspects of the present application, as detailed in the appended claims.
In the description of the embodiments of the present application, it is to be understood that, in the description of the present application, "a plurality" means two or more unless otherwise specified. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a test pin for testing a semiconductor device according to an embodiment of the present disclosure.
As shown in fig. 1, the test pin card 100 may be connected to a test apparatus 200 generating a voltage or a current, and the test pin card 100 may apply a predetermined voltage or current generated by the test apparatus 200 to the device 300 under test to electrically test the device 300 under test. Specifically, in order to facilitate the test, a circuit leading-out device 400 may be further disposed between the device 300 under test and the test probe card 100, where the circuit leading-out device 400 is used to lead out a specific test point of the device 300 under test, so as to facilitate the connection of the test probe card 100, and optionally, the circuit leading-out device 400 may be a test PAD.
For example, if the breakdown voltage of the device 300 under test needs to be tested, the test pin card 100 may be contacted with the predetermined test points of the device 300 under test through the circuit leading-out devices 400, so that the test pin card 100 is electrically connected with the predetermined test points of the device 300 under test, in order to form a closed loop when testing the device 300 under test, at least two test pin cards 100 and two circuit leading-out devices 400 may be provided, wherein the device 300 under test is connected with at least two test pin cards 100 respectively, each test pin card 100 is connected with one circuit leading-out device 400 respectively, and each circuit leading-out device 400 is connected with the test equipment 200. The test equipment 200 can also be controlled to generate a linearly varying voltage, and then the linearly varying voltage is applied to the predetermined test points of the device under test 300 by the test pin card 100 until the predetermined test points of the device under test 300 are broken down or destroyed, and the voltage generated by the test equipment 200 when the predetermined test points of the device under test 300 are broken down or destroyed can also be regarded as the voltage applied to the device under test 300, i.e. the breakdown voltage of the device under test 300.
It is understood that the number of the test pin cards, the test equipment, the devices under test and the circuit leading-out devices is not limited, for example, when the devices under test are mos transistors, the number of the circuit leading-out devices 400 is greater than two, and the number of the devices can be selected as appropriate according to practical situations.
In one implementation, a fixed resistor is arranged in a test pin card, and after the test pin card is connected with a device under test, the test pin card is connected with the device under test in series, so that when a voltage loaded on the device under test is calculated, if the resistance value of the fixed resistor in the test pin card is large, the fixed resistor divides the voltage of the device under test, so that the error between the voltage generated by test equipment and the voltage loaded on the device under test is large, and the finally obtained breakdown voltage error of the device under test is also large; if the resistance value of the fixed resistor in the test pin card is small or zero, then according to ohm's law, when the preset test point of the device to be tested is broken down or destroyed, the current on the test pin card will be large, possibly causing the test pin card to be burnt out.
In view of the problems of the test pincard in the foregoing implementation manners, in the embodiment of the present application, the test pincard 100 may include a probe 110 and a protection circuit 120, where a first end of the probe 110 is a test end and is used for contacting and electrically connecting with a preset test point on the device 300 to be tested, a second end of the probe 110 is connected with the protection circuit 120, since the protection circuit 120 is connected with the probe 110, a current flowing in the probe 110 may be detected by the protection circuit 120, the protection circuit 120 may have a first resistance range when the current flowing in the probe 110 is within the first preset range, the first preset range may be considered as a corresponding current range in a case where the current flowing in the probe 110 is small or the current flowing in the probe 110 does not cause the test pincard 100 to burn, the first preset range may be adjusted by setting a component on the protection circuit 120, where any value in the first resistance range is small, the first resistance range is also adjusted by setting components of the protection circuit 120, and even the upper limit value in the first resistance range can be adjusted to a value close to zero resistance.
When the current in the probe 110 is within the first predetermined range, it can be considered that the resistance value in the first resistance range is the resistance value of the protection circuit 120 when the predetermined test point of the device under test 300 is not broken down, and any value in the first resistance range of the protection circuit 120 is smaller, so that when the protection circuit 120 and the device under test 300 perform voltage division, the value of the voltage divided on the protection circuit 120 is smaller, and therefore the voltage generated by the test equipment 200 is closer to the voltage loaded on the device under test 300, and the finally obtained breakdown voltage error of the device under test 300 is smaller.
Further, the protection circuit 120 has a second resistance range when the current in the probe 110 is within a second predetermined range, wherein, the endpoint values of the second preset range are all larger than the endpoint values of the first preset range, that is, any value in the second preset range is larger than any value in the first preset range, the second preset range can be considered as a corresponding current range under the condition that the current flowing in the probe 110 is larger or the current flowing in the probe 110 can cause the needle burning of the test needle card 100, and the second preset range can be adjusted by setting the components of the protection circuit 120, any value in the second resistance range is larger than any value in the first resistance range, the second resistance range is also adjusted by setting components of the protection circuit 120, and any value in the second resistance range can be preferably set to be far larger than the upper limit value in the first resistance range.
When the current in the probe 110 is within the second predetermined range, the resistance value in the second resistance range is considered to be the resistance value of the protection circuit 120 when the predetermined test point of the device 300 under test is broken down, and any value in the second resistance range is larger, and the protection circuit 120 is connected in series with the test pin card 100, so that the current flowing in the test pin card 100 becomes smaller, and the test pin card 100 is prevented from being burnt out under the condition of large current for a long time. On the other hand, when the current in the probe 110 is within the second preset range, the resistance value of the protection circuit 120 is within the second resistance range with any value being larger, which can also reduce the breakdown or damage of the preset test point of the device 300 to be tested, and is beneficial to the subsequent physical failure analysis of the preset test point.
In this application embodiment, probe and protection circuit when electric current in the probe is located first preset within range, protection circuit's resistance is located first resistance within range when electric current in the probe is located second preset within range, protection circuit's resistance is located second resistance within range, arbitrary value in the second resistance within range is greater than arbitrary value in the first resistance within range, just arbitrary value in the second preset within range is greater than arbitrary value in the first preset within range. The test needle card comprises a protection circuit, the resistance value of the protection circuit can be located in a first resistance range when the current in the probe is located in a first preset range, the error of a test result of the tested device can be ensured to be small due to the fact that any value in the first resistance range is small, the resistance value of the protection circuit can also be located in a second resistance range when the current in the probe is located in a second preset range, needle card burning caused by the fact that the current is too large at the moment of breakdown of the tested device due to the fact that any value in the second resistance range is large can be prevented, meanwhile, the tested device cannot be broken down seriously, and follow-up failure analysis is facilitated.
The protection circuit in the above embodiments mainly functions to change its own resistance value according to the current in the probe, so in one embodiment, the protection circuit at least includes a self-recovery resistor, the resistance value of the self-recovery resistor is in positive correlation with the current in the probe, then when the current in the probe is within a first preset range, the current in the probe can be considered to be small, the resistance value of the self-recovery resistor can be considered as the resistance value of the protection circuit, the resistance value of the self-recovery resistor is within the first resistance range, and any value in the first resistance range is also small, for example, when the current in the probe is small, the resistance value of the self-recovery resistor is also small, which can be a resistor with a nearly zero resistance value, then when the protection circuit and the device under test perform voltage division, the value of the voltage divided on the protection circuit is also small, so that the voltage generated by the test equipment is closer to the voltage loaded on the device under test, the resulting breakdown voltage error of the device under test will also be small.
Further, when the current in the probe is within a second preset range, the current in the probe can be considered to be large, then the resistance value of the self-recovery resistor can be considered as the resistance value of the protection circuit, the resistance value of the self-recovery resistor is within the second resistance range, and any value within the second resistance range is also large. On the other hand, when the current in the probe is in a second preset range, the protection circuit is in a second resistance range with any value being larger, so that the breakdown or damage of the preset test point of the tested device can be reduced, and the subsequent physical failure analysis of the preset test point is facilitated.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a protection circuit according to another embodiment of the present application.
In another embodiment, as shown in fig. 2, the protection circuit 120 includes at least a resistor circuit 121 and an amplifier circuit 122. The first end of the resistor circuit 121 is connected to the second end of the probe 110 and the first end of the amplifier circuit 122, the second end of the resistor circuit 121 is connected to the second end of the amplifier circuit 122, and the second end of the resistor circuit 121 is connected to the second end of the amplifier circuit 122 and then may be connected to the test equipment 200, where the resistor circuit 121 has at least one resistance value, the amplifier circuit 122 may amplify the resistance value, and the amplified resistance value may be considered as the total resistance value of the protection circuit 120.
Further, the resistance circuit 121 has a first value when the current in the probe 110 is within a first preset range, the first value is small, and it can be considered that the first value is close to a zero resistance value, then even if the amplification circuit 122 amplifies the first value, the amplified resistance value can be considered as the first resistance value of the protection circuit 120, the first resistance value is within the first resistance range, and the amplified resistance value is still small, so when the protection circuit 120 divides the voltage with the device under test, the divided voltage value on the protection circuit 120 is small, therefore the voltage generated by the test equipment 200 is closer to the voltage loaded on the device under test, and the finally obtained breakdown voltage error of the device under test is also small.
Further, the resistance circuit 121 has a second resistance value when the current in the probe 110 is within a second predetermined range, and the second resistance value may be much larger than the first resistance value, so that after the amplification circuit 122 amplifies the second resistance value, the amplified resistance value may be regarded as the second resistance value of the protection circuit 120, and the second resistance value is within the second resistance range, and the amplified resistance value is larger, and the protection circuit 120 is connected in series with the test pincard, so that the current flowing through the test pincard may become smaller, and the test pincard is prevented from being burned out when the test pincard is in a large current condition for a long time. On the other hand, when the current in the probe 110 is within the second preset range, the protection circuit 120 has a larger second resistance value, which can also reduce the breakdown or damage of the preset test point of the device to be tested, and is beneficial to the subsequent physical failure analysis of the preset test point.
Referring to fig. 3, fig. 3 is a schematic circuit structure diagram of a resistor circuit according to another embodiment of the present disclosure.
As shown in fig. 3, the resistor circuit 300 includes at least: a first resistor 301, a second resistor 302, a fourth resistor 304, and an analog switch 306.
Specifically, a first end of the first resistor 301 is connected to a second end of the probe and a first end of the amplifying circuit, a second end of the first resistor 301 is connected to a first end of the second resistor 302 and a first end of the analog switch 306, a second end of the second resistor 302 is connected to a second end of the analog switch 306, a third end of the analog switch 306 and a fourth end of the analog switch 306 are connected to a first end of the fourth resistor 304, and a second end of the fourth resistor is connected to a second end of the amplifying circuit.
In the resistor circuit 300, the analog switch 306 can be switched according to the current signal, so that when the current in the probe is within the first preset range, the analog switch 306 can conduct the first end of the analog switch 306 and the third end of the analog switch 306, and at this time, the resistor circuit 300 has a first resistance value, wherein the first resistance value is a resistance value formed by connecting the first resistor 301 and the fourth resistor 304 in parallel.
Further, when the current in the probe is within a second predetermined range, the analog switch 306 connects the second terminal of the analog switch 306 to the fourth terminal of the analog switch 306, and at this time, the resistor circuit 300 has a second resistance value, which is a resistance value of the first resistor 301 and the second resistor 302 connected in series and then connected in parallel with the fourth resistor 304, wherein the second resistance value is greater than the first resistance value.
Referring to fig. 4, fig. 4 is a schematic circuit structure diagram of an amplifying circuit according to another embodiment of the present disclosure.
As shown in fig. 4, the amplifying circuit 400 includes at least: a first amplification module 410 and a second amplification module 420, wherein a first end of the first amplification module 410 is connected to a first end of the resistor circuit 300 and a second end of the probe, a second end of the first amplification module 410 is connected to a first end of the second amplification module 420, and a second end of the second amplification module 420 is connected to a second end of the resistor circuit 300.
Specifically, the first amplifying module 410 at least includes: the first end of the third resistor is connected with the first end of the resistor circuit and the second end of the probe, the first end of the first operational amplifier 307 is grounded, the second end of the first operational amplifier 307 is respectively connected with the second end of the third resistor 303 and the first end of the fifth resistor 305, the second end of the fifth resistor 305 is connected with the third end of the first operational amplifier 307 and the first end of the second amplification module 420.
Further, the second amplifying module 420 at least includes: a digital-to-analog converter 401, a second operational amplifier 402, a third operational amplifier 403, a sixth resistor 404, and a seventh resistor 405.
Specifically, a first end of the digital-to-analog converter 401 is connected to a second end of the first amplification module 410, a first end of the second operational amplifier 402 is connected to a second end of the digital-to-analog converter 401, a second end of the second operational amplifier 402 is grounded, a third end of the second operational amplifier 402 is connected to a third end of the digital-to-analog converter and a first end of the sixth resistor 404, a second end of the sixth resistor 404 is connected to a second end of the third operational amplifier 403 and a first end of the seventh resistor 405, a first end of the third operational amplifier 403 is grounded, and a third end of the third operational amplifier 403 is connected to a second end of the seventh resistor 405 and a second end of the resistor circuit.
Therefore, in the resistor circuit 300, the change of the current in the probe can be used to control the switch of the analog switch 306, and further control the resistance value in the resistor circuit 300, and the amplifying circuit 400 mainly amplifies the resistance value in the resistor circuit 300, wherein the second resistor 302, the fifth resistor 305 and the first operational amplifier 307 constitute a first amplifying module; the digital-to-analog converter 401, the second operational amplifier 402, the third operational amplifier 403, the sixth resistor 404, and the seventh resistor 405 constitute a second amplification module.
Specifically, the first operational amplifier 307 amplifies the voltage on the resistor circuit 300 and then sends the amplified voltage to the first input terminal of the digital-to-analog converter 401, the digital-to-analog converter 401 and the second operational amplifier 402 form a digital-to-analog output module, the output of the digital-to-analog converter 401 changes correspondingly according to the difference of external input data, the output voltage of the second operational amplifier 402 is determined by the input data and the input voltage VREF, and the output voltage of the second operational amplifier 402 is amplified by the third operational amplifier 403 and then output. For example, when a predetermined voltage U is applied to the resistor circuit 300 and the amplifier circuit 400, and the current flowing through the probe is set to I, there are:
U=I*R general assembly =I*R Standard of merit +X*I*R Standard of merit *K;
Wherein R is General assembly To protect the total resistance of the circuit, R Standard of merit The resistance value of the resistance circuit 300 is the first resistance value or the second resistance value. And X is the percentage of the output value of the digital-to-analog converter 401 in the total amplification range, and the value range of X is between 0 and 1. For example, if the resolution of the dac 401 is 14 bits, X is N/16383, where N is the data for controlling the dac 401 to output. It should be noted here that the resolution may also be 8 bits, 10 bits, 12 bits, 16 bits, etc., and the higher the resolution bit number of the dac 401 is, the finer the resistance value output by the dac 401 is, and the finer the resistance value amplified by the amplifying circuit 400 is, so that the resolution bit number of the dac 401 can be selected by itself according to the requirement of the actual measurement accuracy.
Further, K is an amplification factor of the resistance value of the amplifying circuit 400, for example, for the resistor circuit 300 and the amplifying circuit 400 in the embodiment of the present application, the resistance value of the third resistor 303 is R3, the resistance value of the fifth resistor 305 is R5, the resistance value of the sixth resistor 404 is R6, and the resistance value of the seventh resistor 405 is R7, then K is (R5/R3) (R7/R6).
Thus, according to the above parameters:
R general assembly =R Standard of merit +X*R Standard of merit *K。
Referring to fig. 5, fig. 5 is a schematic circuit structure diagram of a protection circuit according to another embodiment of the present application.
As shown in fig. 5, the protection circuit includes a resistor circuit and an amplifier circuit, and the resistor circuit and the amplifier circuit amplify a resistance value in the resistor circuit, so that the resistor circuit has a first value when a current in the probe is within a first preset range, the first value is smaller, and the first value is considered to be close to a zero resistance value, so that even if the amplifier circuit amplifies the first value, the amplified resistance value can be considered to be the first resistance value of the protection circuit, the first resistance value is within the first resistance range, and the amplified resistance value is still smaller, so that when the protection circuit and the device under test perform voltage division, a divided voltage value on the protection circuit is smaller, and therefore, a voltage generated by the test equipment is closer to a voltage loaded on the device under test, and a breakdown voltage error of the device under test finally obtained is smaller.
Furthermore, the resistance circuit has a second resistance value when the current in the probe is within a second preset range, and the second resistance value can be far larger than the first resistance value, so that after the amplification circuit amplifies the second resistance value, the amplified resistance value can be regarded as the second resistance value of the protection circuit, the second resistance value is within the second resistance range, the amplified resistance value is larger, and the protection circuit is connected with the test pin card in series, so that the current flowing in the test pin card can be reduced, and the test pin card is prevented from being burnt out under the condition of large current for a long time. On the other hand, the protection circuit has a larger second resistance value when the current in the probe is within a second preset range, so that the breakdown or damage caused by the preset test point of the tested device can be reduced, and the subsequent physical failure analysis of the preset test point is facilitated.
It can be understood that the specific structure of the protection circuit may not be specifically limited, and may be selected according to actual conditions, and only needs to play a role of changing the resistance value of the protection circuit according to the current in the probe.
Optionally, the protection circuit further includes a ground protection circuit, and the ground protection circuit is connected to the other end of the amplifying circuit. The grounding protection circuit can collect the output signal of the amplifying circuit, and the output signal is used as a grounding terminal after amplification processing, and the grounding terminal can be connected with all the grounding wires, so that the safety of the protection circuit is improved.
The embodiment of the application also provides a test device, which comprises the test needle card for testing the semiconductor device in the embodiment, and the electrical property test of the semiconductor device can be realized through the test needle card for testing the semiconductor device.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of modules is merely a logical division, and other divisions may be realized in practice, for example, a plurality of modules or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or modules, and may be in an electrical, mechanical or other form.
Modules described as separate parts may or may not be physically separate, and parts displayed as modules may or may not be physical modules, may be located in one place, or may be distributed on a plurality of network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, functional modules in the embodiments of the present application may be integrated into one processing module, or each module may exist alone physically, or two or more modules are integrated into one module.
Those skilled in the art should also appreciate that the embodiments described in this specification are presently preferred and that no acts or modules are necessarily required in this application.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to the related descriptions of other embodiments.
In view of the above description of the test pin card and the test equipment for testing semiconductor devices provided in the present application, those skilled in the art will recognize that changes may be made in the embodiments and applications of the test pin card and the test equipment according to the principles of the present application.
Claims (10)
1. A test pin card for testing a semiconductor device, the test pin card comprising:
a probe, a first end of the probe is used for contacting and electrically connecting with the semiconductor device;
the protection circuit is connected with the second end of the probe and is used for adjusting the resistance value according to the current in the probe;
when the current in the probe is within a first preset range, the resistance value of the protection circuit is within a first resistance range, and when the current in the probe is within a second preset range, the resistance value of the protection circuit is within a second resistance range, any value within the second resistance range is larger than any value within the first resistance range, and any value within the second preset range is larger than any value within the first preset range.
2. The test pin card of claim 1, wherein the protection circuit comprises at least a self-healing resistor having a resistance value positively correlated to the current in the probe.
3. The test pin card of claim 1, wherein the protection circuit comprises at least a resistance circuit and an amplification circuit;
the first end of the resistance circuit is connected with the second end of the probe and the first end of the amplifying circuit, the second end of the resistance circuit is connected with the second end of the amplifying circuit, and the resistance circuit at least has one resistance value.
4. The test pin card of claim 3, wherein the resistance circuit comprises at least: the circuit comprises a first resistor, a second resistor, a fourth resistor and an analog switch;
the first end of the first resistor is connected with the second end of the probe and the first end of the amplifying circuit, the second end of the first resistor is connected with the first end of the second resistor and the first end of the analog switch, the second end of the second resistor is connected with the second end of the analog switch, the third end of the analog switch, the fourth end of the analog switch is connected with the first end of the fourth resistor, and the second end of the fourth resistor is connected with the second end of the amplifying circuit.
5. The probe card of claim 4, wherein the analog switch connects the first terminal of the analog switch to the third terminal of the analog switch when the current in the probe head is within the first predetermined range, so that the resistor circuit has a first resistance value, and the first resistance value is a resistance value of the first resistor connected in parallel with the fourth resistor.
6. The test card of claim 5, wherein the analog switch connects the second terminal of the analog switch to the fourth terminal of the analog switch when the current in the probe head is within the second predetermined range, so that the resistor circuit has a second resistance value, the second resistance value being a resistance value of the first resistor and the second resistor connected in series and then connected in parallel with the fourth resistor;
wherein the second resistance value is greater than the first resistance value.
7. The test pin card of claim 3, wherein the amplification circuit comprises a first amplification block and a second amplification block;
the first end of the first amplification module is connected with the first end of the resistance circuit and the second end of the probe, the second end of the first amplification module is connected with the first end of the second amplification module, and the second end of the second amplification module is connected with the second end of the resistance circuit.
8. The test pin card of claim 7, wherein the first amplification module comprises at least: a third resistor, a fifth resistor and a first operational amplifier;
the first end of the third resistor is connected with the first end of the resistor circuit and the second end of the probe, the first end of the first operational amplifier is grounded, the second end of the first operational amplifier is respectively connected with the second end of the third resistor and the first end of the fifth resistor, and the second end of the fifth resistor is connected with the third end of the first operational amplifier and the first end of the second amplification module.
9. The test pin card of claim 7, wherein the second amplification module comprises at least: the digital-to-analog converter, the second operational amplifier, the third operational amplifier, the sixth resistor and the seventh resistor;
the first end of the digital-to-analog converter is connected with the second end of the first amplification module, the first end of the second operational amplifier is connected with the second end of the digital-to-analog converter, the second end of the second operational amplifier is grounded, the third end of the second operational amplifier is connected with the third end of the digital-to-analog converter and the first end of the sixth resistor, the second end of the sixth resistor is connected with the second end of the third operational amplifier and the first end of the seventh resistor, the first end of the third operational amplifier is grounded, and the third end of the third operational amplifier is connected with the second end of the seventh resistor and the second end of the resistor circuit.
10. A test apparatus, characterized in that the test apparatus comprises a test pin card according to any one of claims 1 to 9.
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CN202120570687.8U CN217443483U (en) | 2021-03-19 | 2021-03-19 | Test needle card for testing semiconductor device and test equipment |
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