CN217157098U

CN217157098U - IO data acquisition board based on anti-surge technology

Info

Publication number: CN217157098U
Application number: CN202123397097.9U
Authority: CN
Inventors: 杨小平; 姚久明; 张衡; 郭文祥
Original assignee: Dahang Youneng Electrical Co ltd
Current assignee: Dahang Youneng Electrical Co ltd
Priority date: 2021-12-30
Filing date: 2021-12-30
Publication date: 2022-08-09
Anticipated expiration: 2031-12-30

Abstract

The utility model discloses a IO data acquisition board based on surge prevention technique, including the main control unit, switching value input unit, switching value output unit, analog input unit, communication unit and power, wherein: the analog input unit is connected with the anti-surge protection circuit; the SPI interface of the analog-digital conversion circuit of the analog input unit is connected with the SPI interface of the main control unit; the switch control end of the analog input unit and the output end of the switching value input unit are connected with the IO interface of the main control unit; the switch control end of the analog input unit comprises an enabling end and an interrupting end. The IO data acquisition board based on the anti-surge technology, which consists of a main control unit, a switching value input unit, a switching value output unit, an analog value input unit, a communication unit and a power circuit, realizes the acquisition of the switching value input of the dry contact, the acquisition of the analog value input and the control of the switching value output.

Description

IO data acquisition board based on anti-surge technology

Technical Field

The utility model relates to the field of communication technology, concretely relates to IO data acquisition board based on anti-surge technology.

Background

From the technical trend end, the functions of a software system are concerned, and the primary structure, the secondary device and the edge system have the capacity in the digital and intelligent power distribution environment, so that the safety, stability and intelligence of the power distribution network are improved, and the cloud operation and maintenance has the capacity of intelligent management, advance prejudgment and data application. The existing IO data acquisition board cannot meet the system requirements in an intelligent power distribution environment.

SUMMERY OF THE UTILITY MODEL

In view of this, the embodiment of the utility model provides a IO data acquisition board based on anti-surge technique to solve the problem that current IO data acquisition board can't satisfy the system needs in the intelligent distribution environment.

The embodiment of the utility model provides an IO data acquisition board based on surge prevention technique, including the main control unit, switching value input unit, switching value output unit, analog input unit, communication unit and power supply circuit, wherein: the analog input unit is connected with the first anti-surge protection circuit; the SPI interface of the analog-digital conversion circuit of the analog input unit is connected with the SPI interface of the main control unit; the switch control end of the analog input unit and the output end of the switching value input unit are connected with the IO interface of the main control unit; the switch control end of the analog input unit comprises an enabling end and an interrupting end.

Optionally, the first stage of the switching value input unit is a GDT gas discharge tube; the second stage of the switching value input unit is a first self-recovery fuse and a first TVS diode combination circuit; the third stage of the switching value input unit is a second TVS tube, and the voltage is clamped at a safe level; the output end of the switching value input unit is connected with an IO interface of the main control unit through the optical coupling isolation circuit.

Optionally, the driving circuit of the switching value output unit is connected with the start and stop of the triode control relay through an IO interface of the main control unit; the relay contact is connected with an external load through a second anti-surge protection circuit; the second anti-surge protection circuit is composed of a third TVS tube, two second self-recovery fuses and a GDT gas discharge tube.

Optionally, the analog input unit includes a two-way one-out-of-four analog switch circuit and an analog-to-digital conversion circuit.

Optionally, the chip of the two-way four-out-of-one analog switch circuit is 74HC 4052; the chip of the analog-to-digital conversion circuit adopts MAX 31865.

Optionally, the power circuit is externally connected with a 5V power supply; the power supply circuit outputs 3.3V-36V direct current voltage; the power supply circuit provides a current output of 0.6A.

Optionally, the power circuit adopts an MP2451 power management chip.

Optionally, the communication unit is controlled by the main control unit to switch a data receiving mode/a data sending mode; and the output end of the communication unit is connected with the third surge protection circuit.

Optionally, the communication unit adopts an RS485 communication chip with model number WS 3085.

The utility model discloses beneficial effect of embodiment:

1. the IO data acquisition board based on the anti-surge technology, which consists of a main control unit, a switching value input unit, a switching value output unit, an analog value input unit, a communication unit and a power circuit, realizes the acquisition of the switching value input of the dry contact, the acquisition of the analog value input and the control of the switching value output.

2. IO board design DO exports 2 way, DI input 12 way and AI (analog input) 6 ways to gather the state in the switch board better, can satisfy multiple test demand, and easily realize.

Drawings

The features and advantages of the invention will be more clearly understood by reference to the accompanying drawings, which are schematic and should not be understood as imposing any limitation on the invention, in which:

fig. 1 shows an overall block diagram of an IO data acquisition board based on an anti-surge technology in an embodiment of the present invention;

fig. 2 shows a main control unit and a peripheral circuit diagram of an IO data acquisition board based on an anti-surge technology in an embodiment of the present invention;

fig. 3 shows a circuit diagram of a switching value input unit of an IO data acquisition board based on an anti-surge technology in an embodiment of the present invention;

fig. 4 shows a circuit diagram of a switching value output unit of an IO data acquisition board based on an anti-surge technology in an embodiment of the present invention;

fig. 5 shows one of the analog input unit circuit diagrams of the IO data acquisition board based on the anti-surge technology in the embodiment of the present invention;

fig. 6 shows a second circuit diagram of an analog input unit of an IO data acquisition board based on the anti-surge technology in the embodiment of the present invention;

fig. 7 shows a third circuit diagram of an analog input unit of an IO data acquisition board based on the surge protection technology in the embodiment of the present invention;

fig. 8 shows a fourth circuit diagram of an analog input unit of an IO data acquisition board based on the surge protection technology in the embodiment of the present invention;

fig. 9 shows a fifth circuit diagram of an analog input unit of an IO data acquisition board based on the surge protection technology in the embodiment of the present invention;

fig. 10 shows a power circuit diagram of an IO data acquisition board based on the surge protection technology in an embodiment of the present invention;

fig. 11 shows a communication unit circuit diagram of an IO data acquisition board based on the anti-surge technology in an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.

As shown in fig. 1-11, the embodiment of the utility model provides an IO data acquisition board based on surge prevention technique, including the main control unit, switching value input unit, switching value output unit, analog input unit, communication unit and power supply circuit, wherein: the analog input unit is connected with the first anti-surge protection circuit; the SPI interface of the analog-digital conversion circuit of the analog input unit is connected with the SPI interface of the main control unit; the switch control end of the analog input unit and the output end of the switching value input unit are connected with the IO interface of the main control unit; the switch control end of the analog input unit comprises an enable end and an interrupt end. The main control unit outputs a control signal to the analog switch to enable the analog quantity to be transmitted to the analog-digital conversion unit in a serial mode, the current analog-digital conversion unit acquires analog quantity data in a three-wire mode and feeds the analog quantity data back to the main control chip through the SPI bus, and then the main control chip controls the acquisition of the next path of analog quantity data through the switching of the analog switch, so that the acquisition of the switching value input of a dry contact, the acquisition of the analog quantity input and the control of the switching value output are realized.

As shown in fig. 2, the main control chip U2 has a chip model FM33L 026. The FM33L026 chip is a 32-bit embedded microcontroller with maximum frequency of 48MHz and built-in 128K Flash and 16 KSRAM. And an external crystal oscillator 8M is adopted, and a programming circuit is designed, so that the program is convenient to modify and upgrade.

As shown in fig. 3, the switching value input part first passes through the GDT gas discharge tube as a first stage, and may discharge an amplification current; then passing through a second-stage self-recovery fuse and TVS tube combination part; the third stage is a TVS tube which can protect the following solid-state circuit fast enough, clamp the voltage at a safe level and is connected with a main control unit IO through an optical coupling isolation circuit to play a role in protection.

As shown in fig. 4, the switching value output unit and the master control unit IO control the start and stop of the relay through the triode drive circuit, the relay contact passes through the TVS tube, and the surge protection circuit combining the self-recovery fuse and the GDT gas discharge tube is connected with the external load.

As shown in fig. 5 to 9, an externally input analog quantity is input to the main control unit through the two-way one-out-of-four analog switch, and the main control unit controls the on and off of the analog switch circuit, so that the analog quantity is input to the analog-to-digital conversion unit. The main control unit feeds back the acquired analog quantity data to the analog-to-digital conversion unit through the SPI bus. The chip model of the analog-to-digital conversion chip U16 is MAX 31865. The one-out-of-four analog switch chip model is 74HC 4052.

As shown in fig. 10, the power supply part is an external input of 5V, and is converted into a 3.3V output through the MP2451 power management chip, and the chip is characterized by a high speed of 2M, providing a current output of 0.6A, adjustable input voltage range of 3.3V-36V, and turning off the chip pin and the current of 3 uA. The purpose of supplying power to other circuits is achieved through the power supply circuit.

As shown in fig. 11, the main control chip IO controls the transceiving switching of the RS485 chip WS3085, and the RS485 chip has a 5V, half-duplex, and adaptive bus polarity characteristic. The output end of the communication unit is connected with the anti-surge protection circuit to form the whole circuit, and the function of communication control is realized.

Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope defined by the appended claims.

Claims

1. The utility model provides a IO data acquisition board based on prevent surge technique which characterized in that, includes the main control unit, switching value input unit, switching value output unit, analog input unit, communication unit and power supply circuit, wherein: the analog input unit is connected with the first anti-surge protection circuit; the SPI interface of the analog-digital conversion circuit of the analog input unit is connected with the SPI interface of the main control unit; the switch control end of the analog input unit and the output end of the switching value input unit are connected with the IO interface of the main control unit; the switch control end of the analog input unit comprises an enabling end and an interrupting end.

2. The IO data acquisition board based on anti-surge technology of claim 1, wherein the first stage of the switching value input unit is a GDT gas discharge tube; the second stage of the switching value input unit is a first self-recovery fuse and a first TVS diode combined circuit; the third stage of the switching value input unit is a second TVS tube, and the voltage is clamped at a safe level; and the output end of the switching value input unit is connected with an IO interface of the main control unit through an optical coupling isolation circuit.

3. The IO data acquisition board based on the anti-surge technology according to claim 1, wherein the driving circuit of the switching value output unit is connected with a transistor through an IO interface of the main control unit to control the start and stop of a relay; the contact of the relay is connected with an external load through a second anti-surge protection circuit; the second anti-surge protection circuit is composed of a third TVS tube, two second self-recovery fuses and a GDT gas discharge tube.

4. The IO data acquisition board based on surge protection technology according to claim 1, wherein the analog input unit includes a two-way one-out-of-four analog switch circuit and an analog-to-digital conversion circuit.

5. The IO data acquisition board based on surge prevention technology according to claim 4, wherein the two chips of the four-out-of-one analog switch circuit are 74HC 4052; the chip of the analog-to-digital conversion circuit adopts MAX 31865.

6. The IO data acquisition board based on surge protection technology according to claim 1, wherein the power circuit is externally connected with a 5V power supply; the power supply circuit outputs 3.3V-36V direct current voltage; the power supply circuit provides a current output of 0.6A.

7. The IO data acquisition board based on surge protection technology of claim 6, wherein the power circuit adopts an MP2451 power management chip.

8. The IO data acquisition board based on anti-surge technology according to claim 1, wherein the communication unit is controlled by the main control unit to switch a data receiving mode/a data sending mode; and the output end of the communication unit is connected with a third-prevention surge protection circuit.

9. The IO data acquisition board based on surge prevention technology according to claim 8, wherein the communication unit is an RS485 communication chip with model number WS 3085.