CN216956610U - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN216956610U CN216956610U CN202220554188.4U CN202220554188U CN216956610U CN 216956610 U CN216956610 U CN 216956610U CN 202220554188 U CN202220554188 U CN 202220554188U CN 216956610 U CN216956610 U CN 216956610U
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Abstract
The utility model belongs to the technical field of display panel, especially, relate to an array substrate, display panel and display device, wherein, array substrate includes a plurality of sub-pixels that the array was arranged, each sub-pixel includes main pixel and the sub-pixel of arranging along the direction of row, main pixel and sub-pixel are crisscross along the row direction and are set up, main pixel's luminance is greater than sub-pixel's luminance, the main pixel and the sub-pixel of different luminance realize luminance complementary in proper order, the whole luminance of the pixel structure of adjacent row is unanimous, thereby display panel's whole luminance equilibrium has been realized, the problem of the bright dark line of display panel has been improved, display effect has been improved.
Description
Technical Field
The application belongs to the technical field of display panels, and particularly relates to an array substrate, a display panel and a display device.
Background
The display panel comprises an array substrate, a color film substrate and a liquid crystal layer, wherein the array substrate is provided with sub-pixels which are arranged in an array mode, pixel electrodes of the sub-pixels and a first common electrode form a storage capacitor, normal display of pictures of the sub-pixels in a closed state of a thin film transistor is guaranteed, the color film substrate is provided with a second common electrode, when voltage is applied to the pixel electrodes, the second common electrode and the pixel electrodes generate an electric field to act on the liquid crystal layer, polarization of incident light is adjusted, and the display panel displays corresponding images.
With the continuous development of display technology, the quality demand of people for display screens is also increasing, wherein the demand for large viewing angles is particularly obvious, so that companies adopt various ways to increase the large viewing angles, and the multi-domain pixel structure is generated.
In the multi-domain pixel structure, the sub-pixels are usually divided into main pixels and sub-pixels, and the main pixels and the sub-pixels are sequentially arranged along the row direction, wherein the luminance of the main pixels is higher than that of the sub-pixels, and the brightness difference can cause the whole bright and dark lines of the display panel at medium and low gray scales, thereby affecting the display effect.
SUMMERY OF THE UTILITY MODEL
An object of the present application is to provide an array substrate, which aims to solve the problem that a conventional display panel adopts a multi-domain pixel structure and has bright and dark lines.
A first aspect of an embodiment of the present application provides an array substrate, including a plurality of sub-pixels arranged in an array, where each of the sub-pixels includes a main pixel and a sub-pixel arranged along a column direction;
the main pixels and the sub pixels are arranged in a staggered mode along the row direction, and the brightness of the main pixels is larger than that of the sub pixels.
In an embodiment of the present application, the main pixels and the sub-pixels are arranged in a staggered manner along a column direction.
In an embodiment of the present application, the array substrate further includes:
a plurality of data lines;
a plurality of scanning lines arranged to intersect the plurality of data lines;
a common electrode;
the main pixel comprises a main pixel electrode and a main thin film transistor, the main pixel electrode is arranged opposite to the common electrode, and the main thin film transistor is correspondingly connected with the data line, the scanning line and the main pixel electrode;
the sub-pixel comprises a sub-pixel electrode and a sub-thin film transistor, the sub-pixel electrode is arranged opposite to the common electrode, and the sub-thin film transistor is correspondingly connected with the data line, the scanning line and the sub-pixel electrode;
the main pixel electrodes and the sub pixel electrodes are arranged in a staggered mode along the row direction and the column direction.
In an embodiment of the present application, the main pixel electrode and the sub pixel electrode respectively include four display domains.
In an embodiment of the present application, each of the sub-pixels further includes a routing area, and the routing area is located between the main pixel electrode and the sub-pixel electrode of each of the sub-pixels;
the scanning line, the main thin film transistor and the secondary thin film transistor are correspondingly arranged in the wiring area.
In an embodiment of the present application, the areas of the main pixel electrode and the sub-pixel electrode of each of the sub-pixels are equal, and the main pixel electrode and the sub-pixel electrodes are aligned end to end and are arranged side by side in a staggered manner.
In an embodiment of the present application, the areas of the main pixel electrode and the sub-pixel electrode of each of the sub-pixels are different, and the main pixel electrode and the sub-pixel electrode are arranged in a delta shape.
In one embodiment of the present application, the main pixel electrode and the sub pixel electrode are made of indium tin oxide.
A second aspect of the embodiments of the present application provides a display panel, where the display panel includes a color film substrate, a liquid crystal layer, and the array substrate as described above, where the liquid crystal layer is disposed between the color film substrate and the array substrate.
A third aspect of the embodiments of the present application provides a display device, which includes a backlight module, a display panel driving circuit, and the display panel as described above, where the display panel driving circuit is correspondingly connected to the display panel, and the backlight module is disposed opposite to the display panel.
Compared with the prior art, the embodiment of the application has the advantages that: in the array substrate, the main pixels and the sub-pixels of each sub-pixel are sequentially arranged in a staggered manner along the row direction, the main pixels and the sub-pixels with different brightness are sequentially complementary in brightness, and the overall brightness of the pixel structures of adjacent rows is consistent, so that the overall brightness balance of the display panel is realized, the problem of bright and dark lines of the display panel is solved, and the display effect is improved.
Drawings
Fig. 1 is a schematic view illustrating a first sub-pixel distribution of an array substrate according to an embodiment of the present disclosure;
fig. 2 is a schematic view illustrating a second sub-pixel distribution of an array substrate according to an embodiment of the present disclosure;
fig. 3 is a schematic view of a first structure of an array substrate according to a second embodiment of the present application;
fig. 4 is a schematic view illustrating a distribution of sub-pixels of an array substrate according to a second embodiment of the present application;
fig. 5 is a schematic view of a second structure of an array substrate according to a second embodiment of the present application;
fig. 6 is a schematic structural diagram of a display panel according to a third embodiment of the present application;
fig. 7 is a schematic structural diagram of a display device according to a fourth embodiment of the present application.
Wherein, each reference mark in the figure is:
100-display panel, 200-display panel driving circuit, 300-backlight module, 1-array substrate, 2-color film substrate, 3-liquid crystal layer, 10-sub-pixel, 20-data line, 30-scanning line, 40-common electrode, 50-wiring area, 11-main pixel, 12-sub-pixel, 111-main pixel electrode, 112-main thin film transistor, 121-sub-pixel electrode and 122-sub-thin film transistor.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
Example one
A first aspect of the embodiments of the present application provides an array substrate 1, as shown in fig. 1 and fig. 2, the array substrate 1 includes a plurality of sub-pixels 10 arranged in an array, where each sub-pixel 10 includes a main pixel 11 and a sub-pixel 12 arranged in a column direction;
the main pixels 11 and the sub-pixels 12 are arranged alternately in the row direction, and the luminance of the main pixels 11 is greater than that of the sub-pixels 12.
In this embodiment, the sub-pixels 10 are a red sub-pixel 10, a green sub-pixel 10 and a blue sub-pixel 10, respectively, the red sub-pixel 10, the green sub-pixel 10 and the blue sub-pixel 10 are sequentially arranged along the row direction, meanwhile, the main pixels 11 and the sub-pixels 12 of the sub-pixels 10 of each color are sequentially arranged in a staggered manner in the row direction, namely the main pixel 11 of the red sub-pixel 10, the sub-pixel 12 of the green sub-pixel 10, the main pixel 11 of the blue sub-pixel 10, the sub-pixel 12 of the red sub-pixel 10, the main pixel 11 of the green sub-pixel 10 and the sub-pixel 12 of the blue sub-pixel 10 are sequentially arranged, or the sub-pixel 12 of the red sub-pixel 10, the main pixel 11 of the green sub-pixel 10, the sub-pixel 12 of the blue sub-pixel 10, the main pixel 11 of the red sub-pixel 10, the sub-pixel 12 of the green sub-pixel 10 and the main pixel 11 of the blue sub-pixel 10 are sequentially arranged, and the six sub-pixels 10 are arranged on the array substrate 1 as a whole in an array.
The main pixels 11 and the sub-pixels 12 of the sub-pixels 10 with different brightness and different brightness are mutually complemented in the row direction sequentially, the main pixels 11 and the sub-pixels 12 in the same row are mutually complemented in brightness, and the overall brightness of the pixel structures of adjacent rows is consistent, so that the overall brightness balance of the display panel 100 is realized, the problem of bright and dark lines of the display panel 100 is solved, and the display effect is improved.
As shown in fig. 1, the arrangement of the main pixels 11 and the sub-pixels 12 of the sub-pixels 10 in the column direction may be arranged in a staggered manner or in a non-staggered manner, and as shown in fig. 1, the main pixels 11 and the sub-pixels 12 corresponding to the sub-pixels 10 are arranged in a staggered manner in sequence along the column direction, and the main pixels 11 and the sub-pixels 12 in the same column realize brightness complementation, and the overall brightness of the pixel structures in adjacent columns is consistent, so that the problem of bright and dark lines of the display panel 100 is further improved, and the display effect is improved.
Or as shown in fig. 2, along the column direction, the corresponding sub-pixels 10 are arranged in the order of the main pixel 11, the sub-pixel 12, the main pixel 11, and the sub-pixel 12, or in the order of the sub-pixel 12, the main pixel 11, the sub-pixel 12, and the main pixel 11, so that for the sub-pixels 10 in the same column, the brightness complementation is also achieved, and the overall brightness of the pixel structures in adjacent columns is consistent, thereby further improving the problem of bright and dark lines of the display panel 100 and enhancing the display effect.
In order to avoid increasing the non-display area of the display panel 100 and improving the brightness uniformity due to an excessively large distance between the adjacent main pixels 11 and the main pixels 11 or between the sub-pixels 12 and the sub-pixels 12, in an embodiment of the present invention, as shown in fig. 1, the main pixels 11 and the sub-pixels 12 are staggered along the column direction, the main pixels 11 and the sub-pixels 12 in the same column realize brightness complementation, the entire brightness of the pixel structures in adjacent columns is consistent, the main pixels 11 and the sub-pixels 12 in the same row are complementary, and the entire brightness of the pixel structures in adjacent rows is consistent, which further improves the problem of bright and dark lines of the display panel 100 and improves the display effect.
Example two
Based on the first embodiment, as shown in fig. 3, 4 and 5, in an embodiment of the present application, the array substrate 1 further includes:
a plurality of data lines 20;
a plurality of scan lines 30 crossing the plurality of data lines 20;
a common electrode 40;
the main pixel 11 comprises a main pixel electrode 111 and a main thin film transistor 112, wherein the main pixel electrode 111 is arranged opposite to the common electrode 40, and the main thin film transistor 112 is correspondingly connected with the data line 20, the scanning line 30 and the main pixel electrode 111;
the sub-pixel 12 comprises a sub-pixel electrode 121 and a sub-thin film transistor 122, the sub-pixel electrode 121 is arranged opposite to the common electrode 40, and the sub-thin film transistor 122 is correspondingly connected with the data line 20, the scanning line 30 and the sub-pixel electrode 121;
the main pixel electrodes 111 and the sub pixel electrodes 121 are alternately arranged in a row direction and a column direction.
In this embodiment, a scan line 30 is disposed corresponding to each row of sub-pixels 10, the scan line 30 is disposed between the main pixel electrode 111 and the sub-pixel electrode 121 of the sub-pixel 10, meanwhile, a data line 20 is disposed corresponding to each column of sub-pixels 10, the drain and the source of the main tft 112 are correspondingly connected to the main pixel electrode 111 and the data line 20, the gate of the main tft 112 is connected to the scan line 30, the main pixel electrode 111 and the oppositely disposed common electrode 40 form a main storage capacitor, the drain and the source of the sub-tft 122 are correspondingly connected to the sub-pixel electrode 121 and the data line 20, the gate of the sub-tft 122 is connected to the scan line 30, and the sub-pixel electrode 121 and the oppositely disposed common electrode 40 form a sub-storage capacitor.
The main pixel electrodes 111 and the sub-pixel electrodes 121 of the sub-pixels 10 of different colors are sequentially arranged in a staggered manner along the row direction, the main pixel electrodes 111 and the sub-pixel electrodes 121 are respectively arranged opposite to the common electrode layer on the color film substrate, when the main pixel electrodes 111 and the sub-pixel electrodes 121 are electrified, the main pixel electrodes 111 and the sub-pixel electrodes 121 are matched with the common electrode layer on the color film substrate to drive the liquid crystal layer, so that the polarization of light incident to the liquid crystal layer is adjusted, and different brightness is displayed, the different brightness of the main pixel electrodes 111 and the sub-pixel electrodes 121 is balanced along the column direction and the row direction, the overall brightness of the pixel electrode structures of adjacent columns is consistent, the overall brightness of the pixel electrode structures of adjacent rows is consistent, the problem of bright lines and dark lines of the display panel 100 is further improved, and the display effect is improved.
The main thin film transistor 112 and the sub-thin film transistor 122 in the same sub-pixel 10 can be connected to the same scan line 30 or connected to different adjacent scan lines 30, and the connection manner is not limited.
Meanwhile, according to the connection relationship, the gate electrode of the main thin film transistor 112, the gate electrode of the thin film transistor, and the scan line 30 may be made of the same metal layer, the source electrode and the gate electrode of the main thin film transistor 112, the source electrode and the gate electrode of the sub thin film transistor 122, and the data line 20 may be made of the same metal layer, and the main pixel electrode 111 and the sub pixel electrode 121 may be made of indium tin oxide.
The main pixel electrode 111 and the sub-pixel electrode 121 respectively include a plurality of display domains, which may include two display domains, four display domains, and the like, wherein when the two display domains are included, the display panel 100 has a four-domain pixel structure, and when the four display domains are included, the display panel 100 has an eight-domain pixel structure.
In order to improve the viewing angle performance of the panel, in an embodiment of the present invention, the main pixel electrode 111 and the sub-pixel electrode 121 respectively include four display domains, and the rotation angles of the liquid crystal molecules of the four display domains of the main pixel electrode 111 and the four display domains of the sub-pixel electrode 121 are different, so as to improve color shift.
In order to reduce additional routing and simplify the structure of the array substrate 1, in an embodiment of the present disclosure, each sub-pixel 10 further includes a routing area 50, where the routing area 50 is located between the main pixel electrode 111 and the sub-pixel electrode 121 of each sub-pixel 10;
the scan lines 30, the main tfts 112 and the sub tfts 122 are correspondingly disposed in the routing areas 50, each routing area 50 traverses the middle area of the main pixel electrodes 111 and the sub pixel electrodes 121 of each row of the sub pixels 10 to form the routing areas 50 of adjacent rows, and the scan lines 30 are not bent along the row direction, thereby simplifying the manufacturing process of the array substrate 1.
Meanwhile, the areas of the pixel electrodes may be equal or different, as shown in fig. 1 and 3, in an embodiment of the present invention, the areas of the main pixel electrode 111 and the sub-pixel electrode 121 of each sub-pixel 10 are different, the main pixel electrode 111 and the sub-pixel electrode 121 are arranged in a delta shape, the area of the main pixel electrode 111 is smaller than the area of the sub-pixel electrode 121, the main pixel electrode 111 inputs the first data voltage, the sub-pixel electrode 121 inputs the second data voltage and presents different luminances, a delta-shaped structure is formed by interleaving, the different luminances of the main pixel electrode 111 and the sub-pixel electrode 121 are balanced along the column direction and the row direction, the entire luminances of the pixel electrode structures in adjacent columns are the same, and the entire luminances of the pixel electrode structures in adjacent rows are the same, which further improves the problem of bright and dark lines of the display panel 100 and improves the display effect.
Or as shown in fig. 4 and fig. 5, in an embodiment of the present application, the areas of the main pixel electrode 111 and the sub-pixel electrode 121 of each sub-pixel 10 are equal, the main pixel electrode 111 and the sub-pixel electrode 10 are aligned end to end and are arranged side by side in a staggered manner, the sub-pixels 10 in adjacent rows and adjacent columns are arranged side by side, and a flat wiring area 50 is formed between the main pixel 11 and the sub-pixel 12 in each row for facilitating wiring, the main pixel electrode 111 inputs a first data voltage, the sub-pixel electrode 121 inputs a second data voltage, and presents different brightness, through the parallel staggered arrangement, the different brightness of the main pixel electrode 111 and the sub-pixel electrode 121 is balanced along the column direction and the row direction, the overall brightness of the pixel electrode structures of adjacent columns is consistent, and the overall brightness of the pixel electrode structures of adjacent rows is consistent, so that the problem of bright and dark lines of the display panel 100 is further solved, and the display effect is improved.
EXAMPLE III
The present application further provides a display panel 100, as shown in fig. 6, the display panel 100 includes a color film substrate 2, a liquid crystal layer 3, and an array substrate 1, and the specific structure of the array substrate 1 refers to the above embodiments, and since the display panel 100 adopts all technical solutions of all the above embodiments, the display panel at least has all beneficial effects brought by the technical solutions of the above embodiments, and details are not repeated here.
In this embodiment, the color filter substrate 2 includes an upper polarizer, a color filter, a common electrode layer, and an upper alignment layer, and the array substrate 1 includes a lower alignment layer, a driving layer, and a lower polarizer, where the driving layer is a thin film transistor 132 driving layer, and includes a main pixel electrode 111, a sub-pixel electrode 121, a main thin film transistor 112, and a sub-thin film transistor 122 that correspond to each other, the driving layer is used to drive liquid crystal molecules of the liquid crystal layer 3 in cooperation with the common electrode layer on the array substrate 1, and the array substrate 1 is provided with a corresponding data line 20, a corresponding scan line 30, sub-pixels 10 arranged in an array, and a corresponding common electrode 40.
Example four
The present application further provides a display device, as shown in fig. 7, the display device includes a backlight module 300, a display panel driving circuit 200, and a display panel 100, and the specific structure of the display device refers to the above embodiments. The display panel driving circuit 200 is correspondingly connected to the display panel 100, and the backlight module 300 is disposed opposite to the display panel 100.
In this embodiment, the display panel driving circuit 200 includes a source driving circuit, a gate driving circuit, a voltage compensation circuit 400, and a common electrode voltage circuit 300, and may further include a timing controller and a power management integrated circuit required for driving, where the timing controller controls the source driving circuit and the gate driving circuit to scan line by line, and at the same time, the common electrode voltage circuit 300 obtains an analog voltage output by the power management integrated circuit, converts the analog voltage into a common electrode voltage signal with a corresponding size, and outputs the common electrode voltage signal to the common electrode layer of the color film substrate 2 through the structures such as the array substrate 1, and outputs the common electrode voltage signal to the common electrode 40 on the array substrate 1, and the common electrode voltage signal on the common electrode layer of the color film substrate 2 and the data driving signal output by the source driving circuit cooperate to drive liquid crystal molecules and cooperate with the backlight module 300 to display corresponding image information.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.
Claims (10)
1. An array substrate comprises a plurality of sub-pixels arranged in an array, and is characterized in that:
each sub-pixel comprises a main pixel and a sub-pixel which are arranged along the column direction;
the main pixels and the sub pixels are arranged in a staggered mode along the row direction, and the brightness of the main pixels is larger than that of the sub pixels.
2. The array substrate of claim 1, wherein the main pixels and the sub-pixels are staggered in a column direction.
3. The array substrate of claim 1, wherein the array substrate further comprises:
a plurality of data lines;
a plurality of scanning lines arranged to intersect the plurality of data lines;
a common electrode;
the main pixel comprises a main pixel electrode and a main thin film transistor, the main pixel electrode is arranged opposite to the common electrode, and the main thin film transistor is correspondingly connected with the data line, the scanning line and the main pixel electrode;
the sub-pixel comprises a sub-pixel electrode and a sub-thin film transistor, the sub-pixel electrode is arranged opposite to the common electrode, and the sub-thin film transistor is correspondingly connected with the data line, the scanning line and the sub-pixel electrode;
the main pixel electrodes and the sub pixel electrodes are arranged in a staggered mode along the row direction and the column direction.
4. The array substrate of claim 3, wherein the main pixel electrode and the sub pixel electrode each include four display domains.
5. The array substrate of claim 3, wherein each of the sub-pixels further comprises a routing area between the main pixel electrode and the sub-pixel electrode of each of the sub-pixels;
the scanning line, the main thin film transistor and the secondary thin film transistor are correspondingly arranged in the wiring area.
6. The array substrate of claim 3, wherein the main pixel electrode and the sub-pixel electrode of each sub-pixel have the same area, and the main pixel electrode and the sub-pixel electrode are aligned end to end and are staggered side by side.
7. The array substrate of claim 3, wherein the main pixel electrode and the sub-pixel electrode of each sub-pixel have different areas, and the main pixel electrode and the sub-pixel electrode are arranged in a delta shape.
8. The array substrate of claim 3, wherein the main pixel electrode and the sub pixel electrode are made of indium tin oxide.
9. A display panel, comprising a color film substrate, a liquid crystal layer and the array substrate of any one of claims 1 to 8, wherein the liquid crystal layer is located between the color film substrate and the array substrate.
10. A display device, comprising a backlight module, a display panel driving circuit and the display panel as claimed in claim 9, wherein the display panel driving circuit is connected to the display panel correspondingly, and the backlight module is disposed opposite to the display panel.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202220554188.4U CN216956610U (en) | 2022-03-10 | 2022-03-10 | Array substrate, display panel and display device |
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| CN202220554188.4U CN216956610U (en) | 2022-03-10 | 2022-03-10 | Array substrate, display panel and display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115291447A (en) * | 2022-09-26 | 2022-11-04 | 惠科股份有限公司 | Display panel and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115291447A (en) * | 2022-09-26 | 2022-11-04 | 惠科股份有限公司 | Display panel and display device |
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