CN216719922U - Multi-chip overlapping and jointing structure - Google Patents

Multi-chip overlapping and jointing structure Download PDF

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Publication number
CN216719922U
CN216719922U CN202220033268.5U CN202220033268U CN216719922U CN 216719922 U CN216719922 U CN 216719922U CN 202220033268 U CN202220033268 U CN 202220033268U CN 216719922 U CN216719922 U CN 216719922U
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China
Prior art keywords
panel
support
supporting panel
chip
supporting
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CN202220033268.5U
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Chinese (zh)
Inventor
马健中
刘刚
詹英祺
洪火峰
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Zhongkedi High System Technology Co ltd
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Tongchuan Jiufang Xunda Microwave System Co ltd
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Abstract

The utility model provides a multi-chip stacking and jointing structure, which relates to the technical field of chips and comprises a stacking inner layer and a limiting shell, wherein the stacking inner layer is arranged in the limiting shell and comprises a supporting panel, a layering bracket and a side bracket, the bottom of the layering bracket is connected in the side bracket, the other end of the layering bracket is connected to the upper surface of the supporting panel, and the bottom of the supporting panel is lapped on the top of the side bracket. The utility model limits the shell to adopt the layered bracket and the side bracket to respectively butt joint with the plurality of layers of supporting panels, thereby improving the stability of each supporting panel, and a certain space is reserved between each supporting panel, which can effectively prevent the supporting panels from contacting with other supporting panels to avoid damaging the internal chip, and can improve the protection effect and range of the structure on the chip to a certain extent, and simultaneously, the whole volume is smaller, which is beneficial to reducing the quality of the whole structure.

Description

Multi-chip overlapping and jointing structure
Technical Field
The utility model relates to the technical field of chips, in particular to a multi-chip stacking and jointing structure.
Background
Chips/dies are a way in electronics to miniaturize circuits (including primarily semiconductor devices, including passive components, etc.) and are often fabricated on the surface of a semiconductor wafer.
However, in the prior art, the conventional multi-chip stacking structure generally adopts the method that the chips are put into the same carrying platform together and then stacked or combined, so that the chip at the top presses the chip at the bottom, the chip at the bottom is easily damaged after long-term use, the overall stability of the conventional stacking mode is poor, the chips need to be taken from the topmost position in sequence, and once the chips are taken out from the bottom, the whole structure is easily collapsed or inclined.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the defects in the prior art, the top chip presses the bottom chip, the bottom chip is easy to damage after long-term use, the overall stability of the traditional stacking mode is poor, the chips need to be taken from the topmost position in sequence, and the whole structure is easy to collapse or incline once the chips are drawn from the bottom.
In order to achieve the purpose, the utility model adopts the following technical scheme: multi-chip stack joint structure, including stack inlayer and restriction shell, the stack inlayer sets up the inside at the restriction shell, the stack inlayer includes supporting panel, layering support and side support, the inside at side support is connected to the bottom of layering support, the upper surface at supporting panel is connected to the other end of layering support, supporting panel's bottom overlap joint is at side support's top.
As a preferred embodiment, the side bracket includes a longitudinal pillar, a lateral projection having a bottom connected to an inner side of the longitudinal pillar, and an elastic rod having a top connected to the bottom of the lateral projection.
The technical effect of adopting the further scheme is as follows: the limiting shell adopts a layered bracket and a lateral bracket to respectively butt joint the supporting panels of multiple layers, so that the stability of each supporting panel is improved, and a certain space is reserved between each supporting panel.
As a preferred embodiment, the top of the supporting panel is provided with an accommodating slot, and the edge of the supporting panel is provided with an anti-slip notch.
The technical effect of adopting the further scheme is as follows: so as to avoid the phenomenon that the stability of the whole structure is influenced by the rotation of the layered bracket.
As a preferred embodiment, a fixing fixture block is arranged at the joint of the layered bracket and the supporting panel.
The technical effect of adopting the further scheme is as follows: the structural tightness between the layered support and the supporting panel is improved, and the probability of looseness is reduced.
In a preferred embodiment, the bottom of the elastic rod is provided with a movable filling block.
The technical effect of adopting the further scheme is as follows: carry out the secondary to the length of elastic rod and extend to the supporting panel of different intervals of adaptation.
In a preferred embodiment, the receiving slot comprises a cover panel, and both sides of the cover panel are provided with movable contact rods.
The technical effect of adopting the further scheme is as follows: the internal chip is protected by a cover panel.
As a preferred embodiment, the other end of the movable trolley bar is attached to the upper surface of the support panel.
The technical effect of adopting the further scheme is as follows: the covering panel is convenient to disassemble.
Compared with the prior art, the utility model has the advantages and positive effects that,
1. according to the utility model, the shell is limited to adopt the layered support and the side support to be respectively butted with the plurality of layers of supporting panels, so that the stability of each supporting panel is improved, a certain space is reserved between each supporting panel, the supporting panels can be effectively prevented from being contacted with other supporting panels, the damage to an internal chip is avoided, and the protection effect and the protection range of the structure on the chip can be improved to a certain extent.
2. In the utility model, the side support at the bottom is contacted with the bottom of the limiting shell by the elastic rod, and the bottommost chip can be separated from the shell, so that the situation that the bottom chip is deformed or damaged due to extrusion is avoided in the transportation process, and meanwhile, the whole size is small, thereby being beneficial to reducing the whole structure quality.
Drawings
FIG. 1 is a schematic structural diagram of a multi-chip stacking and bonding structure according to the present invention;
FIG. 2 is a schematic diagram of a constraining sheath of the multi-chip stacking and bonding structure provided by the present invention;
FIG. 3 is a schematic diagram of a side frame structure of the multi-chip stacking bonding structure according to the present invention;
fig. 4 is an enlarged view of the structure of the portion a in fig. 2 according to the present invention.
Illustration of the drawings:
1. superposing the inner layers; 2. a confinement housing;
21. a support panel; 22. layering a support; 23. a lateral bracket; 24. an anti-slip notch; 25. fixing the fixture block; 26. an accommodating card slot;
231. a longitudinal strut; 232. a transverse projection; 233. an elastic rod; 234. a movable filling block;
261. a covering panel; 262. a movable feeler lever.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
As shown in fig. 1 and 2, the present invention provides a technical solution: multi-chip stack joint structure, including stack inlayer 1 and restriction shell 2, stack inlayer 1 sets up the inside at restriction shell 2, stack inlayer 1 includes supporting panel 21, layered support 22 and side support 23, the inside at side support 23 is connected to layered support 22's bottom, the upper surface at supporting panel 21 is connected to layered support 22's the other end, supporting panel 21's bottom overlap joint is at side support 23's top, supporting panel 21's top is provided with and holds draw-in groove 26, anti-skidding breach 24 has been seted up to supporting panel 21's edge, layered support 22 is provided with fixed fixture block 25 with supporting panel 21's handing-over department.
In the present embodiment, the supporting panel 21 is mainly used for primarily defining the horizontal position of the chip, the lateral brackets 23 secondarily define the longitudinal position of the supporting panel 21, the chip is mainly placed inside the accommodating slot 26, and each lateral bracket 23 is connected to the supporting panel 21 through the layered bracket 22, so that an H-shaped supporting framework is formed between the lateral bracket 23 and the supporting panel 21, and the anti-slip notch 24 mainly defines the angle and position of the layered bracket 22, and one end of the layered bracket 22 is fixed on the supporting panel 21 through the fixing block 25, so as to avoid the influence of the rotation of the layered bracket 22 on the stability of the whole structure.
Example 2
As shown in fig. 2, 3 and 4, the side bracket 23 includes a longitudinal pillar 231, a transverse protrusion 232 and an elastic rod 233, the bottom of the transverse protrusion 232 is connected to the inner side of the longitudinal pillar 231, the top of the elastic rod 233 is connected to the bottom of the transverse protrusion 232, the bottom of the elastic rod 233 is provided with a movable filling block 234, the accommodating slot 26 includes a cover panel 261, both sides of the cover panel 261 are provided with movable contact rods 262, and the other ends of the movable contact rods 262 are connected to the upper surface of the support panel 21.
In this embodiment, the height of the side bracket 23 is determined by the longitudinal pillar 231, the transverse protrusion 232 is located below the supporting panel 21 to perform a supporting function, a certain space is reserved between the transverse protrusion 232 and the longitudinal pillar 231 to limit the supporting panel 21, the transverse protrusion 232 is connected to the supporting panel 21 below by the elastic rod 233 and the movable filling block 234 to reinforce the space between the two supporting panels 21, and the movable filling block 234 is connected to the elastic rod 233 and can be adjusted according to the space between the supporting panels 21 to avoid the occurrence of the situation that the length of the elastic rod 233 is insufficient, when a chip is stored, the movable contact rod 262 can be pulled out from the supporting panel 21, and then the chip is placed between the covering panel 261 and the supporting panel 21, and then the chip is closed.
The working principle is as follows:
as shown in fig. 1, 2, 3 and 4, when storing chips, the movable contact rod 262 can be pulled out from the support panel 21, then the chips are placed between the cover panel 261 and the support panel 21, and then the chips are closed, the support panel 21 is mainly used for primarily defining the horizontal position of the chips, the lateral supports 23 secondarily define the longitudinal position of the support panel 21, the chips are mainly placed inside the accommodating slots 26, and each lateral support 23 is connected with the support panel 21 through the layered support 22, so that an H-shaped support structure is formed between the lateral supports 23 and the support panel 21, the anti-slip notch 24 mainly defines the angle and position of the layered support 22, and one end of the layered support 22 is fixed on the support panel 21 through the fixing block 25, so as to avoid the phenomenon that the layered support 22 rotates to affect the stability of the whole structure, the height of the side bracket 23 is determined by the longitudinal support 231, the transverse projection 232 is positioned below the support panel 21 to play a supporting role, meanwhile, a certain space is reserved between the transverse projection 232 and the longitudinal support 231 for limiting the support panel 21, the transverse projection 232 is connected with the support panel 21 below by the elastic rod 233 and the movable filling block 234 to reinforce the space between the two support panels 21, and meanwhile, the movable filling block 234 is connected with the elastic rod 233 and can be adjusted according to the space between the support panels 21 to avoid the occurrence of the situation that the length of the elastic rod 233 is insufficient.
The above description is only a preferred embodiment of the present invention, and not intended to limit the present invention in other forms, and any person skilled in the art may apply the above modifications or changes to the equivalent embodiments with equivalent changes, without departing from the technical spirit of the present invention, and any simple modification, equivalent change and change made to the above embodiments according to the technical spirit of the present invention still belong to the protection scope of the technical spirit of the present invention.

Claims (7)

1. Multi-chip stack joint structure, including stack inlayer (1) and restriction shell (2), stack inlayer (1) sets up the inside at restriction shell (2), its characterized in that: the stack inlayer (1) is including supporting panel (21), layering support (22) and side support (23), the inside at side support (23) is connected to the bottom of layering support (22), the upper surface at supporting panel (21) is connected to the other end of layering support (22), the top at side support (23) is lapped to the bottom of supporting panel (21).
2. The multi-chip stacking and bonding structure of claim 1, wherein: the side support (23) comprises a longitudinal support column (231), a transverse convex block (232) and an elastic rod (233), the bottom of the transverse convex block (232) is connected to the inner side of the longitudinal support column (231), and the top of the elastic rod (233) is connected to the bottom of the transverse convex block (232).
3. The multi-chip stacking and bonding structure of claim 1, wherein: the top of the supporting panel (21) is provided with an accommodating clamping groove (26), and the edge of the supporting panel (21) is provided with an anti-skid notch (24).
4. The multi-chip stacking and bonding structure of claim 2, wherein: and a fixed clamping block (25) is arranged at the joint of the layered bracket (22) and the supporting panel (21).
5. The multi-chip stacking and bonding structure of claim 2, wherein: the bottom of the elastic rod (233) is provided with a movable filling block (234).
6. The multi-chip stacking and bonding structure of claim 3, wherein: the accommodating clamping groove (26) comprises a covering panel (261), and two sides of the covering panel (261) are provided with movable contact rods (262).
7. The multi-chip stacking and bonding structure of claim 6, wherein: the other end of the movable contact rod (262) is connected to the upper surface of the support panel (21).
CN202220033268.5U 2022-01-07 2022-01-07 Multi-chip overlapping and jointing structure Active CN216719922U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202220033268.5U CN216719922U (en) 2022-01-07 2022-01-07 Multi-chip overlapping and jointing structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202220033268.5U CN216719922U (en) 2022-01-07 2022-01-07 Multi-chip overlapping and jointing structure

Publications (1)

Publication Number Publication Date
CN216719922U true CN216719922U (en) 2022-06-10

Family

ID=81891406

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202220033268.5U Active CN216719922U (en) 2022-01-07 2022-01-07 Multi-chip overlapping and jointing structure

Country Status (1)

Country Link
CN (1) CN216719922U (en)

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Effective date of registration: 20230808

Address after: 710000, 2nd Floor, Tianze Building, Software Park, Keji 2nd Road, High tech Zone, Xi'an City, Shaanxi Province

Patentee after: Zhongkedi High System Technology Co.,Ltd.

Address before: 727000 building 3, phase II, optical electronics integrated industrial park, Chuangxin Road, new material industrial park, Tongchuan City, Shaanxi Province

Patentee before: Tongchuan Jiufang Xunda Microwave System Co.,Ltd.

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