CN216527155U - Data line for communication between two USB HOST interface devices - Google Patents
Data line for communication between two USB HOST interface devices Download PDFInfo
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- CN216527155U CN216527155U CN202120658831.3U CN202120658831U CN216527155U CN 216527155 U CN216527155 U CN 216527155U CN 202120658831 U CN202120658831 U CN 202120658831U CN 216527155 U CN216527155 U CN 216527155U
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Abstract
The utility model provides a data line for communication between two USB HOST interface devices, comprising: the USB interface comprises a first USB/serial port chip, a second USB/serial port chip, a first USB data line and a second USB data line; the first USB data line, the first USB/serial port chip, the second USB/serial port chip and the second USB data line are connected in sequence. Has the following advantages: (1) the first USB/serial port chip U1 and the second USB/serial port chip U2 are arranged between the two sections of USB data lines, so that mutual communication between terminals of which the two interfaces are USB HOST interfaces is realized, and convenience is brought to users; (2) the first USB/serial port chip U1 and the second USB/serial port chip U2 are connected to the same VCC, and the complexity of system configuration is simplified.
Description
Technical Field
The utility model belongs to the technical field of renewable energy sources, and particularly relates to a data line for communication between two USB HOST interface devices.
Background
USB devices are classified into a USB HOST device (USB master device) and a USB SLAVE device (USB SLAVE device), and data transfer between the two devices can be achieved only when the USB HOST device and the USB SLAVE device are connected.
At present, common terminal devices such as a face-brushing POS machine, a self-service terminal or a cash register device are only configured with a USB HOST interface, that is: the terminal equipment can only be used as USB main equipment; however, a general computer is also only configured with a USB HOST interface, that is: the computer can only be used as a USB master device. Therefore, the terminal device and the computer are directly connected by the USB data line, and the communication function cannot be realized, so that the data interaction between the terminal device and the computer cannot be realized.
SUMMERY OF THE UTILITY MODEL
Aiming at the defects in the prior art, the utility model provides a data line for communication between two USB HOST interface devices, which can effectively solve the problems.
The technical scheme adopted by the utility model is as follows:
the utility model provides a data line for communication between two USB HOST interface devices, comprising: a first USB/serial chip (U1), a second USB/serial chip (U2), a first USB data line (L1) and a second USB data line (L2);
one end of the first USB data line (L1) is connected with a first USB plug (P1) of a first USB HOST device; the other end of the first USB data line (L1) is connected with one end of the first USB/serial port chip (U1); the other end of the first USB/serial port chip (U1) is connected with one end of the second USB/serial port chip (U2); the other end of the second USB/serial port chip (U2) is connected with one end of the second USB data line (L2); the other end of the second USB data line (L2) is connected to a second USB plug (P2) of a second USB HOST device.
Preferably, the first USB data line (L1) includes a first power supply line (VCC), a first USB signal negative line (DM1), a first USB signal positive line (DP1), and a first ground line (GND 1);
the second USB data line (L2) comprises a second USB signal negative line (DM2), a second USB signal positive line (DP2) and a second ground line (GND 2);
the first USB/serial port chip (U1) is provided with a first power line pin, a first USB signal negative pole pin, a first USB signal positive pole pin, a first serial port sending pin and a first serial port receiving pin;
the second USB/serial port chip (U2) is provided with a second power line pin, a second USB signal negative electrode pin, a second USB signal positive electrode pin, a second serial port sending pin and a second serial port receiving pin;
a first power line pin of the first USB/serial chip (U1) and a second power line pin of the second USB/serial chip (U2) are commonly connected to a first power supply line (VCC) of the first USB data line (L1);
a first USB signal negative line (DM1) of the first USB data line (L1) is connected to a first USB signal negative pin of the first USB/serial chip (U1); a first USB signal positive electrode line (DP1) of the first USB data line (L1) is connected to a first USB signal positive electrode pin of the first USB/serial port chip (U1);
a first serial port sending pin of the first USB/serial port chip (U1) is connected to a second serial port receiving pin of the second USB/serial port chip (U2); a first serial port receiving pin of the first USB/serial port chip (U1) is connected to a second serial port sending pin of the second USB/serial port chip (U2);
a second USB signal negative pin of the second USB/serial port chip (U2) is connected to a second USB signal negative line (DM2) of the second USB data line (L2); and a second USB signal positive electrode pin of the second USB/serial port chip (U2) is connected to a second USB signal positive electrode line (DP2) of the second USB data line (L2).
Preferably, the first USB/serial port chip (U1) and the second USB/serial port chip (U2) are both CP2102 chips.
The data line for communication between two USB HOST interface devices provided by the utility model has the following advantages:
(1) the first USB/serial port chip U1 and the second USB/serial port chip U2 are arranged between the two sections of USB data lines, so that mutual communication between terminals of which the two interfaces are USB HOST interfaces is realized, and convenience is brought to users;
(2) the first USB/serial port chip U1 and the second USB/serial port chip U2 are connected to the same VCC, and the complexity of system configuration is simplified.
Drawings
FIG. 1 is a diagram of the connection of data lines that may be used for communication between two USB HOST interface devices according to the present invention;
FIG. 2 is a circuit diagram of a first USB data line and a first USB/serial port chip according to the present invention;
fig. 3 is a circuit diagram of a second USB data line and a second USB/serial port chip according to the present invention.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the utility model and are not intended to limit the utility model.
Referring to fig. 1, the present invention provides a data line for communication between two USB HOST interface devices, comprising: the USB interface comprises a first USB/serial port chip U1, a second USB/serial port chip U2, a first USB data line L1 and a second USB data line L2;
one end of the first USB data line L1 is connected to a first USB plug P1 of a first USB HOST device; the other end of the first USB data line L1 is connected with one end of the first USB/serial port chip U1; the other end of the first USB/serial port chip U1 is connected with one end of the second USB/serial port chip U2; the other end of the second USB/serial port chip U2 is connected with one end of the second USB data line L2; the other end of the second USB data line L2 is connected to a second USB plug P2 of a second USB HOST device.
As a specific implementation manner, referring to fig. 2 and 3, the first USB data line L1 includes a first power supply line VCC, a first USB signal negative electrode line DM1, a first USB signal positive electrode line DP1, and a first ground line GND 1;
the second USB data line L2 includes a second USB signal negative line DM2, a second USB signal positive line DP2, and a second ground GND 2;
the first ground wire GND1 and the second ground wire GND2 are connected together and are grounded together;
the first USB/serial port chip U1 is provided with a first power line pin, a first USB signal negative pole pin, a first USB signal positive pole pin, a first serial port sending pin and a first serial port receiving pin; in the figure, UART _ TX represents a serial port transmission pin; UART _ RX represents a serial port receiving pin; DM represents a USB signal negative pin; DP represents the positive pin of USB signal; therefore, for the first USB/serial port chip U1, the 8 th pin is a first power line pin; the 5 th pin is a USB signal negative electrode pin; the 4 th pin is a USB signal anode pin; the 26 th pin is a serial port sending pin; the 25 th pin is a serial port receiving pin;
the second USB/serial port chip U2 is provided with a second power line pin, a second USB signal cathode pin, a second USB signal anode pin, a second serial port sending pin and a second serial port receiving pin;
a first power line pin of the first USB/serial port chip U1 and a second power line pin of the second USB/serial port chip U2 are commonly connected to a first power supply line VCC of the first USB data line L1;
a first USB signal negative wire DM1 of the first USB data wire L1 is connected to a first USB signal negative pin of the first USB/serial port chip U1; a first USB signal positive electrode line DP1 of the first USB data line L1 is connected to a first USB signal positive electrode pin of the first USB/serial port chip U1;
a first serial port sending pin of the first USB/serial port chip U1 is connected to a second serial port receiving pin of the second USB/serial port chip U2; a first serial port receiving pin of the first USB/serial port chip U1 is connected to a second serial port sending pin of the second USB/serial port chip U2;
a second USB signal cathode pin of the second USB/serial port chip U2 is connected to a second USB signal cathode line DM2 of the second USB data line L2; a second USB signal positive terminal of the second USB/serial chip U2 is connected to a second USB signal positive terminal DP2 of the second USB data line L2.
In this application, the first USB/serial port chip U1 and the second USB/serial port chip U2 may adopt CP2102 chips.
In specific connection, a 5 th pin DM1 of the first USB/serial port chip U1 is connected to the DM1 of the first USB data line L1, a 4 th pin DP1 of the first USB/serial port chip U1 is connected to the DP1 of the first USB data line L1, and a 26 th pin UART _ TX of the first USB/serial port chip U1 is connected to a 26 th pin UART _ RX of the second USB/serial port chip U2; the 25 th pin UART _ RX of the first USB/serial port chip U1 is connected with the 25 th pin UART _ TX of the second USB/serial port chip U2;
the 5 th pin DM2 of the second USB/serial port chip U2 is connected with a second USB signal negative electrode line DM2 of a second USB data line L2; the 4 th pin DP2 of the second USB/serial chip U2 is connected to the second USB signal positive line DP2 of the second USB data line L2.
The data line for communication between two USB HOST interface devices provided by the utility model is a bidirectional communication data line, and can realize signal transmission from the first USB plug P1 to the second USB plug P2 and also realize signal transmission from the second USB plug P2 to the first USB plug P1.
Taking the first USB plug P1 as an example for signal transmission to the second USB plug P2, the principle is as follows:
the first USB plug P1 transmits a USB signal to the first USB/serial port chip U1 through the first USB data line L1, the first USB/serial port chip U1 converts the USB signal into a serial port signal, and then the serial port signal is sent to the second USB/serial port chip U2; the second USB/serial chip U2 converts the serial signal into a USB signal, and then transmits the USB signal to the second USB plug P2 via the second USB data line L2.
Thereby enabling the first USB plug P1 to transmit USB signals to the second USB plug P2.
The data line for communication between two USB HOST interface devices provided by the utility model has the following advantages:
(1) the first USB/serial port chip U1 and the second USB/serial port chip U2 are arranged between the two sections of USB data lines, so that mutual communication between terminals of which the two interfaces are USB HOST interfaces is realized, and convenience is brought to users;
(2) the first USB/serial port chip U1 and the second USB/serial port chip U2 are connected to the same VCC, and the complexity of system configuration is simplified.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and improvements can be made without departing from the principle of the present invention, and such modifications and improvements should also be considered within the scope of the present invention.
Claims (3)
1. A data cable for communication between two USB HOST interface devices, comprising: a first USB/serial chip (U1), a second USB/serial chip (U2), a first USB data line (L1) and a second USB data line (L2);
one end of the first USB data line (L1) is connected with a first USB plug (P1) of a first USB HOST device; the other end of the first USB data line (L1) is connected with one end of the first USB/serial port chip (U1); the other end of the first USB/serial port chip (U1) is connected with one end of the second USB/serial port chip (U2); the other end of the second USB/serial port chip (U2) is connected with one end of the second USB data line (L2); the other end of the second USB data line (L2) is connected to a second USB plug (P2) of a second USB HOST device.
2. The data line usable for communication between two USB HOST interface devices according to claim 1, wherein said first USB data line (L1) comprises a first power supply line (VCC), a first USB signal negative line (DM1), a first USB signal positive line (DP1), and a first ground line (GND 1);
the second USB data line (L2) comprises a second USB signal negative line (DM2), a second USB signal positive line (DP2) and a second ground line (GND 2);
the first USB/serial port chip (U1) is provided with a first power line pin, a first USB signal negative pole pin, a first USB signal positive pole pin, a first serial port sending pin and a first serial port receiving pin;
the second USB/serial port chip (U2) is provided with a second power line pin, a second USB signal negative electrode pin, a second USB signal positive electrode pin, a second serial port sending pin and a second serial port receiving pin;
a first power line pin of the first USB/serial chip (U1) and a second power line pin of the second USB/serial chip (U2) are commonly connected to a first power supply line (VCC) of the first USB data line (L1);
a first USB signal negative line (DM1) of the first USB data line (L1) is connected to a first USB signal negative pin of the first USB/serial chip (U1); a first USB signal positive electrode line (DP1) of the first USB data line (L1) is connected to a first USB signal positive electrode pin of the first USB/serial port chip (U1);
a first serial port sending pin of the first USB/serial port chip (U1) is connected to a second serial port receiving pin of the second USB/serial port chip (U2); a first serial port receiving pin of the first USB/serial port chip (U1) is connected to a second serial port sending pin of the second USB/serial port chip (U2);
a second USB signal negative pin of the second USB/serial port chip (U2) is connected to a second USB signal negative line (DM2) of the second USB data line (L2); and a second USB signal positive electrode pin of the second USB/serial port chip (U2) is connected to a second USB signal positive electrode line (DP2) of the second USB data line (L2).
3. The data line of claim 1, wherein the first USB/serial chip (U1) and the second USB/serial chip (U2) are both CP2102 chips.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120658831.3U CN216527155U (en) | 2021-03-31 | 2021-03-31 | Data line for communication between two USB HOST interface devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120658831.3U CN216527155U (en) | 2021-03-31 | 2021-03-31 | Data line for communication between two USB HOST interface devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216527155U true CN216527155U (en) | 2022-05-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120658831.3U Active CN216527155U (en) | 2021-03-31 | 2021-03-31 | Data line for communication between two USB HOST interface devices |
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- 2021-03-31 CN CN202120658831.3U patent/CN216527155U/en active Active
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