CN216133862U - Packaging structure - Google Patents
Packaging structure Download PDFInfo
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- CN216133862U CN216133862U CN202122013188.1U CN202122013188U CN216133862U CN 216133862 U CN216133862 U CN 216133862U CN 202122013188 U CN202122013188 U CN 202122013188U CN 216133862 U CN216133862 U CN 216133862U
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Abstract
The utility model relates to a packaging structure, which comprises a first substrate and a light source arranged on the first substrate, and is characterized in that: the first substrate surface is provided with a first conductive area and a second conductive area, the light source comprises a first light source and a second light source, and the positive pole and the negative pole of the first light source and the negative pole of the second light source are reversely arranged between the first conductive area and the second conductive area. The utility model has the advantages that: the first light source or the second light source is independently lightened according to needs to realize one color temperature or two color temperatures, or the first light source and the second light source are alternately lightened through high frequency, and the first light source and the second light source are simultaneously lightened by using the persistence of vision phenomenon to realize the other color temperature. On the basis of meeting the requirement of color temperature adjustment, the first light source and the second light source are arranged on the first substrate by adopting precisely-controllable die bonding equipment and then completed by the chip mounting equipment which can relatively realize large-size mounting, the bonding pad has small area and high lighting effect, and the process difficulty is low and the qualified rate of finished products is high while the production of large-size products is met.
Description
Technical Field
The utility model relates to a packaging structure and further relates to an LED packaging structure.
Background
The LED lamp strip is formed by assembling a plurality of LEDs serving as light emitting units on a strip-shaped FPC (flexible printed circuit) or PCB (printed circuit board) hard substrate at certain intervals. Each light-emitting unit is usually a color temperature adjustable double-chip combination, and the two chips are respectively attached to the substrate, so that the sizes of the bonding pads of the chips and the substrate need to be larger, and the light efficiency is affected. In addition, two times of mounting are needed, and the requirements on mounting process and equipment are high.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a packaging structure with high yield.
In order to solve the technical problems, the technical scheme of the utility model is as follows: a kind of encapsulated structure, including the first base plate and setting up the light source on the first base plate, its innovation point lies in: the surface of the first substrate is provided with a first conductive area and a second conductive area, the light source comprises a first light source and a second light source, the positive pole and the negative pole of the first light source are respectively and electrically connected with the first conductive area and the second conductive area, and the positive pole and the negative pole of the second light source are respectively and electrically connected with the second conductive area and the first conductive area.
Preferably, the first light source is a CSP light source, and the second light source is a blue light source.
Preferably, the first and second light sources are integrally encapsulated on the first substrate by an outer encapsulation layer.
Preferably, the first and second conductive regions of the first substrate are powered by a high-frequency duty ratio.
Preferably, the display panel further comprises a plurality of second substrates, and the first substrates are all arranged on the second substrates.
The utility model has the advantages that: the first and second light sources are fixed on the first substrate, after the positive and negative electrodes of the first and second light sources are connected to the first and second conductive regions, the circuit conduction directions are opposite, and the first and second conductive regions adopt a high-frequency duty ratio power supply mode. Therefore, the first light source or the second light source is independently lightened to realize one color temperature or two color temperatures according to requirements, or the first light source and the second light source are alternately lightened through high frequency, and the first light source and the second light source are simultaneously lightened by using the persistence of vision phenomenon to realize the other color temperature. On the basis of meeting the color temperature regulation, the first light source and the second light source are arranged on the first substrate by adopting the precisely-controlled die bonding equipment, and then are finished by the surface mounting equipment which can relatively realize large-size surface mounting, the area of the bonding pad is small, and the requirements of production of large-size products are met, and meanwhile, the process difficulty is low, the yield is high, the reliability is high, and the application circuit is simple.
Drawings
Fig. 1 is a top view of a first substrate, a first light source and a second light source according to a first embodiment of the utility model.
Fig. 2 is a cross-sectional view of a first substrate including an outer package layer, a first light source and a second light source according to an embodiment of the utility model.
Fig. 3 is a schematic view illustrating a first substrate mounted on a second substrate according to a first embodiment of the utility model.
Fig. 4 is a front view of a first substrate according to an embodiment of the utility model.
Fig. 5 is a back view of the first substrate according to the first embodiment of the utility model.
Fig. 6 is a schematic diagram of a large substrate and a medium substrate according to an embodiment of the utility model.
Detailed Description
Example one
As shown in fig. 1, the package structure of the present invention includes a first substrate 1 and a light source disposed on the first substrate 1, wherein a first conductive region 11 and a second conductive region 12 are disposed on a surface of the first substrate 1, the first conductive region 11 is disposed on both a front surface and a back surface of the first substrate 1, the first conductive region 11 on the front surface and the back surface is electrically connected through a via 13, the second conductive region 12 is disposed on both the front surface and the back surface of the first substrate 1, and the second conductive region 12 on the front surface and the back surface is also electrically connected through a via 14.
The light source comprises a first light source 2 and a second light source 3, wherein the positive electrode and the negative electrode of the first light source 2 are respectively and electrically connected with a first conductive area and a second conductive area, and the positive electrode and the negative electrode of the second light source 3 are respectively and electrically connected with the second conductive area and a first conductive area. The first and second light sources are both fixed between the first and second conductive regions, but the electrodes of the first and second light sources are oppositely arranged.
In this embodiment, as shown in fig. 2, the first light source 2 is a CSP light source, the second light source 3 is a blue light source, an outer packaging layer 4 is further disposed outside the first light source 2 and the second light source 3, the outer packaging layer 4 integrally packages the first light source 2 and the second light source 3 on the first substrate 1, and the outer packaging layer 4 may be a fluorescent powder layer or a transparent adhesive layer as required.
The first and second conductive areas of the first substrate 1 are powered by high frequency duty ratio.
As shown in fig. 3, the display device further includes a plurality of second substrates 5, the first substrates 1 are disposed on the second substrates 5, and the first substrate 1 is disposed with a first light source and a second light source.
As shown in fig. 4 and 5, in order to reduce the difficulty of the process for manufacturing the first substrate 1, the first substrate 1 is rectangular, and four corners of the first substrate are respectively provided with sector vias having a quarter-circle cross section, two upper sector vias 13a and 13b connect the front and back first conductive regions 11, and two lower sector vias 14a and 14b connect the front and back second conductive regions 12.
In this way, in the manufacturing process, as shown in fig. 6, a whole large substrate 6 can be selected to be pre-divided into a plurality of first substrates 1, circular via holes 7 are arranged at the intersections of four pre-divided adjacent first substrates, when the large substrate 6 is cut into the first substrates 1, the circular via holes 7 are divided to form fan-shaped via holes at the right angles of the first substrates 1, and the manufacturing cost and the process difficulty are lower.
In this embodiment, the front first conductive region 11 has two front first pad regions 11a spaced apart from each other for bonding to the first and second dies, and the remaining regions are coated with a front first highly reflective ink layer 11 b. The front second conductive area 12 also has two front second pad areas 12a spaced apart from each other for bonding to the first and second dies, and the remaining area is coated with a front second highly reflective ink layer 12 b. The first conductive region 11 on the back side has a first pad region 11c on the back side for bonding with the second substrate, the first pad region 11c on the back side is rectangular, and the first conductive region 11 on the periphery of the first pad region 11c on the back side is coated with a first high anti-ink layer 11d on the back side; similarly, the second conductive region 12 on the back surface has a second pad region 12c on the back surface for bonding to the second substrate, the second pad region 12c on the back surface has an oval shape, and the second conductive region 12 on the periphery of the second pad region 12c on the back surface is coated with the second high anti-ink layer 12d on the back surface.
Example two
The embodiment is a manufacturing process of a packaging structure, and the process steps are as follows:
s1: firstly, a large substrate 6 made of FR4, BT, FPC or ceramic is selected, in this embodiment, a material FR4 is adopted, the large substrate 6 is divided into a plurality of rectangular partitions, as shown in fig. 6, each partition is provided with a first conductive region 11 and a second conductive region 12, in each partition, the first conductive region 11 and the second conductive region 12 are both present on the front surface and the back surface of the partition, the first conductive regions on the front surface and the back surface are electrically connected through via holes, and the second conductive regions on the front surface and the back surface are also electrically connected through via holes; and a circular through hole 7 is preset at the boundary of the adjacent pre-divided rectangular subareas.
S2: manufacturing a plurality of first light sources 2 and second light sources 3;
s3: a first light source 2 and a second light source 3 are respectively and fixedly crystallized on the front surface of each subarea, the positive electrode and the negative electrode of the first light source 2 are respectively and electrically connected with a first conducting area and a second conducting area, and the positive electrode and the negative electrode of the second light source 3 are respectively and electrically connected with the second conducting area and a first conducting area;
then, a phosphor layer or a transparent layer is integrally sprayed on the large substrate 6 as a package layer.
S4: cutting the large substrate 6 according to the subareas to obtain a plurality of first substrates 1 with the first and second light sources in a crystal bonding mode; the circular vias 7 on the large substrate 6 are divided into fan-shaped vias at the four corners of each first substrate 1, and the encapsulation layer is divided into the outer encapsulation layer 4 covering the surface of the first substrate 1.
S5: a plurality of first substrates 1 with first and second light sources are mounted on a second substrate 5 in a patch mode. The packaging structure manufactured by the method has the defect rate reduced from about three thousandths to about seven millionths.
Claims (5)
1. A kind of encapsulated structure, including the first base plate and setting up the light source on the first base plate, characterized by that: the surface of the first substrate is provided with a first conductive area and a second conductive area, the light source comprises a first light source and a second light source, the positive pole and the negative pole of the first light source are respectively and electrically connected with the first conductive area and the second conductive area, and the positive pole and the negative pole of the second light source are respectively and electrically connected with the second conductive area and the first conductive area.
2. The package structure of claim 1, wherein: the first light source is a CSP light source, and the second light source is a blue light source.
3. The package structure according to claim 1 or 2, wherein: the first and second light sources are integrally encapsulated on the first substrate by an outer encapsulation layer.
4. The package structure of claim 3, wherein: the first and second conductive regions of the first substrate are powered by high-frequency duty ratio.
5. The package structure of claim 1, wherein: still include the second base plate, first base plate has a plurality of, all sets up on the second base plate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202122013188.1U CN216133862U (en) | 2021-08-25 | 2021-08-25 | Packaging structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202122013188.1U CN216133862U (en) | 2021-08-25 | 2021-08-25 | Packaging structure |
Publications (1)
Publication Number | Publication Date |
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CN216133862U true CN216133862U (en) | 2022-03-25 |
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Family Applications (1)
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CN202122013188.1U Active CN216133862U (en) | 2021-08-25 | 2021-08-25 | Packaging structure |
Country Status (1)
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CN (1) | CN216133862U (en) |
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2021
- 2021-08-25 CN CN202122013188.1U patent/CN216133862U/en active Active
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