CN216120435U - Lithium ion battery management system - Google Patents
Lithium ion battery management system Download PDFInfo
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- CN216120435U CN216120435U CN202121954615.XU CN202121954615U CN216120435U CN 216120435 U CN216120435 U CN 216120435U CN 202121954615 U CN202121954615 U CN 202121954615U CN 216120435 U CN216120435 U CN 216120435U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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Abstract
The utility model relates to a lithium ion battery management system, and belongs to the technical field of lithium batteries. The battery management system comprises a main control chip CPU and a battery management chip U2, wherein the main control chip CPU is connected with the battery management chip U2 in a control mode, the battery management chip U2 is connected with a current acquisition circuit and a voltage acquisition circuit respectively, the main control chip CPU is connected with a current and voltage display circuit, the model of the main control chip CPU is STM32F103, the model of the battery management chip U2 is BQ76930, an SDA port of the battery management chip U2 is connected with a PB11 port of the main control chip CPU, and an SDA port of the battery management chip U2 is connected with a PB10 port of the main control chip CPU. The utility model can accurately collect the current and voltage information of the battery and ensure the use safety of the battery.
Description
Technical Field
The utility model relates to a lithium ion battery management system, and belongs to the technical field of lithium batteries.
Background
The lithium ion battery management system is a control system which fully utilizes battery energy on the basis of ensuring the use safety of the battery, and the battery is a complex product, so the designed lithium ion battery management system has many functions for managing the battery. How to accurately acquire the information of the power battery is always the key of the design of the lithium ion battery management system. Only after accurate battery data are collected, scientific management on the battery can be achieved, the service life and the performance of the battery are prolonged, and meanwhile, the battery is safer when in use.
Disclosure of Invention
The utility model aims to overcome the problems in the prior art and provide a lithium ion battery management system which can accurately acquire the current and voltage information of a battery and ensure the use safety of the battery.
The utility model relates to a lithium ion battery management system, which comprises a main control chip CPU and is characterized in that: still include battery management chip U2, main control chip CPU links to each other with battery management chip U2 control, battery management chip U2 adopts the circuit with the electric current respectively and links to each other with voltage acquisition circuit, main control chip CPU links to each other with current-voltage display circuit, main control chip CPU's model is STM32F103, battery management chip U2's model is BQ76930, battery management chip U2's SDA port links to each other with main control chip CPU's PB11 port, battery management chip U2's SDA port links to each other with main control chip CPU's PB10 port.
Further, the current acquisition circuit comprises an MOS transistor Q1, an MOS transistor Q2 and an MOS transistor Q3, gates of the MOS transistors Q1, Q2 and Q3 are connected with a DSG port of a battery management chip U2 through a resistor R1, sources of the MOS transistors Q1, Q2 and Q3 are connected in parallel and then grounded through a resistor R12, drains of the MOS transistors Q1, Q2 and Q3 are connected with a voltage VCC, one end of the resistor R12 is connected with an SRP port of the battery management chip U2, the other end of the resistor R12 is connected with an SRN port of the battery management chip U2, the SRP port of the battery management chip U2 is grounded through a resistor R2 and a capacitor C7, and the SRN port of the battery management chip U2 is grounded through a resistor R3 and a capacitor C8.
Further, the voltage acquisition circuit comprises an MOS tube Q4 and an MOS tube Q5, a VC0 port of the battery management chip U2 is connected with a drain electrode of the MOS tube Q4 through a resistor R7, a VC0 port of the battery management chip U2 is connected with a gate electrode of the MOS tube Q4 through a resistor R8, and a source electrode of the MOS tube Q4 is connected with a pin 2 of the lithium battery interface chip J1 through a resistor R9; the VC1 port of the battery management chip U2 is connected with the drain electrode of an MOS tube Q5 through a resistor R6, the VC1 port of the battery management chip U2 is connected with the grid electrode of the MOS tube Q5 through a resistor R5, and the source electrode of the MOS tube Q5 is connected with the 3 pin of the lithium battery interface chip J1 through a resistor R10.
Further, the current and voltage display circuit comprises a 485 communication chip U4 and a liquid crystal display interface chip P1, a PA9 port of the main control chip CPU is connected with a DI port of the 485 communication chip U4 through a resistor R21, a PA10 port of the main control chip CPU is connected with an RO port of the 485 communication chip U4 through a resistor R20, an A port of the 485 communication chip is connected with a 5 pin of the liquid crystal display interface chip P1, a B port of the 485 communication chip is connected with a 4 pin of the liquid crystal display interface chip P1, a1 pin and a 2 pin of the liquid crystal display interface chip P1 are connected with 5V voltage and are grounded through a capacitor C26 and a capacitor C28 which are connected in parallel, and a 7 pin and an 8 pin of the liquid crystal display interface chip P1 are grounded.
The utility model has the beneficial effects that: the current acquisition circuit and the voltage acquisition circuit transmit the acquired current and voltage signals to the battery management chip U2, the TS port of the battery management chip U2 can be connected with the temperature acquisition circuit, the battery management chip U2 transmits the received current and voltage signals to the main control chip CPU, the main control chip CPU transmits the received current and voltage signals to the liquid crystal display screen for display,
thereby the electric current and the voltage situation of more accurate detection lithium cell let the voltage size that the user can survey the electric current in real time, cross the low condition that leads to power not enough or voltage height to lead to the battery to transship and produce the condition of potential safety hazard in time to remind appearing the voltage.
Drawings
FIG. 1 is a schematic diagram of a voltage acquisition circuit in a lithium ion battery management system according to the present invention;
FIG. 2 is a schematic diagram of a current collection circuit in the lithium ion battery management system of the present invention;
FIG. 3 is a schematic diagram of a voltage/current display circuit in the lithium ion battery management system according to the present invention;
fig. 4 is a wiring diagram of the main control chip CPU in the lithium ion battery management system of the present invention.
Detailed Description
The utility model is further elucidated with reference to the drawings and the embodiments.
As shown in fig. 1 to 4, a lithium ion battery management system of the present invention includes a main control chip CPU, and is characterized in that: the battery management system is characterized by further comprising a battery management chip U2, the main control chip CPU is connected with the battery management chip U2 in a control mode, the battery management chip U2 is connected with the current acquisition circuit and the voltage acquisition circuit respectively, the main control chip CPU is connected with the current and voltage display circuit, the model of the main control chip CPU is STM32F103, the model of the battery management chip U2 is BQ76930, the SDA port of the battery management chip U2 is connected with the PB11 port of the main control chip CPU, and the SDA port of the battery management chip U2 is connected with the PB10 port of the main control chip CPU. The current acquisition circuit comprises an MOS tube Q1, an MOS tube Q2 and an MOS tube Q3, the grids of the MOS tubes Q1, Q2 and Q3 are connected with a DSG port of a battery management chip U2 through a resistor R1, the sources of the MOS tubes Q1, Q2 and Q3 are grounded through a resistor R12 after being connected in parallel, the drains of the MOS tubes Q1, Q2 and Q3 are connected with a voltage VCC, one end of the resistor R12 is connected with an SRP port of the battery management chip U2, the other end of the resistor R12 is connected with an SRN port of the battery management chip U2, the SRP port of the battery management chip U2 is grounded through a resistor R2 and a capacitor C7, and the SRN port of the battery management chip U2 is grounded through a resistor R3 and a capacitor C8.
The voltage acquisition circuit comprises an MOS tube Q4 and an MOS tube Q5, a VC0 port of a battery management chip U2 is connected with a drain electrode of the MOS tube Q4 through a resistor R7, a VC0 port of a battery management chip U2 is connected with a grid electrode of an MOS tube Q4 through a resistor R8, and a source electrode of the MOS tube Q4 is connected with a pin 2 of a lithium battery interface chip J1 through a resistor R9; the VC1 port of the battery management chip U2 is connected with the drain electrode of the MOS tube Q5 through a resistor R6, the VC1 port of the battery management chip U2 is connected with the grid electrode of the MOS tube Q5 through a resistor R5, and the source electrode of the MOS tube Q5 is connected with the pin 3 of the lithium battery interface chip J1 through a resistor R10. The current and voltage display circuit comprises a 485 communication chip U4 and a liquid crystal display interface chip P1, a PA9 port of a main control chip CPU is connected with a DI port of the 485 communication chip U4 through a resistor R21, a PA10 port of the main control chip CPU is connected with an RO port of the 485 communication chip U4 through a resistor R20, an A port of the 485 communication chip is connected with a 5 pin of the liquid crystal display interface chip P1, a B port of the 485 communication chip is connected with a 4 pin of the liquid crystal display interface chip P1, a1 pin and a 2 pin of the liquid crystal display interface chip P1 are connected with 5V voltage and are grounded through a capacitor C26 and a capacitor C28 which are connected in parallel, and a 7 pin and an 8 pin of the liquid crystal display interface chip P1 are grounded. The voltage collecting circuit further includes a diode D9 and a diode D10 for preventing a reverse flow of current and for stabilizing voltage.
Current acquisition circuit and voltage acquisition circuit will gather the electric current, voltage signal gives battery management chip U2, battery management chip U2's TS port can connect temperature acquisition circuit, battery management chip U2 gives main control chip CPU with received electric current and voltage signal transfer, main control chip CPU will received electric current, voltage signal conveys the demonstration to liquid crystal display, thereby the user can observe the voltage size of electric current in real time, prevent that the voltage from crossing low power that leads to or the voltage is too high leads to the battery to transship and produce the potential safety hazard.
The VC0 port to the VC10 port of the battery management chip U2 can measure the electric quantity of 11 lithium batteries, and can be adjusted according to the requirements of users, so that the management and control of the lithium battery module are realized, the service life of the battery is prolonged, and the service performance of the battery is improved.
Although the preferred embodiments of the present invention have been described in detail, the present invention is not limited to the details of the foregoing embodiments, and various equivalent changes (such as number, shape, position, etc.) may be made to the technical solution of the present invention within the technical spirit of the present invention, and these equivalent changes are all within the protection scope of the present invention.
Claims (4)
1. The utility model provides a lithium ion battery management system, includes main control chip CPU which characterized in that: still include battery management chip U2, main control chip CPU links to each other with battery management chip U2 control, battery management chip U2 adopts the circuit with the electric current respectively and links to each other with voltage acquisition circuit, main control chip CPU links to each other with current-voltage display circuit, main control chip CPU's model is STM32F103, battery management chip U2's model is BQ76930, battery management chip U2's SDA port links to each other with main control chip CPU's PB11 port, battery management chip U2's SDA port links to each other with main control chip CPU's PB10 port.
2. The lithium ion battery management system of claim 1, wherein: the current acquisition circuit comprises an MOS tube Q1, an MOS tube Q2 and an MOS tube Q3, wherein grids of the MOS tube Q1, the MOS tube Q2 and the MOS tube Q3 are connected with a DSG port of a battery management chip U2 through a resistor R1, sources of the MOS tube Q1, the MOS tube Q2 and the MOS tube Q3 are connected in parallel and then grounded through a resistor R12, drains of the MOS tube Q1, the MOS tube Q2 and the MOS tube Q3 are connected with a voltage VCC, one end of the resistor R12 is connected with an SRP port of the battery management chip U2, the other end of the resistor R12 is connected with an SRN port of the battery management chip U2, the SRP port of the battery management chip U2 is grounded through a resistor R2 and a capacitor C7, and the SRN port of the battery management chip U2 is grounded through a resistor R3 and a capacitor C8.
3. The lithium ion battery management system of claim 1, wherein: the voltage acquisition circuit comprises an MOS tube Q4 and an MOS tube Q5, a VC0 port of the battery management chip U2 is connected with a drain electrode of the MOS tube Q4 through a resistor R7, a VC0 port of the battery management chip U2 is connected with a grid electrode of the MOS tube Q4 through a resistor R8, and a source electrode of the MOS tube Q4 is connected with a pin 2 of the lithium battery interface chip J1 through a resistor R9; the VC1 port of the battery management chip U2 is connected with the drain electrode of an MOS tube Q5 through a resistor R6, the VC1 port of the battery management chip U2 is connected with the grid electrode of the MOS tube Q5 through a resistor R5, and the source electrode of the MOS tube Q5 is connected with the 3 pin of the lithium battery interface chip J1 through a resistor R10.
4. The lithium ion battery management system of claim 1, wherein: the current and voltage display circuit comprises a 485 communication chip U4 and a liquid crystal display interface chip P1, a PA9 port of a main control chip CPU is connected with a DI port of the 485 communication chip U4 through a resistor R21, a PA10 port of the main control chip CPU is connected with an RO port of the 485 communication chip U4 through a resistor R20, an A port of the 485 communication chip is connected with a 5 pin of the liquid crystal display interface chip P1, a B port of the 485 communication chip is connected with a 4 pin of the liquid crystal display interface chip P1, a1 pin and a 2 pin of the liquid crystal display interface chip P1 are connected with 5V voltage and are grounded through a capacitor C26 and a capacitor C28 which are connected in parallel, and a 7 pin and an 8 pin of the liquid crystal display interface chip P1 are grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121954615.XU CN216120435U (en) | 2021-08-19 | 2021-08-19 | Lithium ion battery management system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121954615.XU CN216120435U (en) | 2021-08-19 | 2021-08-19 | Lithium ion battery management system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216120435U true CN216120435U (en) | 2022-03-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202121954615.XU Active CN216120435U (en) | 2021-08-19 | 2021-08-19 | Lithium ion battery management system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216120435U (en) |
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2021
- 2021-08-19 CN CN202121954615.XU patent/CN216120435U/en active Active
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