CN216086605U - Simple zero-power-consumption self-locking switch circuit - Google Patents
Simple zero-power-consumption self-locking switch circuit Download PDFInfo
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- CN216086605U CN216086605U CN202122062421.5U CN202122062421U CN216086605U CN 216086605 U CN216086605 U CN 216086605U CN 202122062421 U CN202122062421 U CN 202122062421U CN 216086605 U CN216086605 U CN 216086605U
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Abstract
The utility model discloses a simple zero-power self-locking switch circuit which comprises a pull-up resistor, a current-limiting resistor, a pull-down resistor, an MOS (metal oxide semiconductor) tube, a triode, a first Schottky diode, a second Schottky diode and a battery wiring terminal. The utility model has the beneficial effects that: the software can be directly used for controlling the power-off of the product, the product is not in a dormant state, and the mechanical power-off is used, so that the requirements of simplicity and zero power consumption are met, and the endurance and the service life of the product are ensured; the circuit can realize zero power consumption of the circuit, is simple, and has no voltage when no equipment is accessed and the key is pressed, thereby achieving the purpose of power saving.
Description
Technical Field
The utility model relates to a self-locking switch circuit, in particular to a simple zero-power self-locking switch circuit, and belongs to the technical field of intelligent electronic control.
Background
With the popularization of various portable products, more and more products use lithium batteries for power supply, and the problem of low power consumption cannot be avoided. But in fact, the low power consumption of most of the products is in a standby state, the problem of power consumption is still large, the voltage of the lithium battery is exhausted finally, and meanwhile, the service life of the battery and the products is influenced by the problem.
Most of the products in the market at present adopt a lithium battery protection IC to protect the low-power (less than 2.4V protection) state of the battery, and certain cost needs to be increased. The traditional modes comprise a mechanical mode (key) for power off and a soft power off mode, the former mode is not simple enough and has higher production cost, the latter mode cannot be completely powered off and only can realize a low-power mode, and a product is still in a charged dormant state.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the problems and provide a simple zero-power self-locking switch circuit.
The utility model realizes the purpose through the following technical scheme: a simple zero-power self-locking switch circuit comprises
The MOS tube is connected with the battery wiring terminal in series and is connected with a pull-up resistor in parallel, and the pull-up resistor provides a stable pull-up level for a G electrode of the MOS tube;
the triode is connected with the MOS tube in series, the base electrode of the triode is connected with a current limiting resistor in series, the base electrode of the triode is also connected with a pull-down resistor which is connected with the current limiting resistor in parallel, and the pull-down resistor provides a stable working level for the triode;
the Schottky diode comprises a first Schottky diode and a second Schottky diode, wherein the first Schottky diode is connected with the pull-up resistor in series, the second Schottky diode is connected with the current-limiting resistor in series, the second pin of the first Schottky diode and the first pin of the second Schottky diode are connected to a pin of the single chip microcomputer, the third pin of the first Schottky diode is connected to a key, and the second pin of the second Schottky diode is connected to a USB.
As a still further scheme of the utility model: the self-locking switch circuit has no level of VDD1 in the power-off state, the rear power supply unit is in the zero power consumption state, and one power-on mode of the circuit is as follows:
when the USB is inserted, the base electrode of the triode is powered through the second pin of the Schottky diode II, the triode is conducted, the G pole level of the MOS tube is pulled down to be conducted, VDD1 obtains voltage, the circuit is powered normally to start, the POW _ CTL outputs high level through the single chip microcomputer, and the conducting state of the triode is kept.
As a still further scheme of the utility model: the self-locking switch circuit has no level of VDD1 in the power-off state, the rear power supply unit is in the zero power consumption state, and the other power-on mode of the circuit is as follows:
when the KEY is pressed down, the G pole level of the MOS tube is pulled down and conducted, VDD1 obtains voltage, the circuit is normally powered up and started, the POW _ CTL outputs high level from the single chip microcomputer, and the conduction state of the triode is kept.
As a still further scheme of the utility model: the self-locking switch circuit realizes a shutdown mode in a startup state as follows:
and (3) automatically sleeping and shutting down the machine, after the machine has no operation for one minute, the POW _ CTL outputs low level by the single chip microcomputer, the triode is cut off, the G pole level of the MOS tube is pulled high and is shut down, the VDD1 loses voltage, the circuit is normally shut down, and zero power consumption is achieved.
As a still further scheme of the utility model: the other mode for realizing shutdown of the self-locking switch circuit in the startup state is as follows:
the KEY is actively turned OFF, when the machine is in a normal function, the KEY is pressed, and the KEY _ ON/OFF is pulled to the GND network through the KEY; the KEY _ POW network is forcibly pulled down, and the single chip microcomputer detects the long-press action of the KEY and starts a shutdown instruction; the POW _ CTL is used for outputting low level by the single chip microcomputer, the triode is cut off, the G pole level of the MOS tube is pulled high and is closed, the VDD1 loses voltage, the circuit is normally closed, and zero power consumption is achieved.
The utility model has the beneficial effects that:
1. the software can be directly used for controlling the power-off of the product, the product is not in a dormant state, and the mechanical power-off is used, so that the requirements of simplicity and zero power consumption are met, and the endurance and the service life of the product are ensured;
2. the circuit can realize zero power consumption of the circuit, is simple, and has no voltage when no equipment is accessed and the key is pressed, thereby achieving the purpose of power saving.
Drawings
Fig. 1 is a schematic diagram of the circuit of the present invention.
In the figure: r1, a pull-up resistor, R2, a current-limiting resistor, R3, a pull-down resistor, U1, an MOS (metal oxide semiconductor) tube, Q1, a triode, D1, a first Schottky diode, D2, a second Schottky diode, J1 and a battery connecting terminal.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
Referring to fig. 1, a simple zero-power self-locking switch circuit includes
The MOS tube U1 is connected with the battery terminal J1 in series and is connected with a pull-up resistor R1 in parallel, and the pull-up resistor R1 provides a stable pull-up level for the G electrode of the MOS tube U1;
a triode Q1 connected in series with the MOS transistor U1, the base of the triode Q1 is connected in series with a current limiting resistor R2, the base of the triode Q1 is also connected in series with a pull-down resistor R3 connected in parallel with the current limiting resistor R2, and the pull-down resistor R3 provides a stable working level for the triode Q1;
the Schottky diode comprises a first Schottky diode D1 connected with a pull-up resistor R1 in series and a second Schottky diode D2 connected with a current-limiting resistor R2 in series, wherein the second pin of the first Schottky diode D1 and the first pin of the second Schottky diode D2 are connected to a pin of the single chip microcomputer, the third pin of the first Schottky diode D1 is connected to a key, and the second pin of the second Schottky diode D2 is connected to a USB.
In the embodiment of the present invention, when the self-locking switch circuit is in the power-off state, VDD1 has no level, and the rear power supply unit is in the zero power consumption state, one power-on mode of the circuit is as follows:
when the USB is plugged in, the base electrode of the triode Q1 is powered through the second pin of the Schottky diode two D2, the triode Q1 is conducted, the G electrode level of the MOS tube U1 is pulled down and conducted, the VDD1 obtains voltage, the circuit is powered normally, the POW _ CTL outputs high level through the single chip microcomputer, and the conducting state of the triode Q1 is kept.
In the embodiment of the present invention, when the self-locking switch circuit is in the power-off state, VDD1 has no level, and the rear power supply unit is in the zero power consumption state, another power-on mode of the circuit is as follows:
when the KEY is pressed down, the G electrode level of the MOS tube U1 is pulled down to be conducted, the VDD1 obtains voltage, the circuit is normally powered ON, the POW _ CTL outputs high level from the single chip microcomputer, and the conduction state of the triode Q1 is maintained.
Example two
Referring to fig. 1, a simple zero-power self-locking switch circuit includes
The MOS tube U1 is connected with the battery terminal J1 in series and is connected with a pull-up resistor R1 in parallel, and the pull-up resistor R1 provides a stable pull-up level for the G electrode of the MOS tube U1;
a triode Q1 connected in series with the MOS transistor U1, the base of the triode Q1 is connected in series with a current limiting resistor R2, the base of the triode Q1 is also connected in series with a pull-down resistor R3 connected in parallel with the current limiting resistor R2, and the pull-down resistor R3 provides a stable working level for the triode Q1;
the Schottky diode comprises a first Schottky diode D1 connected with a pull-up resistor R1 in series and a second Schottky diode D2 connected with a current-limiting resistor R2 in series, wherein the second pin of the first Schottky diode D1 and the first pin of the second Schottky diode D2 are connected to a pin of the single chip microcomputer, the third pin of the first Schottky diode D1 is connected to a key, and the second pin of the second Schottky diode D2 is connected to a USB.
In the embodiment of the present invention, in the power-on state of the self-locking switch circuit, one way to achieve power-off is as follows:
and (3) automatically sleeping and shutting down the machine, after the machine has no operation for one minute, the POW _ CTL outputs low level by the single chip microcomputer, the triode Q1 is cut off, the G pole level of the MOS tube U1 is pulled high and is shut off, the VDD1 loses voltage, the circuit is normally shut off, and zero power consumption is achieved.
In the embodiment of the present invention, another way for implementing shutdown of the self-locking switch circuit in a power-on state is as follows:
the KEY is actively turned OFF, when the machine is in a normal function, the KEY is pressed, and the KEY _ ON/OFF is pulled to the GND network through the KEY; the KEY _ POW network is forcibly pulled down, and the single chip microcomputer detects the long-press action of the KEY and starts a shutdown instruction; the POW _ CTL is output with low level by the singlechip, the triode Q1 is cut off, the G pole level of the MOS tube U1 is pulled high and is closed, the VDD1 loses voltage, the circuit is normally closed, and zero power consumption is achieved.
The working principle is as follows: the on and off of the MOS are controlled by controlling the output high and low levels of the diode and the triode through software, so that whether the whole circuit is in a complete power-off state or not is achieved, and zero power consumption of the circuit is achieved.
It will be evident to those skilled in the art that the utility model is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the utility model being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (5)
1. The utility model provides a simple and easy zero-power consumption's auto-lock switch circuit which characterized in that: comprises that
The MOS tube (U1) is connected with the battery connecting terminal (J1) in series, and is connected with a pull-up resistor (R1) in parallel, and the pull-up resistor (R1) provides a stable pull-up level for the G pole of the MOS tube (U1);
the transistor (Q1) is connected with the MOS transistor (U1) in series, the base of the transistor (Q1) is connected with a current limiting resistor (R2) in series, the base of the transistor (Q1) is also connected with a pull-down resistor (R3) which is connected with the current limiting resistor (R2) in parallel, and the pull-down resistor (R3) provides a stable working level for the transistor (Q1);
the Schottky diode comprises a first Schottky diode (D1) connected with a pull-up resistor (R1) in series and a second Schottky diode (D2) connected with a current-limiting resistor (R2) in series, wherein the second pin of the first Schottky diode (D1) and the first pin of the second Schottky diode (D2) are connected to a pin of the single chip microcomputer, the third pin of the first Schottky diode (D1) is connected to a key, and the second pin of the second Schottky diode (D2) is connected to a USB.
2. The simple zero-power self-locking switch circuit according to claim 1, characterized in that: the self-locking switch circuit has no level of VDD1 in the power-off state, the rear power supply unit is in the zero power consumption state, and one power-on mode of the circuit is as follows:
when the USB is plugged in, the base electrode of the triode (Q1) is powered through the second pin of the Schottky diode II (D2), the triode (Q1) is conducted, the G electrode level of the MOS tube (U1) is pulled down and conducted, VDD1 obtains voltage, the circuit is powered normally and started, the POW _ CTL outputs high level through the single chip microcomputer, and the conducting state of the triode (Q1) is kept.
3. The simple zero-power self-locking switch circuit according to claim 1, characterized in that: the self-locking switch circuit has no level of VDD1 in the power-off state, the rear power supply unit is in the zero power consumption state, and the other power-on mode of the circuit is as follows:
when the KEY is pressed down, the G electrode level of an MOS tube (U1) is pulled down to be conducted, VDD1 obtains voltage, the circuit is powered normally to start the KEY, the POW _ CTL outputs high level from the single chip microcomputer, and the conduction state of a triode (Q1) is kept.
4. The simple zero-power self-locking switch circuit according to claim 1, characterized in that: the self-locking switch circuit realizes a shutdown mode in a startup state as follows:
and (3) automatically sleeping and shutting down the machine, after the machine has no operation for one minute, the POW _ CTL outputs low level by the singlechip, the triode (Q1) is cut off, the G pole level of the MOS (U1) is pulled high and shut down, the VDD1 loses voltage, the circuit is normally shut down, and zero power consumption is achieved.
5. The simple zero-power self-locking switch circuit according to claim 1, characterized in that: the other mode for realizing shutdown of the self-locking switch circuit in the startup state is as follows:
the KEY is actively turned OFF, when the machine is in a normal function, the KEY is pressed, and the KEY _ ON/OFF is pulled to the GND network through the KEY; the KEY _ POW network is forcibly pulled down, and the single chip microcomputer detects the long-press action of the KEY and starts a shutdown instruction; the POW _ CTL is output with low level by the singlechip, the triode (Q1) is cut off, the G pole level of the MOS tube (U1) is pulled high and is closed, the VDD1 loses voltage, the circuit is normally closed, and zero power consumption is achieved.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122062421.5U CN216086605U (en) | 2021-08-30 | 2021-08-30 | Simple zero-power-consumption self-locking switch circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122062421.5U CN216086605U (en) | 2021-08-30 | 2021-08-30 | Simple zero-power-consumption self-locking switch circuit |
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| Publication Number | Publication Date |
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| CN216086605U true CN216086605U (en) | 2022-03-18 |
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|---|---|---|---|
| CN202122062421.5U Active CN216086605U (en) | 2021-08-30 | 2021-08-30 | Simple zero-power-consumption self-locking switch circuit |
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| CN (1) | CN216086605U (en) |
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- 2021-08-30 CN CN202122062421.5U patent/CN216086605U/en active Active
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