CN215731692U - GaN device packaging structure and electronic device - Google Patents

GaN device packaging structure and electronic device Download PDF

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Publication number
CN215731692U
CN215731692U CN202122284511.9U CN202122284511U CN215731692U CN 215731692 U CN215731692 U CN 215731692U CN 202122284511 U CN202122284511 U CN 202122284511U CN 215731692 U CN215731692 U CN 215731692U
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chip
heat dissipation
gan device
pad
gallium nitride
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谢文华
任炜强
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Shenzhen Zhenmaojia Semiconductor Co ltd
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Shenzhen Zhenmaojia Semiconductor Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/4917—Crossed wires

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Abstract

The application relates to a GaN device packaging structure and an electronic device, wherein the GaN device packaging structure comprises a lead frame, a gallium nitride HEMT chip, an MOSFET chip and a plastic package body; the lead frame comprises a heat dissipation slide, a first grid pin, a second grid pin and a drain pin; the gallium nitride HEMT chip and the MOSFET chip are arranged on the heat dissipation carrier and are controlled through the first grid pin and the second grid pin respectively; and the drain electrode of the MOSFET chip is connected with the inside of the source electrode of the gallium nitride HEMT chip, the source electrode of the MOSFET chip is used as the source electrode input of the GaN device, and the drain electrode of the gallium nitride HEMT chip is used as the drain electrode output of the GaN device. The method has the advantages that the external circuit can independently control the grid electrode of the gallium nitride HEMT chip, and the effect that the limitation of the highest working frequency of the MOSFET chip to a GaN device is eliminated.

Description

GaN device packaging structure and electronic device
Technical Field
The present disclosure relates to power semiconductor packaging technologies, and particularly to a GaN device package structure and an electronic device.
Background
The base material of the working layer of a gallium nitride HEMT (high Electron mobility transistor) chip is gallium nitride (GaN), and the base material of the working layer of a MOSFET (metal-oxide semiconductor field Effect transistor) chip is silicon (Si). Due to the material characteristics that a PN junction cannot be arranged in the gallium nitride HEMT chip, the conduction between the source electrode and the drain electrode is conducted through the middle electronic layer, and the gallium nitride HEMT chip can be turned off only by applying enough negative voltage on the grid electrode, so that the 0V turn-off and 5V turn-on of a GAN device need to be solved by stringing a low-voltage MOSFET in practical application.
In view of the above-mentioned related technologies, the inventor believes that the switching of the device is completely controlled by the MOSFET chip, the switching speed is limited by the maximum operating frequency of the MOSFET chip, and the requirement for the operating frequency of the MOSFET chip is relatively high or even does not meet the requirements of some high-frequency applications.
SUMMERY OF THE UTILITY MODEL
The present application is directed to a GaN device package structure for high frequency applications.
The application provides a GaN device packaging structure, adopts following technical scheme:
a GaN device package structure, comprising:
the lead frame comprises a heat dissipation slide glass, a first grid electrode pin, a second grid electrode pin and a drain electrode pin;
the gallium nitride HEMT chip is arranged on the heat dissipation chip and comprises a first source electrode pad, a first grid electrode pad and a drain electrode pad, wherein the first grid electrode pad is electrically connected with the first grid electrode pin, the drain electrode pad is electrically connected with the drain electrode pin, and the drain electrode pad is used as the drain electrode of the GaN device packaging structure for connection;
the MOSFET chip is arranged on the heat dissipation chip and comprises a drain layer, a second source electrode pad and a second grid electrode pad, the drain layer is electrically connected with the first source electrode pad to serve as an electrical interconnection of the gallium nitride HEMT chip and the MOSFET chip in the packaging, the second source electrode pad is used as a source electrode of the GaN device packaging structure to be connected, and the second grid electrode pad is electrically connected with the second grid electrode pin;
and the plastic packaging body is used for sealing the gallium nitride HEMT chip and the MOSFET chip.
By adopting the technical scheme, the first grid pin is arranged in the GaN device packaging structure to be communicated with the grid of the gallium nitride HEMT chip, so that the gallium nitride HEMT chip can be independently controlled by an external circuit; in the working process, the MOSFET chip keeps a conducting state without switching loss, so that the switching loss of the whole GaN device is reduced; and the on and off of the GaN device is controlled by the on and off of the GaN HEMT chip, the working frequency of the GaN device is not limited by the MOSFET chip, and the high-frequency characteristic of the GaN HEMT chip can be fully exerted.
Optionally, the GaN device package structure further includes a gasket, the gasket is disposed between the MOSFET chip and the heat dissipation slide, the second source pad is electrically connected to the heat dissipation slide, and the heat dissipation slide is located on the bottom surface of the plastic package.
By adopting the technical scheme, the heat dissipation slide glass is used as the source electrode input of the GaN device, and is arranged on the bottom surface of the package, so that the GaN device is accelerated in heat conduction and dissipation in the using process.
Optionally, the plastic package body wraps three side surfaces of the heat dissipation slide adjacent to the bottom surface of the plastic package, and the other side surface of the heat dissipation slide adjacent to the bottom surface of the plastic package extends to the outside of the plastic package body.
By adopting the technical scheme, after the heat dissipation slide glass extends towards the outside of the plastic package body, the area of the heat dissipation slide glass is increased, and the heat dissipation effect is further increased; meanwhile, when the GaN device is installed and used, the GaN device can be welded and fixed through the radiating carrier, so that the GaN device is stably installed.
Optionally, the lead frame further includes a first spare lead, and the first spare lead is electrically connected to the drain pad.
By adopting the technical scheme, the drain output pins of the GaN device are increased, so that the drain output resistance of the GaN device is reduced.
Optionally, the projection area of the gasket on the heat dissipation slide can completely cover the projection area of the MOSFET chip on the heat dissipation slide.
Through adopting above-mentioned technical scheme, can fully contact and combine between MOSFET chip and the gasket for MOSFET chip's fixed effect is better.
Optionally, the lead frame further includes a second spare pin, and the second source pad is electrically connected to the second spare pin.
Optionally, the heat dissipation slide is integrally connected with the second spare pin, and the second source pad is electrically connected with the heat dissipation slide.
Optionally, a schottky diode is reversely arranged in the MOSFET chip.
By adopting the technical scheme, the parasitic capacitance in the MOSFET chip is eliminated by utilizing the Schottky diode.
Optionally, the turn-off working voltage of the drain pad of the gallium nitride HEMT chip is between 100 and 600V, and both the turn-off and turn-on working voltages of the first gate pad of the gallium nitride HEMT chip are less than 0V.
By adopting the technical scheme, the GaN device is set as a high-power packaging semiconductor device so as to increase the application range of the GaN device.
The application also provides an electronic device, which adopts the following technical scheme:
an electronic device comprises a printed circuit board and a GaN device packaging structure which is combined on the printed circuit board and can be combined with any one of the technical schemes.
By adopting the technical scheme, on one hand, the heat generated by the GaN device is conducted and dissipated through the heat dissipation slide; on the other hand, the pins of the GaN device packaging structure and the conductive copper foil on the printed circuit board enable the electronic device to transfer heat of the GaN device more quickly.
In summary, the present application includes at least one of the following beneficial technical effects:
1. the grid of the gallium nitride HEMT chip is led out independently through the first grid pin, so that an external circuit can control the grid of the gallium nitride HEMT chip independently, the MOSFET chip only needs to keep the device closed at the moment of electrifying, the device is protected from short circuit caused by the device opening at the moment of electrifying, and keeps a normally open state when working normally, a switch of the GaN device is controlled by the grid of the gallium nitride HEMT chip when working, the limitation of the highest working frequency of the MOSFET chip on the GaN device is eliminated, the MOSFET chip keeps normally open when working, no switching loss exists, and the switching loss of the whole device is reduced;
2. the radiating slide extends towards the outside of the plastic package body, so that the area of the radiating slide is increased, and the radiating effect is further increased; when the GaN device is installed and used, the GaN device can be welded and fixed through the radiating slide glass, so that the GaN device is stably installed;
3. the heat generated by the gallium nitride HEMT chip can be directly conducted to an external printed circuit board on the bottom surface of the package through the heat dissipation carrier, and can also be conducted to the copper foil connected with the external printed circuit board through each pin, so that the heat dissipation path is increased.
Drawings
Fig. 1 is a perspective view of a package according to embodiment 1 of the present application, which is made to show an electrical connection relationship between a gallium nitride HEMT chip and a MOSFET chip.
Fig. 2 is a schematic circuit diagram of a GaN device package structure in embodiment 1 of the present application.
Fig. 3 is a schematic view of the mounting of the gallium nitride HEMT chip and the MOSFET chip on the lead frame in embodiment 1 of the present application.
Fig. 4 is a schematic circuit diagram of a GaN device package structure in embodiment 1 of the present application.
Fig. 5 is a schematic view of the mounting of the gallium nitride HEMT chip and the MOSFET chip on the lead frame in embodiment 2 of the present application.
Fig. 6 is a perspective view of a package according to embodiment 2 of the present application, which is made to show an electrical connection relationship between a gallium nitride HEMT chip and a MOSFET chip.
Fig. 7 is a schematic view of the mounting of the gallium nitride HEMT chip and the MOSFET chip on the lead frame in embodiment 3 of the present application.
Fig. 8 is a perspective view of a package according to embodiment 3 of the present application, which is made to show an electrical connection relationship between a gallium nitride HEMT chip and a MOSFET chip.
Description of reference numerals: 1. a lead frame; 11. a heat dissipation slide; 12. a first gate pin; 13. a second gate pin; 14. a drain lead; 15. a first spare pin; 16. a second spare pin; 2. a gallium nitride HEMT chip; 21. a first source pad; 22. a first gate pad; 23. a drain pad; 3. a MOSFET chip; 31. a drain layer; 32. a second source pad; 33. a second gate pad; 4. molding the body; 5. a gasket; 6. a schottky diode.
Detailed Description
The present application is described in further detail below with reference to the attached drawings.
The embodiment of the application discloses a GaN device packaging structure.
Example 1
Referring to fig. 1 and 2, the GaN device package structure includes a lead frame 1, a gallium nitride HEMT chip 2, a MOSFET chip 3, and a plastic package body 4; the lead frame 1 includes a first gate lead 12, a second gate lead 13, and a drain lead 14. One of the important effects of the utility model is that the grid of the gallium nitride HEMT chip 2 is led out separately by a pin; in the use process, the on-off of the gallium nitride HEMT chip 2 is independently controlled by an external circuit so as to get rid of the limitation of the highest working frequency of the MOSFET chip 3 on the GaN device.
In the present embodiment, the gallium nitride HEMT chip 2 is a depletion type, the gallium nitride HEMT chip 2 is in a conducting state in a normal state, and the off-voltage of the drain pad 23 of the gallium nitride HEMT chip 2 is between 100V and 600V. When the first gate pad 22 of the gallium nitride HEMT chip 2 is switched in a negative voltage, i.e., the voltage is less than 0V, the first source pad 21 and the drain pad 23 are switched from an on state to an off state. The MOSFET chip 3 is an enhancement NMOS, and when the access voltage of the second gate pad 33 of the MOSFET chip is greater than the turn-on voltage of the MOSFET chip 3, the second source pad 32 of the MOSFET chip 3 is conducted with the drain layer 31. A schottky diode 6 is also provided in reverse direction within the MOSFET chip 3 to eliminate parasitic capacitance in the MOSFET chip 3.
Referring to fig. 1 and 3, the lead frame 1 further includes a heat sink chip 11 and first spare pins 15. The heat dissipation slide 11 is made of a material having high thermal conductivity, and the gallium nitride HEMT chip 2 is disposed on one surface of the heat dissipation slide 11. Specifically, the front surface of the gallium nitride HEMT chip 2 is provided with a first source pad 21, a drain pad 23, and a first gate pad 22 as input and output and control ports of the gallium nitride HEMT chip 2; the back surface of the gallium nitride HEMT chip 2 is thermally coupled to the heat sink 11 to achieve fixation of the gallium nitride HEMT chip 2.
The first gate pad 22 is electrically connected with the first gate pin 12, and the first gate pin 12 is used as a control end for controlling the on/off of the gallium nitride HEMT chip 2; drain pad 23 is electrically connected to drain lead 14, and drain lead 14 serves as the drain connection for the GaN device. The first gate pad 22 and the first gate lead 12, and the drain pad 23 and the drain lead 14 are electrically connected by a welding metal wire, which may be a gold wire, a silver wire, a copper wire, or an aluminum wire. In this embodiment, the semiconductor substrate of the gallium nitride HEMT chip 2 is gallium nitride, the heat dissipation carrier 11 is made of copper, and the metal wire is a silver wire.
The MOSFET chip 3 is disposed on the heat sink 11 and the region where the MOSFET chip 3 is located is spaced apart from the region where the gallium nitride HEMT chip 2 is located to reduce the direct temperature influence of the MOSFET chip 3 on the gallium nitride HEMT chip 2. The MOSFET chip 3 is provided with a second gate pad 33 and a second source pad 32 on the front surface, and the MOSFET chip 3 is provided with a drain layer 31 on the back surface. The drain layer 31 of the MOSFET chip 3 is electrically connected to the first source pad 21 of the gallium nitride HEMT chip 2 to serve as an internal circuit connection of the GaN device; the second gate pad 33 of the MOSFET chip 3 is electrically connected to the second gate pin 13, and the second gate pin 13 is used as a control end for controlling the on/off of the MOSFET chip 3; the second source pad 32 of the MOSFET chip 3 is electrically connected to the heat sink 11, and the heat sink 11 serves as a source connection of the GaN device.
In this embodiment, the spacer 5 is disposed between the MOSFET chip 3 and the heat dissipation slide 11, and a projection of the spacer 5 on the heat dissipation slide 11 completely covers a projection of the MOSFET chip 3 on the heat dissipation slide 11, so that the MOSFET chip 3 and the spacer 5 have a good contact fixing effect. The spacer 5 has a conductive layer and an insulating layer, and the electric signal in the drain layer 31 of the MOSFET chip 3 is isolated from being transmitted to the heat sink chip 11 through the spacer 5. One surface of the gasket 5, which is in contact with the MOSFET chip 3, is a conductive layer, and one surface of the gasket 5, which is in contact with the heat dissipation slide 11, is an insulating layer. By means of silver wire welding, the conductive layer of the spacer 5 is electrically connected with the first source pad 21 of the gallium nitride HEMT chip 2, and the second gate pad 33 of the MOSFET chip 3 is electrically connected with the second gate pin 13. In other embodiments, the first spare lead 15 is electrically connected to the drain pad 23 of the GaN HEMT chip 2, which increases the number of drain connections of the GaN device and reduces the drain resistance of the GaN device.
After the gallium nitride HEMT chip 2 and the MOSFET chip 3 are fixed on the heat dissipation slide 11 and are welded by a silver wire, the gallium nitride HEMT chip 2, the MOSFET chip 3, the heat dissipation slide 11, the first gate pin 12, the second gate pin 13, the drain pin 14 and the first spare pin 15 are packaged to form a plastic package body 4 so as to protect the gallium nitride HEMT chip 2 and the MOSFET chip 3. The first gate lead 12, the second gate lead 13, the drain lead 14 and the first spare lead 15 are disposed at intervals, and each lead extends to the outside of the plastic package body 4, so as to facilitate welding and fixing. In addition, each pin can be arranged on the bottom surface of the plastic package without extending to the outside of the plastic package body 4, and only one surface of each pin is exposed out of the plastic package body 4. For the heat dissipation slide 11, because the heat dissipation slide 11 is used as a source electrode connection of the GaN device, the heat dissipation slide 11 can be disposed on the bottom surface of the plastic package, so that one surface of the heat dissipation slide 11 is exposed out of the plastic package body 4, and is welded and fixed by a surface mounting technology. During the operation of the GaN device, the heat generated by the GaN device itself can be conducted to the external circuit board.
In this embodiment, three side surfaces of the heat dissipation slide 11 adjacent to the bottom surface of the plastic package are all covered by the plastic package body 4, and the other side surface of the heat dissipation slide 11 adjacent to the bottom surface of the plastic package extends to the outside of the plastic package body 4, so that the heat dissipation slide 11 extends out of the plastic package body 4 by a length, the heat dissipation area of the heat dissipation slide 11 is increased, and meanwhile, the extending part is convenient to weld and fix.
The implementation principle of the embodiment of the application is as follows: arranging a first grid pin 22, and independently leading out a first grid pad 22 of the gallium nitride HEMT chip 2 in the GaN device so as to realize independent control of the gallium nitride HEMT chip 2 by an external circuit; in the using process, the external circuit outputs a driving voltage to the second gate pad 33 of the MOSFET chip 3 to keep the MOSFET chip 3 in a conducting state, then outputs another driving voltage to the first gate pad 22 of the gallium nitride HEMT chip 2 to conduct a device on the MOSFET chip 3 to control the GaN device to be turned off or on, and the limitation of the maximum working frequency of the MOSFET chip 3 on the gallium nitride HEMT chip 2 is removed.
Example 2
Referring to fig. 4 and 5, the present embodiment is different from embodiment 1 in that the lead frame includes a second spare lead 16, the second spare lead 16 is integrally connected to the heat sink 11, and the second spare lead 16 is electrically connected to the second source pad 32 of the MOSFET chip 3. Referring to fig. 6, the second spare lead 16 serves as a source connection of the GaN device when the GaN device is encapsulated by the molding compound 4. In other embodiments, the drain layer 31 of the MOSFET chip 3 can also be directly electrically connected to the heat sink 11, and the first source pad 21 of the gallium nitride HEMT chip 2 is then soldered to the heat sink 11 by silver wire. At this time, the heat dissipation carrier 11, the gallium nitride HEMT chip 2, and the MOSFET chip 3 may be completely sealed in the plastic package body 4, or one surface of the heat dissipation carrier 11 may be exposed to one surface of the plastic package body 4. In this embodiment, since the GaN device is a high power semiconductor package device, the GaN device generates a large amount of heat during normal use, and the heat dissipation carrier 11 has another function of dissipating heat, and the heat dissipation carrier 11 is disposed on the bottom surface of the plastic package body 4, thereby facilitating heat conduction during use.
Example 3
Referring to fig. 7 and 8, the present embodiment is different from embodiment 2 in that the second spare lead 16 is not integrally connected to the heat sink 11, and the second spare lead 16 is electrically connected to the second source pad 32 of the MOSFET chip 3. Before the lead frame is provided with the chip, the lead frame can be selected, so that the gallium nitride HEMT chip 2 and the MOSFET chip 3 can be suitable for the lead frames 1 with various specifications.
Example 4
The embodiment of the application also discloses an electronic device. The electronic device comprises a printed circuit board and a GaN device packaging structure which is combined on the printed circuit board and can be combined with any one of the technical schemes. By welding the GaN device on the printed circuit board, on one hand, the generated heat of the GaN device is conducted and dissipated through the heat dissipation slide 11; on the other hand, the pins of the GaN device packaging structure and the conductive copper foil on the printed circuit board conduct heat to the printed circuit board for heat dissipation, so that the electronic device can quickly transfer the heat of the GaN device.
The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.

Claims (10)

1. A GaN device package structure, comprising:
the lead frame (1) comprises a heat dissipation slide (11), a first grid lead (12), a second grid lead (13) and a drain lead (14);
the gallium nitride HEMT chip (2) is arranged on the heat dissipation slide (11), the gallium nitride HEMT chip (2) comprises a first source electrode pad (21), a first grid electrode pad (22) and a drain electrode pad (23), the first grid electrode pad (22) is electrically connected with the first grid electrode pin (12), and the drain electrode pad (23) is electrically connected with the drain electrode pin (14), so that the drain electrode pad (23) is used as a drain electrode of the GaN device packaging structure for connection;
the MOSFET chip (3) is arranged on the heat dissipation slide (11), the MOSFET chip (3) comprises a drain layer (31), a second source pad (32) and a second gate pad (33), the drain layer (31) is electrically connected with the first source pad (21) and is used as an electrical interconnection of the gallium nitride HEMT chip (2) and the MOSFET chip (3) in the packaging, the second source pad (32) is used as a source electrode connection of the GaN device packaging structure, and the second gate pad (33) is electrically connected with the second gate pin (13);
and the plastic package body (4) is used for sealing the gallium nitride HEMT chip (2) and the MOSFET chip (3).
2. The GaN device package structure of claim 1, wherein: still include gasket (5), gasket (5) set up MOSFET chip (3) with between heat dissipation slide glass (11), second source pad (32) with heat dissipation slide glass (11) electric connection, heat dissipation slide glass (11) are located the plastic envelope bottom surface.
3. The GaN device package structure of claim 2, wherein: the plastic package body (4) coats three side faces of the heat dissipation slide glass (11) adjacent to the bottom face of the plastic package, and the other side face of the heat dissipation slide glass (11) adjacent to the bottom face of the plastic package extends towards the outside of the plastic package body (4).
4. The GaN device package structure of claim 2, wherein: the lead frame (1) further comprises a first spare pin (15), and the first spare pin (15) is electrically connected with the drain pad (23).
5. The GaN device package structure of claim 2, wherein: the projection area of the gasket (5) on the heat dissipation slide (11) can completely cover the projection area of the MOSFET chip (3) on the heat dissipation slide (11).
6. The GaN device package structure of claim 1, wherein: the lead frame (1) further comprises a second spare pin (16), and the second source pad (32) is electrically connected with the second spare pin (16).
7. The GaN device package structure of claim 6, wherein: the heat dissipation slide (11) is integrally connected with the second spare pin (16), and the second source pad (32) is electrically connected with the heat dissipation slide (11).
8. The GaN device package structure of any of claims 1-7, wherein: and a Schottky diode (6) is reversely arranged in the MOSFET chip (3).
9. The GaN device package structure of any of claims 1-7, wherein: the off-state working voltage of the drain pad (23) of the gallium nitride HEMT chip (2) is 100-600V, and the off-state and on-state working voltages of the first grid pad (22) of the gallium nitride HEMT chip (2) are both less than 0V.
10. An electronic device, comprising: a printed circuit board and a GaN device package structure of any of claims 1-9 bonded to the printed circuit board.
CN202122284511.9U 2021-09-18 2021-09-18 GaN device packaging structure and electronic device Active CN215731692U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114823655A (en) * 2022-06-27 2022-07-29 江苏能华微电子科技发展有限公司 Cascade packaging structure and method of GaN HEMT device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114823655A (en) * 2022-06-27 2022-07-29 江苏能华微电子科技发展有限公司 Cascade packaging structure and method of GaN HEMT device
CN114823655B (en) * 2022-06-27 2022-09-02 江苏能华微电子科技发展有限公司 Cascade packaging structure and method of GaN HEMT device

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