CN215644487U - Sensor packaging structure with logic chip packaged in advance - Google Patents
Sensor packaging structure with logic chip packaged in advance Download PDFInfo
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- CN215644487U CN215644487U CN202122141182.2U CN202122141182U CN215644487U CN 215644487 U CN215644487 U CN 215644487U CN 202122141182 U CN202122141182 U CN 202122141182U CN 215644487 U CN215644487 U CN 215644487U
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- open slot
- logic chip
- sensor
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The utility model discloses a sensor packaging structure with a logic chip packaged in advance, which comprises: the base plate, base plate one side has packaging material, packaging material is including first region and second area, the encapsulation has first chip in the first region, the second area is equipped with the open slot, the open slot has only an opening, the open slot is used for the encapsulation second chip, first region with the regional level of second sets up side by side or vertical overlapping setting. The packaging structure solves the problems that the existing packaging structure has large product space and can not enable the sensor chip to perfectly exert the function, and not only can the space be reduced, but also the function of the sensor chip can be perfectly exerted.
Description
Technical Field
The utility model relates to the technical field of semiconductor chip packaging, in particular to a sensor packaging structure with a logic chip packaged in advance.
Background
The statements herein merely provide background information related to the present disclosure and may not necessarily constitute prior art.
The semiconductor packaging refers to a process of processing a wafer passing a test according to a product model and a functional requirement to obtain an independent chip. The packaging process comprises the following steps: the wafer from the previous process of the wafer is cut into small chips through a scribing process, then the cut chips are pasted on the corresponding small islands of the substrate frame through glue, and then the bonding pads of the chips are connected to the corresponding pins of the substrate through superfine metal wires or conductive resin to form a required circuit; and then packaging and protecting the independent wafer by using a plastic shell, carrying out a series of operations after plastic packaging, carrying out finished product testing after packaging, and finally warehousing and delivering.
In the prior art, most of chips are packaged into a frame to seal the chips, so that the chips are effectively placed, fixed, sealed, protected and enhanced in heat conduction performance, but various external environmental information must be acquired for the sensor, and the completely sealed structure can affect the sensor to receive external information more or less. Meanwhile, a plurality of chips must be mounted on a product to fully exert the function of the product, and the size of the product is correspondingly influenced.
Disclosure of Invention
Aiming at the defects in the prior art, the utility model aims to provide a sensor packaging structure with a logic chip packaged in advance, which solves the problems that the existing packaging structure has large product space and can not enable the sensor chip to perfectly exert the function, and not only can the space be reduced, but also the function of the sensor chip can be perfectly exerted.
In order to achieve the purpose, the utility model is realized by the following technical scheme:
the utility model provides a sensor packaging structure with a logic chip packaged in advance, which comprises: the base plate, base plate one side has the encapsulation region, the encapsulation region divide into first region and second region, the encapsulation has first chip in the first region, the second region is equipped with the open slot, the open slot only is being equipped with the opening keeping away from base plate one side, the open slot is used for the encapsulation second chip, the first region with the regional level of second sets up side by side or vertical overlapping setting.
Further, the first chip is a logic chip, and the second chip is a sensor chip.
Further, when the first area and the second area are vertically overlapped, the second area is arranged above the first area.
Further, the second chip in the second region is electrically connected to the first chip in the first region.
Furthermore, the pins of the second chip are electrically connected with the pins or the pad electroplating areas of the first chip.
Furthermore, the novel solar water heater also comprises a cover plate, wherein the cover plate is arranged at the opening of the open slot and is used for closing the open slot.
Further, the cover plate is a transparent cover plate.
Further, the cover plate is a metal cover plate.
Further, the packaging region is packaged by one of polyimide, silica gel and epoxy resin.
Further, the open slot has a plurality of open slots for packaging second chips with different functions.
The embodiment of the utility model has the following beneficial effects:
1. according to the utility model, the damp-proof logic chip is packaged in advance by using the plastic packaging material in the first area, and the open slot for packaging the sensor chip is reserved in the second area to form the sensor packaging structure for packaging the logic chip in advance, so that the problems that the product space is large and the sensor chip cannot be perfectly functioned in the existing packaging structure are solved, the space can be reduced, and the function of the sensor chip can be perfectly exerted.
2. The packaging structure of the utility model packages the logic chip in advance and is provided with an open slot which can be compatible with different sensor chips. The packaging structure is more like a standard component, different open grooves are compatible with different sensor chips, and more like a tool is used for packaging various different sensor chips at a later stage.
3. In the utility model, only the open slot structure with the opening at the top does not influence the use function, the plastic package is more convenient, the circuit can be better protected, and the signal line can be prevented from being damaged by external factors.
4. The plastic packaging structure arranged in an overlapped mode further reduces the plastic packaging area, reduces the packaging size, shortens the machine debugging time by secondary chip loading, accelerates the plastic packaging speed, shortens the welding wire distance, reduces the risk of plastic packaging line punching and increases the reliability.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, are included to provide a further understanding of the utility model, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the utility model and together with the description serve to explain the utility model and not to limit the utility model.
Fig. 1 is a schematic diagram of a package structure according to a first embodiment of the utility model;
FIG. 2 is a schematic diagram of a sensor chip after being packaged according to a first embodiment of the utility model;
fig. 3 is a schematic diagram of a package structure according to a second embodiment of the utility model;
FIG. 4 is a schematic diagram of a sensor chip after being packaged according to a second embodiment of the utility model;
FIG. 5 is a half-sectional view of FIG. 4 in accordance with a second embodiment of the present invention;
in the figure: 1-substrate, 2-second region, 3-first region, 4-first chip, 5-open slot, 6-second chip, 7-cover plate.
The spacing or dimensions between each other are exaggerated to show the location of the various parts, and the illustration is for illustrative purposes only.
Detailed Description
It is to be understood that the following detailed description is exemplary and is intended to provide further explanation of the utility model as claimed. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the utility model. As used herein, the singular forms "a", "an", and/or "the" are intended to include the plural forms as well, unless the utility model expressly state otherwise, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof;
for convenience of description, the words "up", "down", "left" and "right" in the present invention, if any, merely indicate correspondence with up, down, left and right directions of the drawings themselves, and do not limit the structure, but merely facilitate the description of the utility model and simplify the description, rather than indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the utility model.
The terms "mounted", "connected", "fixed", and the like in the present invention are to be understood in a broad sense, and may be, for example, fixedly connected, detachably connected, or integrated; the term "coupled" may refer to a mechanical coupling, a direct coupling, an indirect coupling via an intermediate, an internal coupling of two elements, or an interaction of two elements, and it is understood that the terms used in the present invention have the same meaning as the terms used in the present invention.
As described in the background, most of the prior art packages of chips are a frame enclosing a chip, which effectively functions to mount, fix, seal, protect the chip and enhance the thermal conductivity, but for the sensor, the completely sealed structure may have more or less influence on the sensor receiving external information. Meanwhile, a plurality of chips must be mounted on a product to fully exert the function of the product, and the size of the product is correspondingly influenced.
As shown in fig. 1 to 5, a sensor package structure in which a logic chip is packaged in advance includes: base plate 1, 1 one side of base plate has the encapsulation region, the encapsulation region divide into first region 2 and second region 3, first chip 4 is packaged with in the 2 interior encapsulation of first region, the second region is equipped with open slot 5, open slot 5 only is equipped with the opening keeping away from 1 one side of base plate, open slot 5 is used for encapsulating second chip 6, first region 2 with 3 levels in the second region set up side by side or vertical overlapping setting.
Specifically, the first chip 4 is a logic chip, and the second chip 6 is a sensor chip.
According to the utility model, the damp-proof logic chip is packaged in advance by using the plastic packaging material in the first area, and the open slot for packaging the sensor chip is reserved in the second area to form the sensor packaging structure for packaging the logic chip in advance, so that the problems that the product space is large and the sensor chip cannot be perfectly functioned in the existing packaging structure are solved, the space can be reduced, and the function of the sensor chip can be perfectly exerted.
The packaging structure of the utility model packages the logic chip in advance and is provided with an open slot which can be compatible with different sensor chips. The packaging structure is more like a standard component, different open grooves are compatible with different sensor chips, and more like a tool is used for packaging various different sensor chips at the later stage, but not for simply packaging two chips.
Example one
In an exemplary embodiment of the present invention, as shown in fig. 1-2, an open slot is horizontally juxtaposed with the sensor chip, the open slot being open only at the top, and not a longitudinal through slot. Compared with the prior art, the plastic package structure with the opening at the top does not influence the use function, is more convenient to package, can better protect a circuit, and prevents external factors from damaging a signal wire.
The shape of the open slot is various and is used for corresponding to second chips of different types; the horizontal section of the open groove can be in the shape of a circle, a rectangle or a regular polygon, and the vertical section of the open groove can be in the shape of a rectangle, a trapezoid, and the like.
The first chip is electrically connected with the substrate, and the first chip is interconnected with the substrate through metal wires or metal contacts, wherein the metal wires or the metal contacts comprise one of metal columns, solder balls and a lamination layer consisting of the metal columns and the solder bumps. The metal column comprises one of a copper column, a silver column, a gold column, an aluminum column and a tungsten column.
The substrate has the functions of conduction, insulation and support, and determines the performance, quality, processability in manufacturing, manufacturing cost, manufacturing level and the like of the printed board.
Specifically, the second chip may be one of an optical sensor chip, an acoustic sensor chip, a differential pressure sensor chip, or a tire pressure sensor chip.
The novel LED lamp is characterized by further comprising a cover plate 7, wherein the cover plate 7 is arranged at the opening of the open slot 5 and used for closing the open slot 5. The cover plate has a plurality of types, and different cover plates have different shapes and are used for matching with the open grooves with different shapes.
Specifically, when the second chip is an optical sensor chip, the cover plate is a transparent cover plate; and when the second chip is an acoustic sensor chip, the cover plate is a metal cover plate.
The packaging area is packaged by adopting one of polyimide, silica gel and epoxy resin.
The open slot 5 has a plurality of slots for packaging second chips with different functions. Specifically, there may be 2 different sensor chips on the package structure, and one package structure may simultaneously implement different functions.
Example two
As shown in fig. 3 to 5, the present embodiment is different from the first embodiment in that the first region 3 and the second region 2 are vertically overlapped, and the second region 2 is disposed above the first region 3. The second chip 6 in the second region 2 is electrically connected to the first chip 4 in the first region 3. And the pin pad of the second chip is electrically connected with the pin pad of the first chip or the welding disc electroplating area.
The plastic package structure overlapped in the embodiment further reduces the plastic package area, reduces the package size, shortens the machine debugging time by secondary chip loading, accelerates the plastic package speed, shortens the welding wire distance, reduces the risk of plastic package line punching, and increases the reliability.
EXAMPLE III
As shown in fig. 1 to 5, a sensor packaging method for pre-packaging a logic chip is provided, which achieves the effects of reducing space and perfectly playing the chip function. The specific mode and the method are as follows:
(1) dividing the substrate into two areas according to the size of the chip, and respectively placing the chips with different functions or overlapping the chips by keeping one area unchanged;
(2) the chip which is resistant to damp, cold and the like and can influence the chip by external factors is subjected to plastic package preferentially by using a special die, and a chip pin pad area or a bonding pad ground wire point plating area is reserved;
(3) carrying out pad connection between chips on the sensor above the plastic packaged chip or connecting the pad of the sensor chip with a bonding pad electroplating area of a chip below the sensor chip;
(4) the sensor which is subjected to wire welding is subjected to plastic package, a glass cover plate is used for sealing above the sensor in order to protect the sensor and perfectly exert the function of the sensor, and therefore the sensor can be protected and can effectively transmit external information.
(5) And after the full-page plastic package is completed, tearing off the upper film on the back surface of the substrate, cleaning the residual glue on the back surface of the chip, and cutting the chip into products after the single plastic package is completed for inspection and shipment.
Claims (10)
1. A sensor package structure in which a logic chip is packaged in advance, comprising: the base plate, base plate one side has the encapsulation region, the encapsulation region divide into first region and second region, the encapsulation has first chip in the first region, the second region is equipped with the open slot, the open slot only is being equipped with the opening keeping away from base plate one side, the open slot is used for the encapsulation second chip, the first region with the regional level of second sets up side by side or vertical overlapping setting.
2. The logic chip prepackaged sensor package structure of claim 1 wherein the first chip is a logic chip and the second chip is a sensor chip.
3. The logic chip prepackaged sensor package structure of claim 1 wherein the second region is disposed above the first region when the first region and the second region are disposed vertically overlapping.
4. The logic chip pre-packaged sensor package structure of claim 3, wherein the second chip in the second region is electrically connected to the first chip in the first region.
5. The logic chip prepackaged sensor package of claim 4 wherein the leads of the second chip are electrically connected to the lead or pad plating regions of the first chip.
6. The logic chip pre-packaged sensor package structure of claim 1, further comprising a cover plate disposed at an opening of the open slot for closing the open slot.
7. The logic chip prepackaged sensor package structure of claim 6 wherein the cover is a transparent cover.
8. The logic chip pre-packaged sensor package structure of claim 6, wherein the cover plate is a metal cover plate.
9. The logic chip prepackaged sensor package of claim 1 wherein the packaging region is encapsulated with one of polyimide, silicone, and epoxy.
10. The logic chip pre-packaged sensor package structure of claim 1, wherein the open slot has a plurality of slots for packaging second chips of different functions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122141182.2U CN215644487U (en) | 2021-09-06 | 2021-09-06 | Sensor packaging structure with logic chip packaged in advance |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122141182.2U CN215644487U (en) | 2021-09-06 | 2021-09-06 | Sensor packaging structure with logic chip packaged in advance |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN215644487U true CN215644487U (en) | 2022-01-25 |
Family
ID=79910773
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202122141182.2U Expired - Fee Related CN215644487U (en) | 2021-09-06 | 2021-09-06 | Sensor packaging structure with logic chip packaged in advance |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN215644487U (en) |
-
2021
- 2021-09-06 CN CN202122141182.2U patent/CN215644487U/en not_active Expired - Fee Related
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| GR01 | Patent grant | ||
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20220125 |