CN215529015U - Power line carrier channel analysis module - Google Patents
Power line carrier channel analysis module Download PDFInfo
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- CN215529015U CN215529015U CN202121781696.8U CN202121781696U CN215529015U CN 215529015 U CN215529015 U CN 215529015U CN 202121781696 U CN202121781696 U CN 202121781696U CN 215529015 U CN215529015 U CN 215529015U
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Abstract
The utility model discloses a power line carrier channel analysis module, which belongs to the technical field of high-speed power line carrier communication and comprises an analog signal processing unit, a digital signal processing unit, an MUC control unit, an LED unit, a TF memory card, an SPI-Flash unit, an SDRAM (synchronous dynamic random access memory) memory, a communication interface, a power line coupling interface and an AC-DC (alternating current-direct current) power supply module, wherein the functions of noise acquisition, noise analysis, data storage, channel test and the like can be realized, a real field environment can be simulated in a laboratory, the channel analysis module is realized on the basis of a field programmable gate array and a simulation front-end chip, the cost is relatively low, the carrying is convenient, and the problems of noise research and field operation and maintenance test in the high-speed power line carrier communication are solved.
Description
Technical Field
The utility model belongs to the technical field of high-speed power line carrier communication, and particularly relates to a power line carrier channel analysis module.
Background
The power carrier is a communication method specific to a power system, and the power carrier communication is a technology for transmitting an analog or digital signal at a high speed by a carrier method using an existing power line. The method has the greatest characteristic that data transmission can be carried out only by wires without erecting a network again.
The power line carrier communication is a communication mode using a power line as a physical communication medium, data information is transmitted by media such as the power line, the operation cost can be reduced, the expenditure for constructing a new communication network is reduced, compared with a narrow-band carrier, the high-speed carrier has the advantages of high speed, strong anti-interference capability and the like, can be applied to power utilization information acquisition, and can be used for multiple scenes such as intelligent energy sources and the like, and is a basic underlying network component for forming a power grid information physical system as an effective transmission mode for solving the last kilometer problem. However, compared with the conventional communication medium, the access of various power loads on the power line and the change of the access of the various power loads on the power line cause complex and variable power line channel characteristics, and the characteristics influencing the quality of the power line channel include line impedance, noise and the like, wherein the noise is an important factor influencing the carrier communication quality of the low-voltage power line.
Various anti-noise methods are researched in the field of current carrier communication to improve anti-noise interference capability, the general process of the traditional anti-noise research comprises field acquisition, laboratory simulation and finally field test, the mode is difficult to restore a field complex noise environment in a laboratory, time and labor are wasted in field verification, a coverage noise scene is limited, and the requirements of field debugging, operation and maintenance of large-scale high-speed power line carriers are difficult to meet.
SUMMERY OF THE UTILITY MODEL
The technical problem to be solved by the utility model is to provide a power line carrier channel analysis module aiming at the defects of the background technology, which can realize the functions of noise acquisition, noise analysis, data storage, channel test and the like, and can simulate the real field environment in a laboratory.
The utility model adopts the following technical scheme for solving the technical problems:
a power line carrier channel analysis module comprises an analog signal processing unit, a digital signal processing unit, an MUC control unit, an LED unit, a TF memory card, an SPI-Flash unit, an SDRAM memory, a communication interface, a power line coupling interface and an AC-DC power supply module, wherein the power line coupling interface is connected with the digital signal processing unit through the analog signal processing unit, the digital signal processing unit is connected with the MUC control unit, the LED unit, the TF memory card and the communication interface are respectively connected with the MUC control unit, the SPI-Flash unit and the SDRAM memory are respectively connected with the digital signal processing unit, the AC-DC power supply module is respectively connected with the analog signal processing unit, the digital signal processing unit, the MUC control unit, the LED unit, the TF memory card, the SPI-Flash unit, the SDRAM memory, the communication interface and the power line coupling interface, used for providing required electric energy;
the analog signal processing unit is used for amplifying an analog signal from the power line and converting the analog signal into a digital signal;
a digital signal processing unit for converting the received digital signal into an analog signal;
the SDRAM memory is used for realizing sampling data caching;
the MUC control unit controller is used for realizing the control of the digital signal processing unit and the file system processing;
the SPI-Flash unit is used for storing the configuration file of the digital signal processing unit;
a TF memory card for storage of noise data files.
As a further preferable solution of the power line carrier channel analysis module of the present invention, the AC-DC power supply module includes a chip U1, a first resistor R10, a second resistor R11, a third resistor R12, a first diode D4, a second diode D5, a third diode D6, a first capacitor C5, a second capacitor C6, a third capacitor C7, a fourth capacitor C8, a fifth capacitor C9, a sixth capacitor C10, a seventh capacitor C11, a first inductor L4, and a second inductor L5;
one end of a first resistor R10 is connected to the live wire L, the other end of the first resistor R10 is connected to the anode of a first diode D4, the cathode of a first diode D4 is connected to one end of a first capacitor C5 and one end of a first inductor L4, the other end of the first inductor L4 is connected to one end of a second capacitor C6 and the pin Drn of the chip U1, the other end of the first capacitor C5 is connected to the other end of the second capacitor C6, the anode of a second diode D5, one end of a sixth capacitor C10, one end of a seventh capacitor C11 and the zero line N, and the ground, one end of a third capacitor C7 is connected to the V pin of the chip U1, the other end of the third capacitor C7 is connected to the Src pin of the chip U1, the Src pin of the chip U1, one end of a fourth capacitor C8, one end of the second resistor R11 and one end of the second inductor L11, and the other end of the fourth resistor R11 are connected to the other end of the chip U11 and the second resistor R11, One end of a third resistor R12 is connected, the other end of the third resistor R12 is connected to one end of a fifth capacitor C9 and the cathode of a third diode D6, respectively, the other end of the fifth capacitor C9 is connected to the cathode of a second diode D5, and the anode of a third diode D6 is connected to the other end of the second inductor L5, the other end of the sixth capacitor C10, the other end of the seventh capacitor C11, and the end A5V, respectively.
As a further preferred solution of the power line carrier channel analysis module of the present invention, the digital signal processing unit comprises a main controller module, an SDRAM control module, an SPI interface control module, an AFE control module, an FFT analysis module, and a noise signal sounding module, and the SDRAM control module, the SPI interface control module, the AFE control module, the FFT analysis module, and the noise signal sounding module are respectively connected to corresponding ports of the main controller module;
the main controller module is used for cooperating with each logic module to work normally and controlling a receiver sending module of data according to different working states;
the SDRAM control module is used for controlling an external SDRAM memory to realize data storage, reading and refreshing logic;
the SPI interface control module is used as a control command and data interaction channel, and the external interface conforms to the SPI interface standard;
the AFE control module is used for controlling the AD9866 chip to realize analog-to-digital and digital-to-analog conversion and realize the receiving and sending of analog signals;
the FFT analysis module is used for analyzing the acquired signal spectrum information in real time and is used for noise real-time analysis and channel attenuation test;
and the noise signal sounding module is used for controlling the generation of the programmable noise signal digital excitation and is used for the waveform generating function.
As a further preferable scheme of the power line carrier channel analysis module, the analog signal processing unit is built based on an AFE chip AD9866, the sampling rate is 50MS/S, the sampling bit width is 12 bits, and noise signals covering a high-speed carrier communication frequency band can be collected and reconstructed.
As a further preferable scheme of the power line carrier channel analysis module of the present invention, the digital signal processing unit employs an FPGA digital signal processing unit.
Compared with the prior art, the utility model adopting the technical scheme has the following technical effects:
the power line carrier channel analysis module can realize the functions of noise acquisition, noise analysis, data storage, channel test and the like, can simulate a real field environment in a laboratory, is realized based on a field programmable gate array and a simulation front-end chip, has relatively low cost and convenient carrying, and solves the problems of noise research and field operation and maintenance test in high-speed power line carrier communication.
Drawings
Fig. 1 is a schematic diagram of the structure of a power line carrier channel analysis module according to the present invention;
FIG. 2 is a schematic diagram of the digital signal processing unit of the present invention;
fig. 3 is a circuit diagram of an AC-DC power module of the present invention.
Detailed Description
The technical scheme of the utility model is further explained in detail by combining the attached drawings:
example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these example embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repetitive description will be omitted.
Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more example embodiments. In the following description, numerous specific details are provided to give a thorough understanding of example embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the subject matter of the present disclosure can be practiced without one or more of the specific details, or with other methods, components, steps, and so forth. In other instances, well-known structures, methods, implementations, or operations are not shown or described in detail to avoid obscuring aspects of the disclosure.
A power line carrier channel analysis module is shown in figure 1 and comprises an analog signal processing unit, a digital signal processing unit, a MUC control unit, an LED unit, a TF memory card, an SPI-Flash unit, an SDRAM memory, a communication interface, a power line coupling interface and an AC-DC power supply module, wherein the power line coupling interface is connected with the digital signal processing unit through the analog signal processing unit, the digital signal processing unit is connected with the MUC control unit, the LED unit, the TF memory card and the communication interface are respectively connected with the MUC control unit, the SPI-Flash unit and the SDRAM memory are respectively connected with the digital signal processing unit, and the AC-DC power supply module is respectively connected with the analog signal processing unit, the digital signal processing unit, the MUC control unit, the LED unit, the TF memory card, the SPI-Flash unit, the SDRAM memory, the communication interface, The power line coupling interface is used for providing required electric energy;
the channel analysis module framework of the utility model is divided into three parts of analog signal processing, digital signal processing and a main controller; the analog signal processing circuit is built based on an AFE chip AD9866, the sampling rate is 50MS/S, the sampling bit width is 12 bits, and noise signals covering a high-speed carrier communication frequency band can be collected and reconstructed. The digital signal processing and the main controller are designed based on an FPGA and an MCU, and are interconnected by adopting an SPI bus, so that the functions of high-speed sampling, FFT analysis and playback of analog signals are realized. The FPGA and the MCU work cooperatively, the FPGA hardware logic processes the acquisition and buffering of high-speed data, and the MCU is responsible for the control of the FPGA and the processing of a file system.
The utility model can realize the functions of noise acquisition, noise analysis, data storage, channel test and the like, can simulate real field environment in a laboratory, is realized on the basis of a field programmable gate array and a simulation front-end chip, has relatively low cost and convenient carrying, and solves the problems of noise research and field operation and maintenance test in high-speed power line carrier communication.
The analog signal processing circuit amplifies an analog signal from the power line, converts the analog signal into a digital signal, processes the digital signal through the FPGA, and can convert the digital signal output by the FPGA into an analog type, inject the analog type into the power line and transmit the analog type.
The analog signal processing unit is used for amplifying an analog signal from the power line and converting the analog signal into a digital signal; a digital signal processing unit for converting the received digital signal into an analog signal; the SDRAM memory is used for realizing sampling data caching; the MUC control unit controller is used for realizing the control of the digital signal processing unit and the file system processing; the SPI-Flash unit is used for storing the configuration file of the digital signal processing unit; a TF memory card for storage of noise data files.
As shown in fig. 2, the digital signal processing unit includes a main controller module, an SDRAM control module, an SPI interface control module, an AFE control module, an FFT analysis module, and a noise signal sounding module, and the SDRAM control module, the SPI interface control module, the AFE control module, the FFT analysis module, and the noise signal sounding module are respectively connected to corresponding ports of the main controller module;
the main controller module is used for cooperating with each logic module to work normally and controlling a receiver sending module of data according to different working states;
the SDRAM control module is used for controlling an external SDRAM memory to realize data storage, reading and refreshing logic;
the SPI interface control module is used as a control command and data interaction channel, and the external interface conforms to the SPI interface standard;
the AFE control module is used for controlling the AD9866 chip to realize analog-to-digital and digital-to-analog conversion and realize the receiving and sending of analog signals;
the FFT analysis module is used for analyzing the acquired signal spectrum information in real time and is used for noise real-time analysis and channel attenuation test;
and the noise signal sounding module is used for controlling the generation of the programmable noise signal digital excitation and is used for the waveform generating function.
The digital signal processing unit adopts an FPGA digital signal processing unit.
As shown in fig. 3, the AC-DC power module includes a chip U1, a first resistor R10, a second resistor R11, a third resistor R12, a first diode D4, a second diode D5, a third diode D6, a first capacitor C5, a second capacitor C6, a third capacitor C7, a fourth capacitor C8, a fifth capacitor C9, a sixth capacitor C10, a seventh capacitor C11, a first inductor L4, and a second inductor L5;
one end of a first resistor R10 is connected to the live wire L, the other end of the first resistor R10 is connected to the anode of a first diode D4, the cathode of a first diode D4 is connected to one end of a first capacitor C5 and one end of a first inductor L4, the other end of the first inductor L4 is connected to one end of a second capacitor C6 and the pin Drn of the chip U1, the other end of the first capacitor C5 is connected to the other end of the second capacitor C6, the anode of a second diode D5, one end of a sixth capacitor C10, one end of a seventh capacitor C11 and the zero line N, and the ground, one end of a third capacitor C7 is connected to the V pin of the chip U1, the other end of the third capacitor C7 is connected to the Src pin of the chip U1, the Src pin of the chip U1, one end of a fourth capacitor C8, one end of the second resistor R11 and one end of the second inductor L11, and the other end of the fourth resistor R11 are connected to the other end of the chip U11 and the second resistor R11, One end of a third resistor R12 is connected, the other end of the third resistor R12 is connected to one end of a fifth capacitor C9 and the cathode of a third diode D6, respectively, the other end of the fifth capacitor C9 is connected to the cathode of a second diode D5, and the anode of a third diode D6 is connected to the other end of the second inductor L5, the other end of the sixth capacitor C10, the other end of the seventh capacitor C11, and the end A5V, respectively.
The utility model can provide a5V and 200mA non-isolated power supply for supplying power, and can realize the accurate constant voltage regulation function; the power is supplied by the self-excited isolated power supply, and the power supply of the strong power region is supplied by the non-isolated power supply, so that 220V alternating current is prevented from entering the weak power region, and the reliability of the system is improved.
While certain exemplary embodiments of the present invention have been described above by way of illustration only, it will be apparent to those of ordinary skill in the art that the described embodiments may be modified in various different ways without departing from the spirit and scope of the utility model. Accordingly, the drawings and description are illustrative in nature and should not be construed as limiting the scope of the utility model.
Claims (5)
1. A power line carrier channel analysis module, characterized by: comprises an analog signal processing unit, a digital signal processing unit, an MUC control unit, an LED unit, a TF memory card, an SPI-Flash unit, an SDRAM memory, a communication interface, a power line coupling interface and an AC-DC power supply module, the power line coupling interface is connected with the digital signal processing unit through the analog signal processing unit, the digital signal processing unit is connected with the MUC control unit, the LED unit, the TF memory card and the communication interface are respectively connected with the MUC control unit, the SPI-Flash unit and the SDRAM memory are respectively connected with the digital signal processing unit, the AC-DC power supply module is respectively connected with the analog signal processing unit, the digital signal processing unit, the MUC control unit, the LED unit, the TF memory card, the SPI-Flash unit, the SDRAM memory, the communication interface and the power line coupling interface and is used for providing required electric energy;
the analog signal processing unit is used for amplifying an analog signal from the power line and converting the analog signal into a digital signal;
a digital signal processing unit for converting the received digital signal into an analog signal;
the SDRAM memory is used for realizing sampling data caching;
the MUC control unit controller is used for realizing the control of the digital signal processing unit and the file system processing;
the SPI-Flash unit is used for storing the configuration file of the digital signal processing unit;
a TF memory card for storage of noise data files.
2. The power line carrier channel analysis module of claim 1, wherein: the AC-DC power supply module comprises a chip U1, a first resistor R10, a second resistor R11, a third resistor R12, a first diode D4, a second diode D5, a third diode D6, a first capacitor C5, a second capacitor C6, a third capacitor C7, a fourth capacitor C8, a fifth capacitor C9, a sixth capacitor C10, a seventh capacitor C11, a first inductor L4 and a second inductor L5;
one end of a first resistor R10 is connected to the live wire L, the other end of the first resistor R10 is connected to the anode of a first diode D4, the cathode of a first diode D4 is connected to one end of a first capacitor C5 and one end of a first inductor L4, the other end of the first inductor L4 is connected to one end of a second capacitor C6 and the pin Drn of the chip U1, the other end of the first capacitor C5 is connected to the other end of the second capacitor C6, the anode of a second diode D5, one end of a sixth capacitor C10, one end of a seventh capacitor C11 and the zero line N, and the ground, one end of a third capacitor C7 is connected to the V pin of the chip U1, the other end of the third capacitor C7 is connected to the Src pin of the chip U1, the Src pin of the chip U1, one end of a fourth capacitor C8, one end of the second resistor R11 and one end of the second inductor L11, and the other end of the fourth resistor R11 are connected to the other end of the chip U11 and the second resistor R11, One end of a third resistor R12 is connected, the other end of the third resistor R12 is connected to one end of a fifth capacitor C9 and the cathode of a third diode D6, respectively, the other end of the fifth capacitor C9 is connected to the cathode of a second diode D5, and the anode of a third diode D6 is connected to the other end of the second inductor L5, the other end of the sixth capacitor C10, the other end of the seventh capacitor C11, and the end A5V, respectively.
3. The power line carrier channel analysis module of claim 1, wherein: the digital signal processing unit comprises a main controller module, an SDRAM control module, an SPI interface control module, an AFE control module, an FFT analysis module and a noise signal sounding module, wherein the SDRAM control module, the SPI interface control module, the AFE control module, the FFT analysis module and the noise signal sounding module are respectively connected with corresponding ports of the main controller module;
the main controller module is used for cooperating with each logic module to work normally and controlling a receiver sending module of data according to different working states;
the SDRAM control module is used for controlling an external SDRAM memory to realize data storage, reading and refreshing logic;
the SPI interface control module is used as a control command and data interaction channel, and the external interface conforms to the SPI interface standard;
the AFE control module is used for controlling the AD9866 chip to realize analog-to-digital and digital-to-analog conversion and realize the receiving and sending of analog signals;
the FFT analysis module is used for analyzing the acquired signal spectrum information in real time and is used for noise real-time analysis and channel attenuation test;
and the noise signal sounding module is used for controlling the generation of the programmable noise signal digital excitation and is used for the waveform generating function.
4. The power line carrier channel analysis module of claim 1, wherein: the analog signal processing unit is built based on an AFE chip AD9866, the sampling rate is 50MS/S, the sampling bit width is 12 bits, and noise signals covering a high-speed carrier communication frequency band can be collected and reconstructed.
5. The power line carrier channel analysis module of claim 1, wherein: the digital signal processing unit adopts an FPGA digital signal processing unit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121781696.8U CN215529015U (en) | 2021-08-02 | 2021-08-02 | Power line carrier channel analysis module |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202121781696.8U CN215529015U (en) | 2021-08-02 | 2021-08-02 | Power line carrier channel analysis module |
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| CN215529015U true CN215529015U (en) | 2022-01-14 |
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Effective date of registration: 20230602 Address after: Room 116, Building 5, No. 429 Quwu Road, Minhang District, Shanghai, 201109 Patentee after: Shanghai Yingdian Control Technology Co.,Ltd. Address before: 510000 No. 106 Fengze East Road, Nansha District, Guangzhou City, Guangdong Province Patentee before: Guangzhou Shengxi Information Technology Co.,Ltd. |