CN215345034U - Wireless earphone - Google Patents

Abstract

The present application provides a wireless headset. A wireless headset, comprising: an earphone body; a single chip module disposed within the earpiece body; the single chip module includes: the ADC module and the processor are connected with the ADC module; the ADC module is connected with a plurality of to-be-detected channels; the plurality of to-be-detected channels comprise a plurality of first to-be-detected channels for detecting touch operation or key operation of a user and a plurality of second to-be-detected channels for detecting an in-out state of the wireless earphone; the ADC module is used for carrying out time-sharing sampling on the plurality of to-be-detected channels, and the processor is used for determining the use state of the wireless earphone according to the sampling value of the ADC module; the use state includes: the touch operation, the key operation and the in-out-of-ear state. The wireless earphone is used for reducing the cost of the wireless earphone and reducing the space size of the wireless earphone.

Description

Wireless earphone

Technical Field

The application relates to the technical field of earphones, in particular to a wireless earphone.

Background

With the development of electronic products, wireless headsets are more and more widely applied. The user can play music, answer a call, etc. using the wireless headset. Wireless headsets typically have interactive functions, such as: the capacitive sensor is used for touch detection, so that gesture recognition such as single click, double click, long press, sliding and the like can be realized; the pressure is sensed through the pressure sensor, so that a user can interact with the earphone through pressing or pressing for multiple times or pressing for a long time; the distance between the earphone and the human body is detected through the distance sensor, so that the in-out ear detection of the earphone can be realized, the earphone is controlled to play or pause music playing, active noise reduction is started or closed, or various operations such as switching between single ear connection and double ear connection are performed.

The existing wireless earphone products are respectively provided with corresponding processing chips for processing capacitive touch signals, in-out ear detection signals and pressure sensor acquisition signals, and detection results for the signals are transmitted to a main control chip of the wireless earphone through interfaces by the processing chips.

The space in the wireless earphone is limited, and the plurality of processing chips increase the space tension degree of the system, so that the wireless earphone is not easy to be small and exquisite, and the user experience is influenced; but also increases the cost of the wireless headset.

SUMMERY OF THE UTILITY MODEL

An object of the present invention is to provide a wireless headset, so as to reduce the cost of the wireless headset and reduce the spatial size of the wireless headset.

The embodiment of the application provides a wireless earphone, including: an earphone body; a single chip module disposed within the earpiece body; the single chip module includes: an ADC (Analog-to-Digital Converter) module, a processor connected with the ADC module; the ADC module is connected with a plurality of to-be-detected channels; the plurality of to-be-detected channels comprise a plurality of first to-be-detected channels for detecting touch operation or key operation of a user and a plurality of second to-be-detected channels for detecting an in-out state of the wireless earphone; the ADC module is used for carrying out time-sharing sampling on the plurality of to-be-detected channels, and the processor is used for determining the use state of the wireless earphone according to the sampling value of the ADC module; the use state includes: the touch operation, the key operation and the in-out-of-ear state.

In the embodiment of the application, compared with the prior art, a plurality of processing chips are not arranged to detect each to-be-detected path, but the ADC module arranged on the single chip module is used for realizing the detection of a plurality of to-be-detected paths, and the ADC module can be used for realizing the effective detection of touch operation, key operation and in-out-to-ear states. On the basis of not needing a plurality of processing chips, the cost of the wireless earphone is reduced, and the space size is also reduced.

As a possible implementation manner, the single chip module further includes: the wireless module is used for receiving the audio signal sent by the intelligent equipment.

In the embodiment of the application, the wireless module is also integrated into the single chip module, so that the cost of the wireless headset is further reduced, and the size space of the wireless headset is reduced.

As a possible implementation manner, the wireless module is: bluetooth, bluetooth low energy, or bluetooth low energy audio module.

In the embodiment of the application, the effective receiving and/or sending of the audio signal is realized through a Bluetooth module, a Bluetooth low energy module or a Bluetooth low energy module.

As a possible implementation manner, the single chip module further includes: a codec module comprising: the analog-to-digital converter is used for converting the analog audio information into a digital audio signal so as to realize the coding of the audio signal; the digital-to-analog converter is used for converting the digital audio signal into an analog audio signal so as to realize the decoding of the audio signal.

In the embodiment of the application, the codec module is also integrated into the single chip module, so that the cost of the wireless headset is further reduced, and the size space of the wireless headset is reduced.

As a possible implementation, the wireless headset further includes: MIC (microphone) for collecting voice signals.

In the embodiment of the application, the effective collection of the voice signals can be realized through the MIC.

As a possible implementation manner, the single chip module further includes: and the capacitance detection circuit is respectively connected with the ADC module and the plurality of to-be-detected channels so as to realize the connection of the ADC module and the plurality of to-be-detected channels.

In this application embodiment, through setting up electric capacity detection circuitry, realize that the ADC module is connected with a plurality of passageways that wait to detect, and then, the ADC module can more effectively treat that the detection access samples.

As a possible implementation manner, each of the plurality of paths to be detected includes: a capacitor to be detected; the capacitance detection circuit includes: the circuit comprises a first capacitor, a second capacitor, a third capacitor, a first switch, a second switch and a third switch; the first capacitor is connected with the first switch in parallel and is connected with the capacitor to be detected; one end of the second switch is connected with the capacitor to be detected, and the other end of the second switch is connected with the second capacitor; one end of the third switch is connected with the capacitor to be detected, and the other end of the third switch is connected with the third capacitor; the ADC module is respectively connected with the second capacitor and the third capacitor and is used for sampling the voltage value of the second capacitor and/or the voltage value of the third capacitor.

In this embodiment of the application, through the capacitance detection circuit, the ADC module can effectively sample the voltage value of the second capacitor and/or the voltage value of the third capacitor, and then the processor performs further processing according to the voltage value of the second capacitor and/or the voltage value of the third capacitor, so as to effectively and accurately determine the use state of the wireless headset. In addition, the capacitance detection circuit can realize complete charging and discharging processes when charging/discharging, and effectively reduces power consumption.

As a possible implementation manner, the capacitance to be detected is: capacitive contacts or pressure sensors.

In the embodiment of the present application, the capacitor to be detected may be a capacitive contact or a pressure sensor, which is convenient for a user to use an interactive function.

As a possible implementation manner, the single chip module further includes a switch module, one end of the switch module is connected to the plurality of paths to be detected, and the other end of the switch module is connected to the capacitance detection circuit, so as to implement connection between the capacitance detection circuit and the plurality of paths to be detected, and implement time-sharing sampling of the ADC module.

In the embodiment of the application, the switch module is used for realizing time-sharing sampling of the ADC module, so that the detection precision and the detection efficiency of the ADC module are improved.

As a possible implementation manner, the single chip module further includes: a processing circuit connected to the ADC module, the processor being specifically configured to: the sampling value of the ADC module is processed through the processing circuit, a reference value corresponding to the sampling value of the ADC module is obtained, and the use state of the wireless earphone is determined according to the reference value and the sampling value of the ADC module.

In the embodiment of the application, the reference value corresponding to the sampling value of the ADC module is acquired, and the processor can determine the use state of the wireless headset by combining the sampling value, so as to improve the accuracy of the use state.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a schematic external structural diagram of a wireless headset according to an embodiment of the present disclosure;

fig. 2 is a schematic diagram of a first implementation of an internal structure of a wireless headset according to an embodiment of the present application;

fig. 3 is a schematic diagram of a second implementation of an internal structure of a wireless headset according to an embodiment of the present application;

fig. 4 is a schematic circuit structure diagram of a capacitance detection circuit according to an embodiment of the present disclosure;

fig. 5 is a schematic diagram of a third implementation of an internal structure of a wireless headset according to an embodiment of the present application.

Icon: 10-wireless headset; 11-an earphone body; 12-a single chip module; 121-an ADC module; 122-a processor; 123-capacitance detection circuit; 124-a switch module; 13-a pathway to be detected; 131-a first pathway to be detected; 132-a second pathway to be detected.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

Referring to fig. 1, which is a schematic external structure view of a wireless headset 10 according to an embodiment of the present disclosure, the wireless headset 10 includes a headset body 11.

Referring to fig. 2, which is a schematic diagram of an internal structure of the wireless headset 10, a single chip module 12 is disposed in the headset body 11, and the single chip module 12 can be understood as a main control chip module of the wireless headset 10.

The single chip module 12 includes: an ADC block 121 and a processor 122 connected to the ADC block 121. The ADC module 121 is connected to a plurality of paths to be detected 13.

The to-be-detected pathway 13 includes a plurality of first to-be-detected pathways 131 and a plurality of second to-be-detected pathways 132. The first path to be detected 131 is used to detect a touch operation or a key operation of a user, and the second path to be detected 132 is used to detect an in-out state of the wireless headset 10.

In the embodiment of the present application, compared with the prior art, instead of setting a plurality of processing chips to detect each path 13 to be detected, the ADC module 121 set on the single chip module 12 is used to detect a plurality of paths 13 to be detected, and the ADC module 121 is used to effectively detect touch operation, key operation, and in-out-of-ear state. The wireless headset 10 is reduced in cost and space size without requiring a plurality of processing chips.

A detailed embodiment of the wireless headset 10 will be described next.

The earphone body 11, which may take some general design form, for example: the appearance, shape, and the like of the headphone body 11 are not limited in the embodiment of the present application, because they are an in-ear type, a suspension type, a head-mounted type, and the like.

The single chip module 12, which is a main chip of the wireless headset 10, may integrate more components of the wireless headset 10 in addition to the above-mentioned components, which will be described separately below.

As an alternative embodiment, on the single chip module 12, further includes: and the wireless module is used for receiving the audio signal sent by the intelligent equipment. The smart device is used to establish a connection with the wireless headset 10, so that the wireless headset 10 can play audio, and may be a mobile phone, a computer, a tablet computer, a watch, or other smart devices.

The wireless module may be: bluetooth, bluetooth low energy, or bluetooth low energy audio module, etc. It is to be understood that the wireless module may be one of these modules, and may also include multiple ones of these modules, which are not limited in the embodiments of the present application.

After the smart device establishes a connection with the wireless headset 10 through the wireless module, it may transmit audio signals such as music to the headset.

The single chip module 12 further comprises a voice sampling module, a voice recognition module, an audio processing module and a codec module; and the wireless headset 10 further includes: MIC, speaker. The codec module is connected with the MIC, the voice recognition module is connected with the codec module, the voice recognition module is connected with the audio processing module, the audio processing module is connected with the codec module, and the codec module is connected with the loudspeaker.

In some embodiments, the codec module includes an analog-to-digital converter and a digital-to-analog converter, the analog-to-digital converter being configured to convert analog audio information into a digital audio signal to enable encoding of the audio signal; the digital-to-analog converter is used for converting the digital audio signal into an analog audio signal so as to realize the decoding of the audio signal.

The analog-to-digital converter (i.e., the ADC module other than the ADC module 121) includes a plurality of analog-to-digital converters corresponding to the MICs, and samples a voice signal of the MIC, converts the sampled voice signal into a digital audio signal (i.e., code), and transmits the digital audio signal to the audio processing module and the voice recognition module for processing.

In some embodiments, the audio processing module and the speech recognition module may be integrated in one module. The audio processing module and the speech recognition module may have one or more of the following functions: multiple MIC noise reduction, speech keyword recognition, speech recognition, VAD (Voice Activity Detection), audio compression, audio down-sampling, filtering, and the like.

In some embodiments, the audio processing of the audio processing module comprises: audio equalization, volume adjustment, DRC (Dynamic Range Control), audio upsampling and filtering, audio SDM (Simple Delta Modulation), Modulation, and the like.

In some embodiments, the codec module may also be integrated into the audio processing module.

In some embodiments, the codec module may be connected to the wireless module to obtain the audio signal received by the wireless module; or the audio processing module can be connected with the computer to acquire the processed audio signal from the audio processing module.

After the audio signal is processed by the audio processing module, the audio signal is transmitted to the digital-to-analog converter in the codec module, then the digital audio signal is converted into an analog audio signal (namely, decoded) by the digital-to-analog converter, and finally the analog audio signal is transmitted to the loudspeaker to be played, so that the audio signal is processed to be played.

Above-mentioned speaker and microphone that introduces, when practical application, correspond on single chip module 12 and have corresponding connection pin, speaker and microphone set up on earphone body 11, are connected with each processing module through the connection pin that corresponds, and then realize giving each processing module with signal transmission.

Likewise, for a plurality of paths 13 to be detected, in each path 13 to be detected, a capacitance to be detected is included, and the capacitance to be detected can be understood as a sensor for sensing a capacitance signal of a user, and may be: capacitive contacts or pressure sensors, and correspondingly, the user interaction signal may be: touch control signals of the capacitive contact, in-out ear detection signals, signals collected by the pressure sensor and the like.

In some embodiments, the capacitor to be detected may also be only one electrode, which may be disposed on the inner housing of the wireless headset 10.

The capacitor to be detected is provided with a corresponding connection pin on the single chip module 12, and therefore, in the embodiment of the present application, the path 13 to be detected can be understood as: the connection between the capacitor to be detected and the ADC module 121 can be realized through the connection pin of the path formed by the capacitor to be detected and the corresponding connection pin, and further the ADC module 121 can realize signal sampling.

In the embodiment of the present application, the in-and-out-of-ear state includes whether the earphone is in-ear or not, or the in-and-out-of-ear state changes. Touch operation or key operation, including: single click, double click, long press, slide, squeeze, multiple squeeze, short squeeze, long squeeze, etc.

As an optional implementation manner, please refer to fig. 3, a capacitance detection circuit 123 is further included between the to-be-detected path 13 and the ADC module 121, and the capacitance detection circuit 123 is respectively connected to the ADC module 121 and the to-be-detected paths 13, so as to realize connection between the ADC module 121 and the to-be-detected paths 13.

In the embodiment of the present application, the capacitance detection circuit 123 is arranged to realize connection between the ADC module 121 and the plurality of paths 13 to be detected, and further, the ADC module 121 can more effectively sample the paths 13 to be detected.

As an alternative embodiment, please refer to fig. 4, which is a schematic circuit structure diagram of the capacitance detection circuit 123, in fig. 4, the capacitance to be detected is Cs, and the capacitance detection circuit 123 includes: the first capacitor Cref, the second capacitor Cdacp, the third capacitor Cdacn, the first switch S1, the second switch S2, and the third switch S3.

The first capacitor Cref is connected in parallel with the first switch S1, and the first capacitor Cref is connected with the capacitor Cs to be detected; one end of the second switch S2 is connected with the capacitor Cs to be detected, and the other end of the second switch S2 is connected with the second capacitor Cdacp; one end of the third switch S3 is connected with the capacitor Cs to be detected, and the other end of the third switch S3 is connected with the third capacitor Cdacn; the ADC module 121 is connected to the second capacitor Cdacp and the third capacitor Cdacn, respectively, and is configured to sample a voltage value of the second capacitor Cdacp and/or a voltage value of the third capacitor Cdacn.

In addition, one end of the capacitor Cs to be detected, one end of the second capacitor Cdacp and one end of the third capacitor Cdacn to be detected are respectively grounded. And, on one end of the first capacitor Cref, a state of 0 or 1 may be switched by switching control, representing ground or 1 or representing a voltage source.

And, a voltage value of the second capacitor Cdacp may be denoted as Vp, and a voltage value of the third capacitor Cdacn may be denoted as Vn.

On the basis of adding the capacitance detection circuit 123, the ADC module 121 no longer directly samples each path to be detected 13, but determines a sampling value corresponding to the capacitance to be detected Cs by sampling a voltage value of the capacitance detection circuit 123.

In order to realize effective detection of capacitance, as an alternative embodiment, the detection process of the capacitance detection circuit 123 includes:

phase1 the first switch S1 is closed and the first capacitor Cref is discharged.

Phase2 the first switch S1 is opened and the charge on the capacitor Cs to be detected is partially transferred to the first capacitor Cref.

Phase3 the first switch S1 is closed and the second switch S2 is opened to keep the charge on the second capacitor Cdacp constant, so that Vp (i.e., the voltage of the second capacitor Cdacp) remains constant.

Phase4 the first switch S1 is closed and the first capacitor Cref is discharged.

Phase5 the first switch S1 is opened and the charge on the capacitor Cs to be detected is partially transferred to the first capacitor Cref.

Phase6 the first switch S1 is closed and the third switch S3 is opened to keep the charge on the third capacitor Cdacn constant, so that Vn (i.e., the voltage of the third capacitor Cdacn) remains constant.

After Phase6, the ADC module 121 may quantize the voltage on the second/third capacitances Cdacp/Cdacn. According to the voltage measured by the ADC module 121, a corresponding capacitance sampling value may be further determined, or the usage status may be determined directly according to the voltage.

In the above detection flow, all steps may be performed; only the first three steps or only the last three steps may be performed, and the ADC module 121 may implement corresponding sampling, which is not limited in the embodiment of the present application.

As can be seen from the above-mentioned detection flow, for the capacitance detection circuit 123, the current supplied by the power supply (Vref) does not directly flow to the ground in the Phase1 to Phase3 stages, but is stored in the capacitance Cs to be detected and the first capacitance Cref; finally, the capacitor Cs to be detected is charged to the power source at Phase3, and the first capacitor Cref has no charge, so that the power consumption can be effectively reduced.

Similarly, the current on the power supply does not flow directly to the ground in the Phase4 to Phase6 stages, but discharges the charges stored on the capacitor Cs to be detected and the first capacitor Cref to the ground; finally, the charge on the capacitor Cs to be detected is discharged at Phase6, and the charge on the first capacitor Cref is not present, so that the power consumption can be effectively reduced.

Therefore, a complete conversion process can be understood as a process of charging and discharging the capacitor Cs to be detected, assuming that the frequency of Phase switching is 60KHz, then the frequency of a complete process is 10KHz, and the current consumed by final charging and discharging is: i ═ Cs × Vref × 10K. Assuming that Cs is 50pF and Vref is 1.5V, the current consumed for charging and discharging is 0.75 uA. It can be seen that power consumption can be effectively reduced by the capacitance detection circuit 123 described above.

Further, the voltage value at Vp can be expressed as:

the voltage value at Vn can be expressed as:

assuming that the final ADC samples Vp and Vn, the voltage value of the final ADC sample is expressed as:

as an alternative implementation, referring to fig. 5, between the to-be-detected via 13 and the capacitance detection circuit 123, the method further includes: one end of the switch module 124 is connected to the plurality of paths 13 to be detected, and the other end of the switch module 124 is connected to the capacitance detection circuit 123, so as to connect the capacitance detection circuit 123 to the plurality of paths 13 to be detected, and to implement time-sharing sampling of the ADC module 121 on the signal corresponding to each path 13 to be detected.

In some embodiments, the switch module 124 may also be disposed between the path 13 to be detected and the ADC module 121, that is, in a case that the single chip module 12 does not include the capacitance detection module, the switch module 124 is used to connect the path 13 to be detected and the ADC module 121.

It is understood that, in the switch module 124, a switch for controlling on/off between each path to be detected 13 and the capacitance detection circuit 123 may be included, and when the switch is closed, the ADC module 121 samples it; when the switch is open, the ADC module 121 stops sampling it.

Furthermore, in order to implement time-sharing sampling, a sampling period corresponding to each path to be detected 13 may be set, and then the opening and closing of each switch may be controlled according to the sampling period, thereby implementing time-sharing sampling of each path to be detected 13.

The sampling period corresponding to each path to be detected 13 may be set in combination with an actual application scenario, which is not limited in the embodiment of the present application.

And the processor 122 is connected to the ADC module 121 and is configured to process the signal output by the ADC module 121. The Processor 122 may be a general-purpose Processor including a Central Processing Unit (CPU), a Network Processor (NP), and the like; but may also be a digital signal processor, an application specific integrated circuit, an off-the-shelf programmable gate array or other programmable logic device, discrete gate or transistor logic, discrete hardware components. A general purpose processor may be a microprocessor or the processor 122 may be any conventional processor or the like.

Different ways of determining the usage state may be used for the processor 122 in conjunction with different sample values.

As an alternative embodiment, if the sampling value of the ADC module 121 is the capacitance value of the capacitor to be detected, when the user has an interactive operation, the capacitance value of the capacitor to be detected changes compared with the capacitance value without the interactive operation.

Therefore, if the processor 122 determines that the capacitance value of the path to be detected 13 is greater than the preset capacitance value, or determines that the change of the capacitance value is greater than the preset capacitance change value, it may be determined that there is an interactive operation currently. Correspondingly, if the current capacitance value corresponds to the to-be-detected path 13 for detecting the touch operation, it is determined that the corresponding touch operation is currently performed.

In some embodiments, the sampling value of the ADC module 121 may also be a voltage value corresponding to the capacitor to be detected, and the processing manner of the processor 122 may refer to the processing manner of the capacitance value, which is not repeated herein.

As another alternative embodiment, the single chip module 12 further includes: and the processing circuit is connected with the ADC module 121. The processing circuit may be a separate processing module, or may be a processing module integrated in the processor 122, or may be a hardware processing circuit, or may be a software processing circuit, which is not limited in the embodiment of the present application.

In some embodiments, the processing circuit may be a low pass filter.

Through the processing circuit, the sampling value of the ADC module 121 may be processed to obtain a reference value corresponding to the sampling value of the ADC module 121, and the processor 122 determines the use state of the wireless headset 10 according to the reference value and the sampling value.

In this embodiment, assuming that the usage status is divided into a usage status 1 (e.g., not touched or not pressed) and a usage status 2 (e.g., touched or pressed), the sampled values at the respective times correspond to reference values. If the current time is in the use state 1, processing the ADC sampling value of the path to be detected 13 by the processing circuit to obtain a corresponding reference value; if the current time is the use state 2, the reference value (the reference value at the previous time) is maintained.

Further, the sampling value at the current moment is compared with the reference value determined by the processing circuit, and if the difference between the sampling value at the current moment and the reference value exceeds a preset value, the current use state can be judged to be a used state (for example, touched or pressed).

As an alternative implementation, the reference value at the current time is expressed as: you 1_ i ═ you 1_ i _1 × (1-alpha) + xout1_ i ×. Where yout1_ i is a reference value at the current time, yout1_ i _1 is a reference value at the previous time, and alpha is a number greater than 0 and less than 1, and is generally close to 0, such as 1/8, 1/16, 1/32, 1/64, 1/256, 1/1024, etc. xout1 — i is the sample value at the current time.

As another optional implementation, the reference value at the current time may also be: an average or weighted average of the sample values of N times before the current time, where N is an integer greater than 1, for example: 100, 200, 400, etc.

It should be noted that the above two determination manners of the reference value are applied to the case that the use state at the current time is the use state 1; if the use state is the use state 2, the reference value may be the reference value at the previous time.

By combining the reference value, the reference value can track the slow change of the capacitance to be detected caused by the change of temperature, humidity and the like, so that the final detection signal can resist temperature drift and the change of the capacitance to be detected caused by other drift.

With reference to the foregoing embodiments, on one hand, by integrating the ADC module 121 corresponding to multiple channels in the main control chip (i.e., the single chip module 12) of the wireless headset 10, the time-sharing acquisition of signals of each channel may be implemented, including: touch signal, the ear detection signal of cominging in and going out, pressure sensor acquisition signal etc. reduce wireless earphone 10's cost, simultaneously, reduce wireless earphone 10's space size. On the other hand, the capacitance detection circuit 123 integrated in the main control chip realizes low power consumption and high-precision capacitance detection. And realizing the temperature drift resistant signal detection by updating the use state based on the reference value.

In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A wireless headset, comprising:

an earphone body;

a single chip module disposed within the earpiece body;

the single chip module includes: the ADC module and the processor are connected with the ADC module; the ADC module is connected with a plurality of to-be-detected channels; the plurality of to-be-detected channels comprise a plurality of first to-be-detected channels for detecting touch operation or key operation of a user and a plurality of second to-be-detected channels for detecting an in-out state of the wireless earphone;

the ADC module is used for carrying out time-sharing sampling on the plurality of to-be-detected channels, and the processor is used for determining the use state of the wireless earphone according to the sampling value of the ADC module; the use state includes: the touch operation, the key operation and the in-out-of-ear state.

2. The wireless headset of claim 1, wherein the single chip module further comprises: the wireless module is used for receiving the audio signal sent by the intelligent equipment.

3. The wireless headset of claim 2, wherein the wireless module is: bluetooth, bluetooth low energy, or bluetooth low energy audio module.

4. The wireless headset of claim 2, wherein the single chip module further comprises: a codec module comprising: the analog-to-digital converter is used for converting the analog audio information into a digital audio signal so as to realize the coding of the audio signal; the digital-to-analog converter is used for converting the digital audio signal into an analog audio signal so as to realize the decoding of the audio signal.

5. The wireless headset of claim 1, further comprising: and the MIC is used for acquiring voice signals.

6. The wireless headset of claim 1, wherein the single chip module further comprises: and the capacitance detection circuit is respectively connected with the ADC module and the plurality of to-be-detected channels so as to realize the connection of the ADC module and the plurality of to-be-detected channels.

7. The wireless headset of claim 6, wherein each of the plurality of paths to be detected comprises: a capacitor to be detected;

the capacitance detection circuit includes: the circuit comprises a first capacitor, a second capacitor, a third capacitor, a first switch, a second switch and a third switch;

the first capacitor is connected with the first switch in parallel and is connected with the capacitor to be detected; one end of the second switch is connected with the capacitor to be detected, and the other end of the second switch is connected with the second capacitor; one end of the third switch is connected with the capacitor to be detected, and the other end of the third switch is connected with the third capacitor;

the ADC module is respectively connected with the second capacitor and the third capacitor and is used for sampling the voltage value of the second capacitor and/or the voltage value of the third capacitor.

8. The wireless headset of claim 7, wherein the capacitance to be detected is: capacitive contacts or pressure sensors.

9. The wireless headset according to claim 6, wherein the single chip module further comprises a switch module, one end of the switch module is connected to the plurality of paths to be detected, and the other end of the switch module is connected to the capacitance detection circuit, so as to connect the capacitance detection circuit to the plurality of paths to be detected and realize time-sharing sampling of the ADC module.

10. The wireless headset of claim 1, wherein the single chip module further comprises: a processing circuit connected to the ADC module, the processor being specifically configured to: the sampling value of the ADC module is processed through the processing circuit, a reference value corresponding to the sampling value of the ADC module is obtained, and the use state of the wireless earphone is determined according to the reference value and the sampling value of the ADC module.

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