CN215010215U - Front-end conditioning circuit of topological signal - Google Patents
Front-end conditioning circuit of topological signal Download PDFInfo
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- CN215010215U CN215010215U CN202121594425.1U CN202121594425U CN215010215U CN 215010215 U CN215010215 U CN 215010215U CN 202121594425 U CN202121594425 U CN 202121594425U CN 215010215 U CN215010215 U CN 215010215U
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Abstract
The utility model discloses a front end conditioning circuit of topological signal, include: the device comprises a data acquisition module, an impedance matching module and a conditioning module. The data acquisition module is used for acquiring an electric signal to be processed; the impedance matching module is used for performing impedance matching on the electric signal to be processed; and the conditioning module is connected with the output end of the impedance matching module and is used for conditioning the signals after impedance matching so as to obtain the required electric signals. The utility model discloses carry out impedance match with pending signal of telecommunication, carry out the sample of high frequency composition through blocking the electric capacity unit, improved the precision that operational amplifier handled (if enlargies, high pass, band-pass) the signal.
Description
Technical Field
The utility model relates to a technical field is taked care of to topology signal front end, concretely relates to front end conditioning circuit of topology signal.
Background
The power system puts requirements on topology identification for the circuit breaker, and a general method is that a topology signal in a current form is generated in the power system through a topology signal generating circuit, and the circuit breaker side samples an electric signal through a current transformer to analyze whether a topology characteristic signal exists or not. The current industry common mode is that metering and topology share the same current transformer for sampling; and most of the sampling methods are direct resistance sampling. Some topology detection methods require sampling of a relatively large signal, for which reason the sampled resistance is also correspondingly large. The large resistance generates a large amount of heat, and thus, the accuracy is low.
SUMMERY OF THE UTILITY MODEL
Therefore, the to-be-solved technical problem of the utility model is to overcome the defect that the precision is low to a front end conditioning circuit of topological signal is provided.
In order to achieve the above purpose, the utility model provides a following technical scheme:
the embodiment of the utility model provides a front end conditioning circuit of topological signal, include: a data acquisition module, an impedance matching module and a conditioning module, wherein,
the data acquisition module is used for acquiring an electric signal to be processed;
the impedance matching module is used for performing impedance matching on the electric signal to be processed;
and the conditioning module is connected with the output end of the impedance matching module and is used for conditioning the signals after impedance matching so as to obtain the required electric signals.
Optionally, the conditioning module comprises: a DC blocking capacitor unit, a conditioning circuit unit, wherein,
the electric signal after impedance matching passes through the blocking capacitor unit and the conditioning circuit unit in sequence to obtain an expected signal.
Optionally, the impedance matching module comprises: a second resistor, a third resistor, an eleventh resistor and a thirteenth resistor;
the first end of the third resistor is connected with the first end of the data acquisition module, and the second end of the third resistor is respectively connected with the first end of the second resistor and the first end of the blocking capacitor unit;
the second end of the second resistor is connected with an external power supply;
and the first end of the eleventh resistor is connected with the second end of the data acquisition module, and the second end of the eleventh resistor is connected with the ground terminal through the thirteenth resistor.
Optionally, the dc blocking capacitance unit includes: and the second capacitor is used for acquiring a high-frequency signal according to the electric signal after impedance matching.
Optionally, a conditioning circuit unit comprising: a first capacitor, a first resistor, a fourth resistor, a seventh resistor, an eighth resistor, an operational amplifier, a fifth resistor, a third capacitor, a tenth resistor, a fourteenth resistor and a twelfth resistor, wherein,
the non-inverting input end of the operational amplifier is connected with the first end of the seventh resistor and the first end of the eighth resistor respectively; the inverting input end of the first capacitor is connected with the first end of the second resistor, the first end of the first resistor and the first end of the second capacitor respectively; the positive power supply end is connected with the positive electrode of the power supply; the negative power supply end is connected with the negative electrode of the power supply; the output end of the first resistor is connected with the first end of the fifth resistor;
the second end of the seventh resistor is connected with an external power supply; a second end of the eighth resistor is connected with a ground terminal; the second end of the fourth resistor is connected with the second end of the blocking capacitor unit; a second end of the fifth resistor is connected with the expected conditioning circuit;
a first end of the twelfth resistor is connected with a first end of the tenth resistor and a first end of the fourteenth resistor respectively, and a second end of the twelfth resistor is connected with the differential input end;
the second end of the tenth resistor is connected with an external power supply; a second end of the fourteenth resistor is connected to a ground terminal.
The utility model discloses technical scheme has following advantage:
the utility model provides a pair of front end conditioning circuit of topological signal carries out impedance matching with pending signal of telecommunication, carries out the sample of high frequency component through blocking the direct current electric capacity unit, has improved the precision that operational amplifier handled (if enlargies, high pass, band-pass) the signal.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the technical solutions in the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a block diagram of a specific example of a front-end conditioning circuit for a topology signal according to an embodiment of the present invention;
fig. 2 is a block diagram of another specific example of a front-end conditioning circuit for a topology signal according to an embodiment of the present invention;
fig. 3 is another specific circuit structure diagram of a front-end conditioning circuit for topology signals according to an embodiment of the present invention;
fig. 4 is a circuit diagram of a specific example of a front-end conditioning circuit for topology signals according to an embodiment of the present invention.
Detailed Description
The technical solution of the present invention will be described clearly and completely with reference to the accompanying drawings, and obviously, the described embodiments are some, but not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Furthermore, the technical features mentioned in the different embodiments of the invention described below can be combined with each other as long as they do not conflict with each other.
Examples
The embodiment of the utility model provides a front end conditioning circuit of topological signal, as shown in figure 1, include: the device comprises a data acquisition module, an impedance matching module and a conditioning module. The data acquisition module is used for carrying out impedance matching on the acquired electric signals to be processed through the impedance matching module. To reduce losses. The conditioning module is connected with the output end of the impedance matching module. And conditioning the impedance matched signal to obtain a required electric signal.
In one embodiment, as shown in fig. 2, the present invention provides a conditioning module, comprising: a DC blocking capacitor unit and a conditioning circuit unit. The electric signal after impedance matching sequentially passes through the blocking capacitor unit and the conditioning circuit unit to obtain an expected signal.
In a specific embodiment, as shown in fig. 3, the impedance matching module provided by the present invention includes: a second resistor R2, a third resistor R3, an eleventh resistor R11 and a thirteenth resistor R13. A first end of the third resistor R3 is connected to a first end of the data acquisition module. The second end of the third resistor R3 is connected to the first end of the second resistor R2 and the first end of the dc blocking capacitor unit, respectively. The second end of the second resistor R2 is connected to the external power VCC. A first end of the eleventh resistor R11 is connected to a second end of the data acquisition module. A second end of the eleventh resistor R11 is connected to the ground GND through a thirteenth resistor R13. For example only, but not limited thereto, in practical applications, circuits with the same function are selected according to practical requirements.
In one embodiment, as shown in fig. 3, the dc blocking capacitor unit includes: and the second capacitor C2 is used for acquiring a high-frequency signal according to the electric signal after impedance matching. For example only, but not limited thereto, in practical applications, circuits with the same function are selected according to practical requirements.
In one embodiment, as shown in fig. 4, the conditioning circuit unit includes: the circuit comprises a first capacitor C1, a first resistor R1, a fourth resistor R4, a seventh resistor R7, an eighth resistor R8, an operational amplifier, a fifth resistor R5, a third capacitor C3, a tenth resistor R10, a fourteenth resistor R14 and a twelfth resistor R12.
The non-inverting input terminal of the operational amplifier is connected to the first terminal of the seventh resistor R7 and the first terminal of the eighth resistor R8, respectively. The inverting input terminal of the operational amplifier is connected to the first terminal of the fourth resistor R4, the first terminal of the first resistor R1, and the first terminal of the first capacitor C1, respectively. And the positive power supply end of the operational amplifier is connected with a power supply positive electrode VCC. The negative power supply end of the operational amplifier is connected with the power supply negative pole GND (or connected with the power supply ground or directly connected with the negative power supply, which is not limited herein and is selected according to specific situations). The output terminal of the operational amplifier is connected to the second terminal of the first capacitor C1, the second terminal of the first resistor R1, and the first terminal of the fifth resistor R5, respectively. The second end of the fifth resistor R5 outputs the desired conditioning signal TP+. A first end of the twelfth resistor R12 is connected to a first end of the tenth resistor R10 and a first end of the fourteenth resistor R14, respectively. The second terminal of the twelfth resistor R12 and the differential input terminal TP-And (4) connecting. Meanwhile, the second end of the twelfth resistor R12 passes through the fourth resistorCapacitor C4 is connected to ground GND. The reference level TP is provided by the voltage division of the tenth resistor R10 and the fourteenth resistor R14-. The second end of the tenth resistor R10 is connected to the external power VCC. A second end of the fourteenth resistor R14 is connected to the ground GND. TP-、TP+The final identification signal is supplied to the differential input of the sampling chip.
In this embodiment, the second terminal of the seventh resistor R7 is connected to the external power VCC. A second end of the eighth resistor R8 is connected to the ground GND. A second terminal of the fourth resistor R4 is connected to a second terminal of the dc blocking capacitance unit. A second terminal of the fifth resistor R5 is connected to the desired conditioning circuit.
The embodiment of the utility model provides a pair of front end conditioning circuit of topological signal, include: the device comprises a data acquisition module, an impedance matching module and a conditioning module. The data acquisition module is used for acquiring an electric signal to be processed; the impedance matching module is used for performing impedance matching on the electric signal to be processed; and the conditioning module is connected with the output end of the impedance matching module and is used for conditioning the signals after impedance matching so as to obtain the required electric signals. In the embodiment, impedance matching is performed on the electric signal to be processed, and sampling of high-frequency components is performed through the blocking capacitor unit, so that the precision of processing (such as amplification, high pass and band pass) of the signal by the operational amplifier is improved.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious changes and modifications can be made without departing from the scope of the invention.
Claims (5)
1. A front-end conditioning circuit for topological signals, comprising: a data acquisition module, an impedance matching module and a conditioning module, wherein,
the data acquisition module is used for acquiring an electric signal to be processed;
the impedance matching module is used for performing impedance matching on the electric signal to be processed;
and the conditioning module is connected with the output end of the impedance matching module and is used for conditioning the signals after impedance matching so as to obtain the required electric signals.
2. The front-end conditioning circuit for topology signals of claim 1, wherein said conditioning module comprises: a DC blocking capacitor unit, a conditioning circuit unit, wherein,
the electric signal after impedance matching passes through the blocking capacitor unit and the conditioning circuit unit in sequence to obtain an expected signal.
3. The front-end conditioning circuit for topological signals according to claim 1, wherein said impedance matching module comprises: a second resistor, a third resistor, an eleventh resistor and a thirteenth resistor;
the first end of the third resistor is connected with the first end of the data acquisition module, and the second end of the third resistor is respectively connected with the first end of the second resistor and the first end of the blocking capacitor unit;
the second end of the second resistor is connected with an external power supply;
and the first end of the eleventh resistor is connected with the second end of the data acquisition module, and the second end of the eleventh resistor is connected with the ground terminal through the thirteenth resistor.
4. The front-end conditioning circuit for topological signals according to claim 2, wherein said dc blocking capacitance unit comprises: and the second capacitor is used for acquiring a high-frequency signal according to the electric signal after impedance matching.
5. Front-end conditioning circuit for topological signals according to claim 4, characterized in that the conditioning circuit unit comprises: a first capacitor, a first resistor, a fourth resistor, a seventh resistor, an eighth resistor, an operational amplifier, a fifth resistor, a third capacitor, a tenth resistor, a fourteenth resistor and a twelfth resistor, wherein,
the non-inverting input end of the operational amplifier is connected with the first end of the seventh resistor and the first end of the eighth resistor respectively; the inverting input end of the first capacitor is connected with the first end of the second resistor, the first end of the first resistor and the first end of the second capacitor respectively; the positive power supply end is connected with the positive electrode of the power supply; the negative power supply end is connected with the negative electrode of the power supply; the output end of the first resistor is connected with the first end of the fifth resistor;
the second end of the seventh resistor is connected with an external power supply; a second end of the eighth resistor is connected with a ground terminal; the second end of the fourth resistor is connected with the second end of the blocking capacitor unit; a second end of the fifth resistor is connected with the expected conditioning circuit;
a first end of the twelfth resistor is connected with a first end of the tenth resistor and a first end of the fourteenth resistor respectively, and a second end of the twelfth resistor is connected with the differential input end;
the second end of the tenth resistor is connected with an external power supply; a second end of the fourteenth resistor is connected to a ground terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121594425.1U CN215010215U (en) | 2021-07-13 | 2021-07-13 | Front-end conditioning circuit of topological signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121594425.1U CN215010215U (en) | 2021-07-13 | 2021-07-13 | Front-end conditioning circuit of topological signal |
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| CN215010215U true CN215010215U (en) | 2021-12-03 |
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| CN202121594425.1U Active CN215010215U (en) | 2021-07-13 | 2021-07-13 | Front-end conditioning circuit of topological signal |
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2021
- 2021-07-13 CN CN202121594425.1U patent/CN215010215U/en active Active
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