CN214539785U - Multifunctional signal detection circuit - Google Patents
Multifunctional signal detection circuit Download PDFInfo
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- CN214539785U CN214539785U CN202120086229.7U CN202120086229U CN214539785U CN 214539785 U CN214539785 U CN 214539785U CN 202120086229 U CN202120086229 U CN 202120086229U CN 214539785 U CN214539785 U CN 214539785U
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Abstract
The utility model relates to the field of agricultural technologies, especially, relate to a multi-functional signal detection circuitry, including supply voltage VCC, IO output, pull-up resistance switch KEY1, position high level output switch KEY2, pull-down resistance switch KEY3, low level output switch KEY4, pull-down resistance R1, controllable pull-up resistance R2, controllable pull-down resistance R3 and input filter capacitance C1, its characterized in that: the output end of the power supply voltage VCC is connected with a pull-up resistor switch KEY1 and a bit high level output switch KEY2 respectively, the output end of the pull-up resistor switch KEY1 is connected with a controllable pull-up resistor R2, the output end of the controllable pull-up resistor R2 is connected with a pull-down resistor R1, and the output end of the bit high level output switch KEY2 is connected with an input filter capacitor C1. The utility model discloses a single pin through software configuration, realizes high level output, low level detection, high level detection, frequency signal detection, voltage detection, current detection function.
Description
Technical Field
The utility model relates to the field of agricultural technologies, especially, relate to a multi-functional signal detection circuitry.
Background
With the continuous development of agricultural technologies, the demand for customized controllers is continuously increasing. At present, the controller used on the agricultural machine is mainly a customized controller, the function of each pin on the controller is fixed, and when the function is changed, the controller also needs to update hardware along with the function.
The timeliness of the product is stronger and stronger, and the demand is constantly changed, which leads to the problems of repeated hardware development, long development period and high cost.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a multi-functional signal detection circuit.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
a multifunctional signal detection circuit comprises a power supply voltage VCC, an IO output end, a pull-up resistor switch KEY1, a bit high level output switch KEY2, a pull-down resistor switch KEY3, a low level output switch KEY4, a pull-down resistor R1, a controllable pull-up resistor R2, a controllable pull-down resistor R3 and an input filter capacitor C1, and is characterized in that: the output end of the power supply voltage VCC is connected with a pull-up resistor switch KEY1 and a bit high level output switch KEY2 respectively, the output end of the pull-up resistor switch KEY1 is connected with a controllable pull-up resistor R2, the output end of the controllable pull-up resistor R2 is connected with a pull-down resistor R1, the output end of the bit high level output switch KEY2 is connected with an input filter capacitor C1, the pull-down resistor R1 and the input filter capacitor C1 are grounded through a wire, the IO output end is connected with a pull-down resistor switch KEY3 and a low level output switch KEY4 respectively, the output end of the pull-down resistor switch KEY3 is connected with a controllable pull-down resistor R3, the controllable pull-down resistor R3 is grounded through a wire, and the low level output switch KEY4 is grounded through a wire.
Preferably, the pull-up resistor switch KEY1, the controllable pull-up resistor R2 and the pull-down resistor R1 are electrically connected in series through wires.
Preferably, the bit high level output switch KEY2 is electrically connected in series with the input filter capacitor C1 through a wire, and the pull-up resistor switch KEY1, the controllable pull-up resistor R2 and the pull-down resistor R1 are electrically connected in parallel with the bit high level output switch KEY2 and the input filter capacitor C1.
Preferably, the pull-down resistor switch KEY3 is electrically connected in series with the controllable pull-down resistor R3 through a conductive line.
Preferably, the controllable pull-down resistor R3, the controllable pull-down resistor R3 and the low-level output switch KEY4 are all connected in series to the ground GND.
The utility model discloses possess following beneficial effect at least:
the utility model discloses a single pin through software configuration, realizes high level output, low level detection, high level detection, frequency signal detection, voltage detection, current detection function.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without any creative effort.
Fig. 1 is a schematic diagram of the circuit structure of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, a multifunctional signal detection circuit includes a supply voltage VCC, an IO output terminal, a pull-up resistor switch KEY1, a bit high level output switch KEY2, a pull-down resistor switch KEY3, a low level output switch KEY4, a pull-down resistor R1, a controllable pull-up resistor R2, a controllable pull-down resistor R3, and an input filter capacitor C1, and is characterized in that: the output end of the power supply voltage VCC is connected with a pull-up resistor switch KEY1 and a bit high level output switch KEY2 respectively, the output end of the pull-up resistor switch KEY1 is connected with a controllable pull-up resistor R2, the output end of the controllable pull-up resistor R2 is connected with a pull-down resistor R1, the output end of the bit high level output switch KEY2 is connected with an input filter capacitor C1, the pull-down resistor R1 and the input filter capacitor C1 are grounded through a wire, the IO output end is connected with a pull-down resistor switch KEY3 and a low level output switch KEY4 respectively, the output end of the pull-down resistor switch KEY3 is connected with a controllable pull-down resistor R3, the controllable pull-down resistor R3 is grounded through a wire, and the low level output switch KEY4 is grounded through a wire.
The scheme has the following working processes:
high level output implementation: opening a high level output switch KEY2, closing a pull-up resistor KEY1, a pull-down resistor KEY3 and a low level output switch KEY4, and outputting a high level outwards at the moment;
low level output implementation: turning on a low level output switch KEY4, turning off a pull-up resistor KEY1, a high level output switch KEY2 and a pull-down resistor KEY3, and then, turning on and outputting a low level;
low level detection implementation: the pull-up resistor switch KEY1 is turned on, the high-level output switch KEY2, the pull-down resistor switch KEY3 and the low-level output switch KEY4 are turned off, and at the moment, the low level can be directly detected through the IO port;
high level detection implementation: closing the pull-up resistor switch KEY1, the bit high level output switch KEY2, the pull-down resistor switch KEY3 and the low level output switch KEY4, and at the moment, directly detecting the high level through the IO port;
frequency signal detection implementation: NPN or PNP frequency signal detection is realized by closing or opening the pull-up resistor switch KEY 1;
the voltage detection implementation mode is as follows: closing a pull-up resistor switch KEY1, a high-level output switch KEY2, a pull-down resistor switch KEY3 and a low-level output switch KEY4, and detecting a voltage value transmitted from an IO port directly through an analog quantity detection port of the MCU;
the current detection implementation mode comprises the following steps: and closing the pull-up resistor switch KEY1, the bit high level output switch KEY2, the pull-down resistor switch KEY3 and the low level output switch KEY4, and dividing the resistance value of the pull-down resistor R1 by the read voltage value through the analog quantity detection port of the MCU through the voltage drop generated on the pull-down resistor R1 by the current to obtain the actual current value.
According to the working process, the following steps are known:
the utility model discloses a single pin through software configuration, realizes high level output, low level detection, high level detection, frequency signal detection, voltage detection, current detection function.
Further, the pull-up resistor switch KEY1, the controllable pull-up resistor R2 and the pull-down resistor R1 are electrically connected in series through wires.
Further, the bit high level output switch KEY2 is electrically connected in series with the input filter capacitor C1 through a wire, and the pull-up resistor switch KEY1, the controllable pull-up resistor R2 and the pull-down resistor R1 are electrically connected in parallel with the bit high level output switch KEY2 and the input filter capacitor C1.
Further, the pull-down resistor switch KEY3 is electrically connected in series with the controllable pull-down resistor R3 through a conductive line.
Further, the controllable pull-down resistor R3, the controllable pull-down resistor R3 and the low-level output switch KEY4 are all connected in series to the ground GND.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the above embodiments, and that the principles of the present invention may be applied to any other embodiment without departing from the spirit and scope of the present invention. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (5)
1. A multifunctional signal detection circuit comprises a power supply voltage VCC, an IO output end, a pull-up resistor switch KEY1, a bit high level output switch KEY2, a pull-down resistor switch KEY3, a low level output switch KEY4, a pull-down resistor R1, a controllable pull-up resistor R2, a controllable pull-down resistor R3 and an input filter capacitor C1, and is characterized in that: the output end of the power supply voltage VCC is connected with a pull-up resistor switch KEY1 and a bit high level output switch KEY2 respectively, the output end of the pull-up resistor switch KEY1 is connected with a controllable pull-up resistor R2, the output end of the controllable pull-up resistor R2 is connected with a pull-down resistor R1, the output end of the bit high level output switch KEY2 is connected with an input filter capacitor C1, the pull-down resistor R1 and the input filter capacitor C1 are grounded through a wire, the IO output end is connected with a pull-down resistor switch KEY3 and a low level output switch KEY4 respectively, the output end of the pull-down resistor switch KEY3 is connected with a controllable pull-down resistor R3, the controllable pull-down resistor R3 is grounded through a wire, and the low level output switch KEY4 is grounded through a wire.
2. The multi-function signal detection circuit of claim 1, wherein: the pull-up resistor switch KEY1, the controllable pull-up resistor R2 and the pull-down resistor R1 are electrically connected in series through wires.
3. The multi-function signal detection circuit of claim 1, wherein: the bit high level output switch KEY2 is electrically connected in series with the input filter capacitor C1 by a wire, and the pull-up resistor switch KEY1, the controllable pull-up resistor R2 and the pull-down resistor R1 are electrically connected in parallel with the bit high level output switch KEY2 and the input filter capacitor C1.
4. The multi-function signal detection circuit of claim 1, wherein: the pull-down resistor switch KEY3 is electrically connected in series with the controllable pull-down resistor R3 through a conductive line.
5. The multi-function signal detection circuit of claim 1, wherein: the controllable pull-down resistor R3, the controllable pull-down resistor R3 and the low-level output switch KEY4 are all connected in series to the ground GND.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120086229.7U CN214539785U (en) | 2021-01-13 | 2021-01-13 | Multifunctional signal detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120086229.7U CN214539785U (en) | 2021-01-13 | 2021-01-13 | Multifunctional signal detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN214539785U true CN214539785U (en) | 2021-10-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120086229.7U Active CN214539785U (en) | 2021-01-13 | 2021-01-13 | Multifunctional signal detection circuit |
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| Country | Link |
|---|---|
| CN (1) | CN214539785U (en) |
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2021
- 2021-01-13 CN CN202120086229.7U patent/CN214539785U/en active Active
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