CN214480568U - Analog receiving assembly for broadband radio frequency direct sampling - Google Patents
Analog receiving assembly for broadband radio frequency direct sampling Download PDFInfo
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- CN214480568U CN214480568U CN202120745261.1U CN202120745261U CN214480568U CN 214480568 U CN214480568 U CN 214480568U CN 202120745261 U CN202120745261 U CN 202120745261U CN 214480568 U CN214480568 U CN 214480568U
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Abstract
The utility model relates to an analog receiving component for direct sampling of broadband radio frequency, which comprises a plurality of analog receiving channels, wherein each analog receiving channel comprises an amplitude limiter, a numerical control attenuator, a low noise amplifier, a direct/filter and a radio frequency switch which are connected in sequence; the input end of the amplitude limiter is connected with the output end of the backboard interface, and the radio frequency switch is connected to the digital signal processing unit after AD sampling. The utility model relates to a circuit is simple, and the debugging is simple, and outstanding advantage such as with low costs. The radio frequency module and the digital signal processing module are integrated into a standard slot position, so that the system can be applied to application scenes with small volume and multi-channel requirements.
Description
Technical Field
The utility model relates to a signal processing technology field especially relates to an analog receiving component that is used for direct sampling of broadband radio frequency.
Background
The traditional signal transceiver module design uses a mixing method to directly sample or transmit a broadband signal. This design requires a large number of discrete devices to implement, such as local oscillator module, intermediate frequency signal transmission module, and devices required for gain adjustment of transmission channel. At the same time, this solution has significant drawbacks: the power consumption is large, the volume is large, mixing stray is difficult to inhibit, a filter component is needed, an intermediate frequency amplifier and an intermediate frequency filter are needed, and harmonic waves at a low frequency band are difficult to improve. Based on the characteristics, the conventional design scheme needs to separately manufacture the radio frequency board and the digital board, so that at least 2 slot positions need to be occupied in the case, and the design cost and the use cost are improved.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome prior art's shortcoming, provide a simulation receiving assembly for direct sampling of broadband radio frequency, solved the not enough of simulation receiving assembly existence among the traditional signal transceiver module.
The purpose of the utility model is realized through the following technical scheme: an analog receiving component for broadband radio frequency direct sampling comprises a plurality of analog receiving channels, wherein each analog receiving channel comprises an amplitude limiter, a numerical control attenuator, a low noise amplifier, a direct connection/filter and a radio frequency switch which are connected in sequence; the input end of the amplitude limiter is connected with the output end of the backboard interface, and the radio frequency switch is connected to the digital signal processing unit after being sampled by the ADC chip.
Further, the analog receiving channels comprise a first analog receiving channel, a second analog receiving channel, a third analog receiving channel and a fourth analog receiving channel; the radio frequency switches in the first analog receiving channel, the second analog receiving channel and the fourth analog receiving channel are either switches; and the radio frequency switch in the third analog receiving channel is a one-out-of-four switch.
Furthermore, the first analog receiving channel and the second analog receiving channel include two branches selectively switched by an alternative switch, one branch is a 1030MHz receiving branch, and the other branch is a through branch.
Further, the third analog receiving channel includes three branches selectively switched by a one-out-of-four switch, one branch is a 90 MHz-200 MHz electrically tunable filter branch, the other branch is a 200 MHz-400 MHz electrically tunable filter branch, and the other branch is a through branch.
Furthermore, the fourth analog receiving channel includes two branches selectively switched by an alternative switch, one branch is an electrically tunable filter branch of 960MHz to 1250MHz, and the other branch is a through branch.
Further, the first analog receiving channel, the second analog receiving channel and the fourth analog receiving channel comprise an amplitude limiter, a coupler, a numerical control attenuator, a low noise amplifier, a load, a low noise amplifier, an alternative switch, a numerical control attenuator, a low noise amplifier, a load and a low noise amplifier which are connected in sequence.
Further, the third analog receiving channel comprises an amplitude limiter, a coupler, a numerical control attenuator, a low noise amplifier, a four-out-of-one switch, a numerical control attenuator, a low noise amplifier, a load and a low noise amplifier which are connected in sequence.
The utility model has the advantages of it is following:
the design circuit is simple, the debugging is simple, the cost is low, and the like. The radio frequency module and the digital signal processing module are integrated into a standard slot position, so that the system can be applied to application scenes with small volume and multi-channel requirements.
Drawings
Fig. 1 is a schematic structural view of the present invention;
FIG. 2 is a block diagram of the RF link of the first and second analog receive channels;
FIG. 3 is a diagram of a radio frequency link structure of a third analog receive channel;
fig. 4 is a diagram of a radio frequency link structure of a fourth analog receive channel.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the detailed description of the embodiments of the present application provided below in connection with the appended drawings is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application. The invention is further described below with reference to the accompanying drawings.
As shown in fig. 1, the utility model relates to an analog receiving assembly for direct sampling of broadband radio frequency, which comprises a plurality of analog receiving channels, wherein each analog receiving channel comprises an amplitude limiter, a numerical control attenuator, a low noise amplifier, a direct/filter and a radio frequency switch which are connected in sequence; the input end of the amplitude limiter is connected with the output end of the backboard interface, and the radio frequency switch is connected to the digital signal processing unit after being sampled by the ADC chip. The core of the digital signal processing unit selects an FPGA chip with the model of XC7VX 690T.
Further, the analog receiving channels comprise a first analog receiving channel, a second analog receiving channel, a third analog receiving channel and a fourth analog receiving channel; the radio frequency switches in the first analog receiving channel, the second analog receiving channel and the fourth analog receiving channel are either switches; and the radio frequency switch in the third analog receiving channel is a one-out-of-four switch.
Among them, Low Noise Amplifiers (LNAs) are required to have a small noise figure and high linearity. The frequency band of the through path is required to be DC-6.4GHz by the receiving channels 1 and 4; the LNA of receive channel 3 selects the Qorvo corporation low noise amplifier TQP3M 9008; a radio frequency switch is needed to select different radio frequency branches in a receiving channel, and an alternative switch of the receiving channel selects PE42521 of peregrine company; the four-out-of-one switch selects the ADI HMC241LP 3E.
The adjustable attenuator selects HMC624 and HMC424 of ADI company, the adjustable range of a single chip is 31.5dB, and the step is 0.5 dB; the amplitude limiter selects an amplitude limiting diode MADL-011023 and 14150T from MACOM company for amplitude limiting;
further, as shown in fig. 2, the first analog receiving channel and the second analog receiving channel include two branches selectively switched by an alternative switch, one branch is a 1030MHz receiving branch, and the other branch is a through branch. The low-noise amplifier circuit comprises an amplitude limiter with the model of 011023-.
The test board card of the ADC12DJ3200 is used for testing and verifying the effective digit and the input power of the ADC, the maximum effective digit of the ADC is 8.5dB when +9dBm is input under the sampling rate of 6.4GHz, and the signal-to-noise ratio can be calculated
SNR＝8.5*6.02+1.79＝52.9dB
Simultaneously calculating to obtain ADC noise floor (3.2GHz bandwidth)
Noisefoolr＝9-52.9＝-43.9dBm
For a signal bandwidth of 8MHz, the processing gain of 10log (3200/8) is 26dB, namely, for an 8MHz signal, the noise floor is
-43.9-26＝-69.9dBm
Considering the influence of air interface thermal noise and the noise coefficient of the radio frequency front end at the same time, the bottom noise of the air interface signal passing through the radio frequency front end can be obtained (the bandwidth of the known signal is 8MHz, the power spectral density of the thermal noise is-174 dBm/Hz)
SNRrfout＝-174+10lg(8*10e6)+6.4+46.1＝-52.4dBm
The noise floor of the radio frequency output obtained by the calculation is larger than that of the ADC, so the SNR when the input signal is minimum-80 dBm is most determined by the noise floor of the radio frequency signal, and the signal ratio of the output signal after the acquisition of the ADC is
-80+46.1-(-52.4)＝18.5dB
And the signal-to-noise ratio required by system demodulation is 12dB, and the system index requirement is met.
Further, as shown in fig. 3, the third analog receiving channel includes three branches selectively switched by a one-out-of-four switch, one branch is a 90 MHz-200 MHz electrically tunable filter branch, one branch is a 200 MHz-400 MHz electrically tunable filter branch, and the other branch is a through branch. The low-noise amplifier circuit comprises a secondary-connection amplitude limiter with the model number of 011023-14150T, a coupler with the model number of RBDC-20-63+, a numerical-control attenuator with the model number of HMC624, a low-noise amplifier with the model number of TQP3M9008, a one-out-of-four switch with the model number of HMC241, a numerical-control attenuator with the model number of HMC624, a low-noise amplifier with the model number of TQP3M9008, a numerical-control attenuator with the model number of HMC624, a low-noise amplifier with the model number of TQP3M9008, a numerical-control attenuator with the model number of HMC624, a low-noise amplifier with the model number of TQP3M9008, a load ATT and a low-noise amplifier with the model number of TQP3M 9008.
Further, as shown in fig. 4, the fourth analog receiving channel includes two branches selectively switched by an alternative switch, one branch is an electrically tunable filter branch of 960MHz to 1250MHz, and the other branch is a through branch. The low-noise amplifier circuit comprises an amplitude limiter with the model of 011023-.
The band-pass filter with the frequency point of 1030MHz selects a thin film cavity acoustic resonance filter RSFK1030P008B1, the band-pass filter with the frequency point of 1090MHz selects a thin film cavity acoustic resonance filter RSFK1090P008B1, the band-pass filter with the frequency point of 1090MHz is 8MHz in central frequency point of the filter, the electrically tunable filter with the frequency range of 90 MHz-400 MHz is divided into two sections of 90 MHz-200 MHz and 200 MHz-400 MHz, and the electrically tunable filter MSFJ1602 is selected for the frequency range of 960 MHz-1224 MHz.
The noise floor of the ADC (3.2GHz bandwidth) is obtained from the previous calculation
Noisefoolr＝9-52.9＝-43.9dBm
For a signal bandwidth of 11MHz, the processing gain is 10log (3200/110 ═ 24.6dB, i.e. noise floor is for 11MHz signal
-43.9-24.6＝-68.5dBm
Considering the influence of air interface thermal noise and the noise coefficient of the radio frequency front end at the same time, the bottom noise of the air interface signal passing through the radio frequency front end can be obtained (the bandwidth of the known signal is 8MHz, the power spectral density of the thermal noise is-174 dBm/Hz)
SNRrfout＝-174+10lg(11*10e6)+6.5+40.1＝-57dBm
The noise floor of the radio frequency output obtained by the calculation is larger than that of the ADC, so the SNR when the input signal is minimum-80 dBm is most determined by the noise floor of the radio frequency signal, and the signal-to-noise ratio of the output signal after the acquisition of the ADC is
-80+40.1-(-57)＝17dB
And the signal-to-noise ratio required by system demodulation is 12dB, and the system index requirement is met.
The foregoing is illustrative of the preferred embodiments of this invention, and it is to be understood that the invention is not limited to the precise form disclosed herein and that various other combinations, modifications, and environments may be resorted to, falling within the scope of the concept as disclosed herein, either as described above or as apparent to those skilled in the relevant art. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (7)
1. An analog receive module for wideband radio frequency direct sampling, characterized by: the device comprises a plurality of analog receiving channels, wherein each analog receiving channel comprises an amplitude limiter, a numerical control attenuator, a low noise amplifier, a direct/filter and a radio frequency switch which are connected in sequence; the input end of the amplitude limiter is connected with the output end of the backboard interface, and the radio frequency switch is connected to the digital signal processing unit after being sampled by the ADC chip.
2. The analog receiving component for wideband radio frequency direct sampling according to claim 1, wherein: the analog receiving channels comprise a first analog receiving channel, a second analog receiving channel, a third analog receiving channel and a fourth analog receiving channel; the radio frequency switches in the first analog receiving channel, the second analog receiving channel and the fourth analog receiving channel are either switches; and the radio frequency switch in the third analog receiving channel is a one-out-of-four switch.
3. The analog receiving component for wideband radio frequency direct sampling according to claim 2, wherein: the first analog receiving channel and the second analog receiving channel internally comprise two branches which are selectively switched through an alternative switch, one branch is a 1030MHz receiving branch, and the other branch is a through branch.
4. The analog receiving component for wideband radio frequency direct sampling according to claim 2, wherein: the third analog receiving channel comprises three branches which are selectively switched through a four-out-of-one switch, wherein one branch is an electrically tunable filter branch of 90 MHz-200 MHz, the other branch is an electrically tunable filter branch of 200 MHz-400 MHz, and the other branch is a straight-through branch.
5. The analog receiving component for wideband radio frequency direct sampling according to claim 2, wherein: the fourth analog receiving channel comprises two branches which are selectively switched through an alternative switch, wherein one branch is an electrically tunable filter branch of 960 MHz-1250 MHz, and the other branch is a straight-through branch.
6. The analog receiving component for wideband radio frequency direct sampling according to claim 2, wherein: the first analog receiving channel, the second analog receiving channel and the fourth analog receiving channel comprise an amplitude limiter, a coupler, a numerical control attenuator, a low noise amplifier, a load, a low noise amplifier, an alternative switch, a numerical control attenuator, a low noise amplifier, a load and a low noise amplifier which are sequentially connected.
7. The analog receiving component for wideband radio frequency direct sampling according to claim 2, wherein: the third analog receiving channel comprises an amplitude limiter, a coupler, a numerical control attenuator, a low noise amplifier, a four-out-of-one switch, a numerical control attenuator, a low noise amplifier, a load and a low noise amplifier which are connected in sequence.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114024635A (en) * | 2021-11-17 | 2022-02-08 | 南京长峰航天电子科技有限公司 | Wide signal measurement method and device considering signal-to-noise ratio |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114024635A (en) * | 2021-11-17 | 2022-02-08 | 南京长峰航天电子科技有限公司 | Wide signal measurement method and device considering signal-to-noise ratio |
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