CN214337781U - Control circuit - Google Patents

Abstract

The utility model discloses a control circuit, including switch, first controllable switch, first resistance, second resistance, power chip and processing module, realize through first controllable switch, first resistance and second resistance that the enable end that makes power chip enables or the disability, and then control processing module is gone up the electricity or is lost the electricity. When the switch is closed, the level of the control end of the first controllable switch is pulled down, the first controllable switch is conducted, the enabling end of the power supply chip is enabled, and the processing module is powered on; when the switch is disconnected, the level of the control end of the first controllable switch is pulled high by the second resistor, the first controllable switch is cut off, the enable end of the power chip is disabled, the processing module is powered off, the continuously electrified MCU is not needed to be used for detecting the state of the switch, the processing module is powered on, the power consumption is almost zero when the processing module is not powered on, and the power consumption is reduced.

Description

Control circuit

Technical Field

The utility model relates to a power supply field especially relates to a control circuit.

Background

Referring to fig. 1, fig. 1 is a block diagram of a control circuit in the prior art. Specifically, in the prior art, generally, an MCU (micro controller Unit) is externally connected to control the power on/off of a processing module in an electronic product, and the MCU enables or disables an enable terminal of a power chip by detecting a state of KEY1 and connecting the enable terminal to an enable terminal of the power chip through an output terminal, so as to control the power on/off of the processing module. For example, when KEY1 is closed, the MCU outputs a high level signal to enable the power chip to power up the processing module; when the KEY1 is turned off, the power chip is disabled when the MCU outputs a low level signal to power off the processing module. However, in the prior art, the MCU needs to be in a powered state all the time to monitor the state of the KEY1 in real time, and then controls the power on and off of the processing module, which results in large power consumption.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a control circuit need not use the state that lasts electrified MCU detection switch to make processing module go up the electricity, and the consumption when processing module does not go up the electricity is almost zero, has reduced the consumption.

In order to solve the above technical problem, the utility model provides a control circuit, which comprises a switch, a first controllable switch, a first resistor, a second resistor, a power chip and a processing module;

a first end of the first controllable switch is connected with a power module and a first end of the second resistor respectively, a second end of the first controllable switch is connected with an enabling end of the power chip, an output end of the power chip is connected with the first end of the first resistor and a power supply end of the processing module respectively, a control end of the first controllable switch is connected with the second end of the first resistor, the second end of the second resistor and the first end of the switch respectively, and the second end of the switch is grounded;

the first controllable switch is used for controlling the conduction between a first end and a second end of the first controllable switch when the switch is closed so that the power supply module outputs an enabling signal through the first controllable switch to enable the power supply chip and further supply power to the processing module; and when the switch is switched off, the first end and the second end of the switch are controlled to be cut off, so that the power supply chip is not enabled to power off the processing module.

Preferably, the switch is a patch switch, and further comprises a second controllable switch, a third resistor, a switch detection module and a diode;

a first end of the second controllable switch is connected with an output end of the power chip, a control end of the second controllable switch is respectively connected with a first end of the third resistor and an output end of the processing module, the third resistor and a second end of the second controllable switch are both grounded, a first end of the switch detection module is connected with the first end of the switch, a second end of the switch detection module is connected with an input end of the processing module, an anode of the diode is connected with the first end of the second controllable switch, and a cathode of the diode is connected with the first end of the switch;

the switch detection module is used for outputting a corresponding level signal according to the state of the switch;

the processing module is used for sending a control signal to the second controllable switch according to a level signal of an input end of the processing module after the processing module is powered on, so that the first end and the second end of the second controllable switch are switched on or off, and the processing module is continuously powered on or powered off.

Preferably, the switch detection module comprises a third controllable switch and a fourth resistor;

the first end of the third controllable switch is connected with the output end of the power supply chip through the fourth resistor and serves as the second end of the switch detection module, the second end of the third controllable switch is grounded, and the control end of the third controllable switch serves as the first end of the switch detection module.

Preferably, the switch detection module further includes a fourth controllable switch and a fifth resistor;

the control end of the fourth controllable switch is connected with the first end of the third controllable switch, the first end of the fourth controllable switch is connected with the enable end of the power supply chip through the fifth resistor and serves as the second end of the switch detection module, and the second end of the fourth controllable switch is grounded.

Preferably, an ith diode is arranged between the first end and the second end of the ith controllable switch;

the cathode of the ith diode is connected with the first end of the ith controllable switch, the anode of the ith diode is connected with the first end of the ith controllable switch, and i is an integer larger than 0 and smaller than 5.

Preferably, the second controllable switch, the third controllable switch and the fourth controllable switch are all N-channel metal-oxide semiconductor field effect transistors NMOS transistors;

the gate of the NMOS transistor is the control end of the second controllable switch, the third controllable switch, and the fourth controllable switch, the drain of the NMOS transistor is the first end of the second controllable switch, the third controllable switch, and the fourth controllable switch, and the source of the NMOS transistor is the second end of the second controllable switch, the third controllable switch, and the fourth controllable switch.

Preferably, the second controllable switch, the third controllable switch and the fourth controllable switch are all negative-positive-negative NPN triodes;

the base electrode of the NPN triode is the control end of the second controllable switch, the third controllable switch and the fourth controllable switch, the collector electrode of the NPN triode is the first end of the second controllable switch, the third controllable switch and the fourth controllable switch, and the emitter electrode of the NPN triode is the second end of the second controllable switch, the third controllable switch and the fourth controllable switch.

Preferably, the first controllable switch is a P-channel metal-oxide semiconductor field effect transistor (PMOS) tube;

the grid electrode of the PMOS tube is the control end of the first controllable switch, the source electrode of the PMOS tube is the first end of the first controllable switch, and the drain electrode of the PMOS tube is the second end of the first controllable switch.

Preferably, the method further comprises the following steps:

and the power supply module is connected with the first end of the first controllable module and used for supplying power to the processing module through the first controllable switch and the power supply chip when the first end and the second end of the first controllable switch are conducted.

Preferably, the power module is a rechargeable battery.

The application provides a control circuit, including switch, first controllable switch, first resistance, second resistance, power chip and processing module, realize making the enable end of power chip enable or disable through first controllable switch, first resistance and second resistance, and then control processing module and go up the electricity or lose the electricity. When the switch is closed, the level of the control end of the first controllable switch is pulled down, the first controllable switch is conducted, the enabling end of the power supply chip is enabled, and the processing module is powered on; when the switch is disconnected, the level of the control end of the first controllable switch is pulled high by the second resistor, the first controllable switch is cut off, the enable end of the power chip is disabled, the processing module is powered off, the continuously electrified MCU is not needed to be used for detecting the state of the switch, the processing module is powered on, the power consumption is almost zero when the processing module is not powered on, and the power consumption is reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

FIG. 1 is a block diagram of a control circuit in the prior art;

fig. 2 is a block diagram of a control circuit according to the present invention;

fig. 3 is a schematic diagram of a specific implementation of a control circuit provided by the present invention.

Detailed Description

The core of the utility model is to provide a control circuit, need not use the state that lasts electrified MCU detection switch to make processing module go up the electricity, and the consumption when processing module does not go up the electricity is almost zero, has reduced the consumption.

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Referring to fig. 2, fig. 2 is a block diagram of a control circuit according to the present invention, the control circuit includes a switch, a first controllable switch Q1, a first resistor R1, a second resistor R2, a power chip and a processing module;

a first end of the first controllable switch Q1 is connected to the power module and a first end of the second resistor R2, a second end of the first controllable switch Q1 is connected to an enable end of the power chip, an output end of the power chip is connected to the first end of the first resistor R1 and a power end of the processing module, a control end of the first controllable module is connected to the second end of the first resistor R1, the second end of the second resistor R2 and the first end of the switch, and a second end of the switch is grounded;

the first controllable switch Q1 is used for controlling the conduction between the first end and the second end of the first controllable switch Q1 when the switch is closed, so that the power supply module outputs an enable signal through the first controllable switch Q1 to enable the power supply chip and further supply power to the processing module; and when the switch is turned off, the first end and the second end of the switch are controlled to be cut off, so that the power supply chip is not enabled to power off the processing module.

When the state of a switch is detected by using a single chip (such as an MCU) in the prior art so as to enable an enabling end of a power supply chip, the chip needs to be always in a charged state, and the power consumption is large. In addition, the chip has a large volume, so that the electronic product using the chip has a large volume.

In order to solve the above technical problem, the control circuit provided in the present application enables or disables the enable terminal of the power chip through the first controllable switch Q1, the first resistor R1, and the second resistor R2, and further controls the processing module to be powered on or powered off. Specifically, when the switch is closed, the level of the control terminal of the first controllable switch Q1 is pulled low, and the first controllable switch Q1 is turned on, so that the enable terminal of the power chip is enabled, and the processing module is powered on; when the switch is disconnected, the level of the control end of the first controllable switch Q1 is pulled high by the second resistor R2, the first controllable switch Q1 is cut off, the enable end of the power chip is disabled, so that the processing module is powered off, the state of the switch is detected without using a continuously electrified MCU, the processing module is powered on, the power consumption of the processing module is almost zero when the processing module is not powered on, and the power consumption is reduced.

It should be noted that, in the present application, the first controllable switch Q1 is an electronic device that controls conduction between the first terminal and the second terminal when the control terminal is at a low level, and a specific implementation manner thereof is not limited herein.

In conclusion, the control circuit in the application does not need to use the continuously electrified MCU to detect the state of the switch so as to electrify the processing module, and the power consumption when the processing module is not electrified is almost zero, thereby reducing the power consumption.

On the basis of the above-described embodiment:

referring to fig. 3, fig. 3 is a schematic diagram of a control circuit according to the present invention.

As a preferred embodiment, the switch is a patch switch, and further includes a second controllable switch Q2, a third resistor R3, a switch detection module, and a diode;

a first end of the second controllable switch Q2 is connected with an output end of the power chip, a control end of the second controllable switch Q2 is connected with a first end of the third resistor R3 and an output end of the processing module respectively, second ends of the third resistor R3 and the second controllable switch Q2 are both grounded, a first end of the switch detection module is connected with the first end of the switch, a second end of the switch detection module is connected with an input end of the processing module, an anode of the diode is connected with a first end of the second controllable switch Q2, and a cathode of the diode is connected with the first end of the switch;

the switch detection module is used for outputting a corresponding level signal according to the state of the switch;

the processing module is used for sending a control signal to the second controllable switch Q2 according to the level signal of the input end of the processing module after the processing module is powered on, so that the first end and the second end of the second controllable switch Q2 are switched on or off, and the processing module is continuously powered on or powered off.

Considering that some electronic products may not be toggle switches or patch switches, that is, the switch is turned on and then turned off once, it is necessary to keep the processing module powered on continuously after the switch is turned on and turned off. Therefore, the control module in the present application further includes a second controllable switch Q2, a third resistor R3, a switch detection module, and a diode.

Specifically, the boot process is: when a user presses the switch, the level of the control terminal of the first controllable switch Q1 is pulled low, the first controllable switch Q1 is turned on, the enable terminal of the power chip is enabled, and the processing module is powered on, at this time, the processing module may output a control signal to make the first terminal and the second terminal of the second controllable switch Q2 conductive, so that the control terminal of the first controllable switch Q1 is grounded through the first terminal and the second terminal of the second controllable switch Q2, that is, the control terminal of the first controllable switch Q1 is still pulled low, at this time, the first terminal and the second terminal of the first controllable switch Q1 are still in a conductive state, that is, the processing module remains powered on. When the switch is a patch switch, i.e. after the switch is released, the processing module is still powered on.

Specifically, the shutdown process is: when the processing module is continuously in the power-on state, the state of the switch is fed back to the processing module through the level signal output by the switch detection module, and when a user presses the switch, the level signal output by the switch detection module changes, and when the processing module detects that the level of the input end changes, the output and another control signal cut off the connection between the first end and the second end of the second controllable switch Q2, so that the control end of the first controllable switch Q1 is pulled high through the second resistor R2, that is, the control end of the first controllable switch Q1 is in a high level state, at this time, the connection between the first end and the second end of the first controllable switch Q1 is cut off, that is, the processing module is powered off. When the switch is a patch switch, i.e., after the switch is released, the processing module is in a power-off state.

It should be noted that, when the processing module is in the power-on state, due to the unidirectional conductivity of the diode, it can be avoided that when the first end and the second end of the second controllable switch Q2 are connected, the first end of the switch detection module is pulled low, so that the switch fails to work, and the shutdown function cannot be realized, but the first end of the switch detection module is basically consistent with the output end of the power chip under the action of the first resistor R1, and therefore, the level signal output by the switch detection module is not affected by the second controllable switch Q2.

In conclusion, the mode in the embodiment does not need to use a chip with continuous electrification to control the power-on or power-off of the processing module, so that the power consumption is reduced, and the circuit is simple in composition, simple in software logic and high in reliability.

As a preferred embodiment, the switch detection module includes a third controllable switch Q3 and a fourth resistor R4;

the first end of the third controllable switch Q3 is connected to the output end of the power chip through a fourth resistor R4 and serves as the second end of the switch detection module, the second end of the third controllable switch Q3 is grounded, and the control end of the third controllable switch Q3 serves as the first end of the switch detection module.

As a preferred embodiment, the switch detection module further includes a fourth controllable switch Q4 and a fifth resistor R5;

the control end of the fourth controllable switch Q4 is connected to the first end of the third controllable switch Q3, the first end of the fourth controllable switch Q4 is connected to the enable end of the power chip through the fifth resistor R5, and serves as the second end of the switch detection module, and the second end of the fourth controllable switch Q4 is grounded.

As a preferred embodiment, the second controllable switch Q2, the third controllable switch Q3, and the fourth controllable switch Q4 are NMOS (Negative channel Metal Oxide Semiconductor field effect transistor) transistors;

the gates of the NMOS transistors are the control ends of the second controllable switch Q2, the third controllable switch Q3, and the fourth controllable switch Q4, the drains of the NMOS transistors are the first ends of the second controllable switch Q2, the third controllable switch Q3, and the fourth controllable switch Q4, and the sources of the NMOS transistors are the second ends of the second controllable switch Q2, the third controllable switch Q3, and the fourth controllable switch Q4.

As a preferred embodiment, the second controllable switch Q2, the third controllable switch Q3 and the fourth controllable switch Q4 are NPN (Negative-Positive-Negative) transistors;

the base of the NPN transistor is the control end of the second controllable switch Q2, the third controllable switch Q3, and the fourth controllable switch Q4, the collector of the NPN transistor is the first end of the second controllable switch Q2, the third controllable switch Q3, and the fourth controllable switch Q4, and the emitter of the NPN transistor is the second end of the second controllable switch Q2, the third controllable switch Q3, and the fourth controllable switch Q4.

The application provides a specific implementation manner of a switch detection module, where the switch detection module includes a third controllable switch Q3 and a fourth resistor R4, at this time, when the switch is pressed down and closed, the processing module is powered on, a control end (a gate of an NMOS transistor or a base of an NPN triode) of the third controllable switch Q3 is pulled down to a low level, at this time, conduction is performed between a first end and a second end of the corresponding third controllable switch Q3 (conduction is performed between a drain and a source of the NMOS transistor or between a collector and a base of the NPN triode), at this time, an output end of the processing module detects a low level signal, that is, when an input end of the processing module is a low level signal, the switch is in a closed state; after the switch bounces and turns off, the control terminal (the gate of the NMOS transistor or the base of the NPN transistor) of the third controllable switch Q3 is pulled high to be a high level signal, and at this time, the first terminal and the second terminal of the corresponding third controllable switch Q3 are turned off (between the drain and the source of the NMOS transistor or between the collector and the base of the NPN transistor), and at this time, the output terminal of the processing module detects the high level signal, that is, when the input terminal of the processing module detects the low level signal, the switch is closed, and when the input terminal of the processing module detects the high level signal, the switch is in a cut-off state.

The present application further provides another specific implementation manner of the switch detection module, wherein the switch detection module may further include a fourth controllable switch Q4 and a fifth resistor R5 in addition to the third controllable switch Q3 and the fourth resistor R4. At this time, after the switch is pressed and closed, and the processing module is powered on, the control terminal (the gate of the NMOS transistor or the base of the NPN transistor) of the third controllable switch Q3 is pulled down to a low level, at this time, the first terminal and the second terminal of the corresponding third controllable switch Q3 are turned on (the drain of the NMOS transistor is turned on with the source thereof or the collector of the NPN transistor is turned on with the base thereof), the control terminal of the fourth controllable switch Q4 is pulled down to a low level (the gate of the NMOS transistor or the base of the NPN transistor), the first terminal and the second terminal of the fourth controllable switch Q4 are turned off (the drain of the NMOS transistor is turned off with the source thereof or the collector of the NPN transistor is turned off with the base thereof), and the input terminal of the processing module detects a high level signal; after the switch pops up and turns off, the control terminal (the gate of the NMOS transistor or the base of the NPN transistor) of the third controllable switch Q3 is pulled high to a high level, at this time, the corresponding first terminal and second terminal of the third controllable switch Q3 are turned off (the drain of the NMOS transistor and the source of the NMOS transistor are turned off or the collector of the NPN transistor and the base of the NPN transistor are turned off), the control terminal of the fourth controllable switch Q4 is pulled high to a high level (the gate of the NMOS transistor or the base of the NPN transistor), the first terminal and the second terminal of the fourth controllable switch Q4 are turned on (the drain of the NMOS transistor and the source of the NMOS transistor are turned on or the collector of the NPN transistor and the base of the NPN transistor are turned on), and the input terminal of the processing module detects a low level signal. That is, when the input terminal of the processing module detects a high level signal, the switch is closed, and when a low level signal is detected, the switch is turned off.

It should be noted that, the control circuit in the present application is applied to some electronic products (for example, a mobile phone, a computer, or a tablet), when the power is turned on, the processing module needs to be initialized first, and the initialization needs a certain time, at this time, the power-on process may be set to be a preset time for the switch to be pressed (for convenience of understanding, the preset time is set to 2S in this embodiment), and in this process time, the processing module completes the initialization and controls the second controllable switch Q2 to be continuously turned on after the switch is turned off. When the processing module needs to be powered off, the shutdown process may be set to have another preset time (for convenience of understanding, another preset time in this application is set to 3S) between the switch being pressed and bounced again, and when the processing module detects that the switch is the shutdown signal, the processing module controls the second controllable switch Q2 to power off the switch itself after the switch is turned off. At this time, if the switch is a patch switch, the electronic product may execute different commands according to different preset times or modes of other switches.

For convenience of understanding, in this application, an example is taken, the power on/off key of the mobile phone is a switch in this application, and after the power on/off key of the mobile phone is pressed for a preset time (2S), each module of the mobile phone completes initialization and is powered on to start up; after the time interval of pressing and bouncing the power-on and power-off key after the mobile phone is powered on is larger than the power-off time interval (3S), and after the power-on and power-off key bounces, the mobile phone is controlled to be powered off. At this time, the corresponding command of the power on/off key for pressing and immediately bouncing up can be to make the mobile phone black screen or bright screen, and the application is not limited herein.

In summary, the specific implementation manner of the switch detection module in the present application may output the corresponding level signal according to the state of the switch, so that the processing module can detect the state of the switch, and the implementation logic is simple, and is simple and easy to implement with your way.

As a preferred embodiment, an ith diode is arranged between the first end and the second end of the ith controllable switch;

the cathode of the ith diode is connected with the first end of the ith controllable switch, the anode of the ith diode is connected with the first end of the ith controllable switch, and i is an integer larger than 0 and smaller than 5.

Considering that when the ith controllable switch is an MOS transistor, a parasitic capacitor exists between gate and source electrodes, the ith diode is further arranged between the first end and the second end of the ith controllable switch, and considering that the diode has one-way conductivity, so that the MOS transistor is prevented from being broken down.

As a preferred embodiment, the first controllable switch is a PMOS (positive channel Metal Oxide Semiconductor) transistor;

the grid electrode of the PMOS tube is a control end of the first controllable switch, the source electrode of the PMOS tube is a first end of the first controllable switch, and the drain electrode of the PMOS tube is a second end of the first controllable switch.

The first controllable switch in this application is a switch that is turned on by low level control, and may be, but is not limited to, a PMOS transistor, and this application is not limited thereto.

As a preferred embodiment, the method further comprises the following steps:

and the power supply module is connected with the first end of the first controllable module and used for supplying power to the processing module through the first controllable switch Q1 and the power supply chip when the first end and the second end of the first controllable switch Q1 are conducted.

As a preferred embodiment, the power module is a rechargeable battery.

The application also provides a power module, for control circuit and electronic product power supply, and when considering that electronic product is for the portable electronic product of needs removal, power module in this application can be but not limited to for rechargeable battery, after the electric quantity of battery exhausts, can charge the battery, and the availability ratio of battery is higher.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.

It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A control circuit is characterized by comprising a switch, a first controllable switch, a first resistor, a second resistor, a power chip and a processing module;

a first end of the first controllable switch is connected with a power module and a first end of the second resistor respectively, a second end of the first controllable switch is connected with an enabling end of the power chip, an output end of the power chip is connected with the first end of the first resistor and a power supply end of the processing module respectively, a control end of the first controllable switch is connected with the second end of the first resistor, the second end of the second resistor and the first end of the switch respectively, and the second end of the switch is grounded;

the first controllable switch is used for controlling the conduction between a first end and a second end of the first controllable switch when the switch is closed so that the power supply module outputs an enabling signal through the first controllable switch to enable the power supply chip and further supply power to the processing module; and when the switch is switched off, the first end and the second end of the switch are controlled to be cut off, so that the power supply chip is not enabled to power off the processing module.

2. The control circuit of claim 1, wherein the switch is a patch switch, further comprising a second controllable switch, a third resistor, a switch detection module, and a diode;

a first end of the second controllable switch is connected with an output end of the power chip, a control end of the second controllable switch is respectively connected with a first end of the third resistor and an output end of the processing module, the third resistor and a second end of the second controllable switch are both grounded, a first end of the switch detection module is connected with the first end of the switch, a second end of the switch detection module is connected with an input end of the processing module, an anode of the diode is connected with the first end of the second controllable switch, and a cathode of the diode is connected with the first end of the switch;

the switch detection module is used for outputting a corresponding level signal according to the state of the switch;

the processing module is used for sending a control signal to the second controllable switch according to a level signal of an input end of the processing module after the processing module is powered on, so that the first end and the second end of the second controllable switch are switched on or off, and the processing module is continuously powered on or powered off.

3. The control circuit of claim 2, wherein the switch detection module comprises a third controllable switch and a fourth resistor;

the first end of the third controllable switch is connected with the output end of the power supply chip through the fourth resistor and serves as the second end of the switch detection module, the second end of the third controllable switch is grounded, and the control end of the third controllable switch serves as the first end of the switch detection module.

4. The control circuit of claim 3, wherein the switch detection module further comprises a fourth controllable switch and a fifth resistor;

the control end of the fourth controllable switch is connected with the first end of the third controllable switch, the first end of the fourth controllable switch is connected with the enable end of the power supply chip through the fifth resistor and serves as the second end of the switch detection module, and the second end of the fourth controllable switch is grounded.

5. The control circuit of claim 4, wherein an ith diode is disposed between the first terminal and the second terminal of the ith controllable switch;

the cathode of the ith diode is connected with the first end of the ith controllable switch, the anode of the ith diode is connected with the first end of the ith controllable switch, and i is an integer larger than 0 and smaller than 5.

6. The control circuit of claim 5, wherein the second controllable switch, the third controllable switch, and the fourth controllable switch are all NMOS transistors;

the gate of the NMOS transistor is the control end of the second controllable switch, the third controllable switch, and the fourth controllable switch, the drain of the NMOS transistor is the first end of the second controllable switch, the third controllable switch, and the fourth controllable switch, and the source of the NMOS transistor is the second end of the second controllable switch, the third controllable switch, and the fourth controllable switch.

7. The control circuit of claim 5, wherein the second controllable switch, the third controllable switch, and the fourth controllable switch are all negative-positive-negative NPN transistors;

the base electrode of the NPN triode is the control end of the second controllable switch, the third controllable switch and the fourth controllable switch, the collector electrode of the NPN triode is the first end of the second controllable switch, the third controllable switch and the fourth controllable switch, and the emitter electrode of the NPN triode is the second end of the second controllable switch, the third controllable switch and the fourth controllable switch.

8. The control circuit of any of claims 1-7, wherein the first controllable switch is a P-channel metal-oxide semiconductor field effect transistor (PMOS);

the grid electrode of the PMOS tube is the control end of the first controllable switch, the source electrode of the PMOS tube is the first end of the first controllable switch, and the drain electrode of the PMOS tube is the second end of the first controllable switch.

9. The control circuit of any one of claims 1-7, further comprising:

and the power supply module is connected with the first end of the first controllable module and used for supplying power to the processing module through the first controllable switch and the power supply chip when the first end and the second end of the first controllable switch are conducted.

10. The control circuit of claim 9, wherein the power module is a rechargeable battery.

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