CN214337550U - Hardware protection circuit with high response speed - Google Patents
Hardware protection circuit with high response speed Download PDFInfo
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- CN214337550U CN214337550U CN202120200926.0U CN202120200926U CN214337550U CN 214337550 U CN214337550 U CN 214337550U CN 202120200926 U CN202120200926 U CN 202120200926U CN 214337550 U CN214337550 U CN 214337550U
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Abstract
The utility model relates to a protection circuit field indicates a fast hardware protection circuit of response speed especially, contains: the circuit comprises a comparison flip-flop circuit, a diode D1, a diode D2, a resistor R5, an RS trigger, a third NAND gate, a fourth NAND gate, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a voltage regulator tube Z1 and a triode TR1, wherein the output end of the comparison flip-flop circuit is connected with the cathode of a diode D1; the SD input end of the RS trigger is connected with the anode of the diode D1, the anode of the diode D2 and one end of the resistor R5; the Q output end of the RS trigger is connected with two input pins of the third NAND gate, the output pin of the third NAND gate is connected with one input pin of the fourth NAND gate, the other input pin of the fourth NAND gate is pulled down and grounded through a resistor R7, and the output pin of the fourth NAND gate is connected with the anode of a voltage regulator tube Z1 through a resistor R8. The utility model discloses response speed is fast, can realize a plurality of signals and insert simultaneously moreover, practices thrift the space and improves the reliability.
Description
Technical Field
The utility model relates to a protection circuit field indicates a fast hardware protection circuit of response speed especially.
Background
In the application process of a high-power UV variable frequency power supply, a frequency converter and the like, due to use requirements, a series of protection such as overcurrent, overvoltage, overload and the like is generally needed, signals such as voltage, current and the like are collected into an MCU (microprogrammed control Unit), and an alarm signal is sent out and blocked to be output after comparison and judgment are carried out by a singlechip in the traditional scheme.
The traditional scheme adopts software protection, the MCU is required to collect signals to judge whether protection is needed, and then an instruction is sent to block output, so that the response speed is low.
Disclosure of Invention
In order to solve the above problems, an object of the present invention is to provide a hardware protection circuit with fast response speed, which has fast response speed, and can realize simultaneous access of a plurality of signals, thereby saving space and improving reliability.
Another object of the utility model is to provide a hardware protection circuit that response speed is fast, its circuit structure is simple, has reduced the circuit cost.
In order to achieve the above object, the utility model adopts the following technical scheme:
a hardware protection circuit with fast response speed comprises: the circuit comprises a comparison flip-flop circuit, a diode D1, a diode D2, a resistor R5, an RS trigger, a third NAND gate, a fourth NAND gate, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a voltage regulator tube Z1 and a triode TR1, wherein the output end of the comparison flip-flop circuit is connected with the cathode of a diode D1;
the SD input end of the RS trigger is connected with the anode of the diode D1, the anode of the diode D2 and one end of the resistor R5, and the other end of the resistor R5 is connected with a power supply VCC;
the Q output end of the RS trigger is connected with two input pins of the third NAND gate, the output pin of the third NAND gate is connected with one input pin of the fourth NAND gate, the other input pin of the fourth NAND gate is pulled down and grounded through a resistor R7, and the output pin of the fourth NAND gate is connected with the anode of a voltage regulator tube Z1 through a resistor R8;
the cathode of the voltage regulator tube Z1 is connected with one end of a resistor R9 and is connected with the base electrode of the triode TR1, the other end of the resistor R9 is connected with the emitting electrode of the triode TR1 and the power supply VCC, and the collector electrode of the triode TR1 is grounded through a resistor R10.
Further, the comparison flip circuit includes voltage comparator, resistance R1, resistance R2, resistance R3 and resistance R4, voltage comparator's positive input with resistance R1's one end, resistance R2's one end and resistance R3's one end are connected, and power VCC is connected to resistance R1's the other end, resistance R2's other end ground connection, input signal is connected to voltage comparator's negative input end, voltage comparator's output with resistance R3's the other end and diode D1's negative pole are connected, voltage comparator's output is pulled up to power VCC through resistance R4.
Further, the RS flip-flop comprises a first NAND gate and a second NAND gate, wherein one input pin of the first NAND gate is connected with the anode of the diode D1 and the anode of the diode D2, and the other input pin of the first NAND gate is connected with the output pin of the second NAND gate;
one input pin of the second NAND gate is connected with the MCU, a resistor R6 is connected between the input pin of the second NAND gate and the MCU, the resistor R6 is also connected with a power supply VCC, and the other input pin of the second NAND gate is connected with the output pin of the first NAND gate.
The beneficial effects of the utility model reside in that:
the utility model is a pure hardware circuit action, and has fast response speed; and a plurality of input signals can share one hardware protection circuit, so that the space is saved and the reliability is improved.
The utility model discloses a cooperation of voltage comparator, RS trigger makes hardware protection such as overcurrent, overvoltage, overload can be realized to machine, equipment etc. and circuit structure is simple, has reduced the circuit cost.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention.
The reference numbers illustrate: 101. a first NAND gate; 102. a second NAND gate; 103. a third NAND gate; 104. a fourth NAND gate; 105. a voltage comparator.
Detailed Description
Referring to fig. 1, the present invention relates to a hardware protection circuit with fast response speed, which includes: the circuit comprises a comparison flip-flop circuit, a diode D1, a diode D2, a resistor R5, an RS trigger, a third NAND gate 103, a fourth NAND gate 104, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a voltage regulator tube Z1 and a triode TR1, wherein the output end of the comparison flip-flop circuit is connected with the cathode of a diode D1;
the SD input end of the RS trigger is connected with the anode of the diode D1, the anode of the diode D2 and one end of the resistor R5, and the other end of the resistor R5 is connected with a power supply VCC;
the Q output end of the RS trigger is connected with two input pins of the third NAND gate 103, the output pin of the third NAND gate 103 is connected with one input pin of the fourth NAND gate 104, the other input pin of the fourth NAND gate 104 is pulled down and grounded through a resistor R7, and the output pin of the fourth NAND gate 104 is connected with the anode of a voltage regulator tube Z1 through a resistor R8;
the cathode of the voltage regulator tube Z1 is connected with one end of a resistor R9 and is connected with the base electrode of a triode TR1 together, the other end of the resistor R9 is connected with the emitting electrode of the triode TR1 and a power supply VCC, and the collector electrode of the triode TR1 is grounded through a resistor R10;
in the above scheme, when the signal reaches the inversion condition, the SD input terminal of the RS flip-flop is changed to a low level, and the Q output terminal of the RS flip-flop outputs a high level, and outputs a high level lockout driving signal after being inverted by the third nand gate 103 and the fourth nand gate 104, thereby achieving the protection function.
In this embodiment, the comparison flip-flop circuit includes a voltage comparator 105, a resistor R1, a resistor R2, a resistor R3, and a resistor R4, a positive input terminal of the voltage comparator 105 is connected to one end of the resistor R1, one end of the resistor R2, and one end of the resistor R3, the other end of the resistor R1 is connected to a power source VCC, the other end of the resistor R2 is grounded, a negative input terminal of the voltage comparator 105 is connected to an input signal (i.e., an acquisition signal), an output terminal of the voltage comparator 105 is connected to the other end of the resistor R3 and a cathode of a diode D1, and an output terminal of the voltage comparator 105 is pulled up to the power source VCC through a resistor R4.
In this embodiment, the RS flip-flop includes a first nand gate 101 and a second nand gate 102, one input pin of the first nand gate 101 is connected to the anode of the diode D1 and the anode of the diode D2, and the other input pin of the first nand gate 101 is connected to the output pin of the second nand gate 102;
one input pin of the second nand gate 102 is connected with the MCU, a resistor R6 is connected between one input pin of the second nand gate 102 and the MCU, the resistor R6 is further connected with the power VCC, and the other input pin of the second nand gate 102 is connected with the output pin of the first nand gate 101.
The working principle is as follows:
the resistor R1 and the resistor R2 are connected in series to divide the voltage and are connected to the positive input end of the voltage comparator 105 to be used as a circuit overturning threshold.
The first nand gate 101 and the second nand gate 102 form an RS flip-flop, and a truth table thereof is as follows:
when the circuit is electrified and normally works, the comparison flip-flop does not work, the SD input end of the RS trigger is pulled up through a resistor R5, and the input is high level 1; the CLR signal on the RD input end of the RS trigger is given by the MCU, the CLR signal is given to a low level 0 after being electrified, the Q output end of the RS trigger is effective at the low level 0, then the CLR signal is changed into a high level 1, the Q output end of the RS trigger is also kept effective at the low level 0 of the previous state, the high level 1 is input to be effective after passing through the third NAND gate 103, the other input LOCK signal of the fourth NAND gate 104 is given to the MCU to be a high level 1 signal, the fourth NAND gate 104 outputs effective at the low level 0, the triode TR1 at the rear end is used as a switching tube to be conducted, and the DRV-P signal outputs a high level 1;
in practical application, the DRV-P signal is used as an input enabling end (high level is effective) of a power device driving optocoupler, and at the moment, the power loop can work normally.
When the collected signal exceeds the comparison threshold value, the comparison turnover circuit is turned over, the OC signal is low level 0 at the moment, the SD input end of the RS trigger is low level, the Q output end of the RS trigger is high level 1, the low level 0 is output after passing through the third NAND gate 103, the fourth NAND gate 104 outputs high level 1, the triode TR1 is not conducted, the DRV-P signal is grounded through the resistor R10 and is low level 0, the driving signal is blocked and output, and the protection function is realized.
After the device is protected, the comparison overturning circuit automatically resets, the SD/RD input end of the RS trigger is high level, the output keeps an alarm blocking state, and at the moment, if the MCU gives a low level to the CLR signal, the alarm state can be reset. Another function of the LOCK signal is that software may detect any anomalies and may put the LOCK signal low on the lockout output.
The utility model has the advantages that:
1. the utility model discloses a protection moves as pure hardware circuit action, and response speed is fast, and through the matching circuit parameter, its response time can be low to below 10 us.
2. A plurality of input signals can share one hardware protection circuit, so that the space is saved and the reliability is improved; for example, after two input signals pass through two comparison flip-flop circuits respectively, the two input signals are connected in parallel to an SD input end of an RS trigger through diodes D1 and D2, and OC and OE signals are connected to an MCU so as to identify which signal triggers the alarm; by analogy, diode D1 may connect multiple input signals in parallel with multiple diodes.
3. The utility model realizes hardware protection of over-current, over-voltage, over-load and the like by the cooperation of the voltage comparator 105 and the RS trigger, has simple circuit structure, reduces the circuit cost and increases the reliability; the method is widely applied to industries such as UV variable frequency power supplies, high-power inverter power supplies, frequency converters and the like.
It should be noted that the MCU in this embodiment is an existing device, and does not play a main role in the inventive concept, so detailed description of the MCU is not needed.
The above embodiments are only for describing the preferred embodiments of the present invention, and are not intended to limit the scope of the present invention, and various modifications and improvements made by the technical solution of the present invention by those skilled in the art are all within the scope of the present invention as defined by the claims.
Claims (3)
1. A hardware protection circuit with fast response speed, comprising: the circuit comprises a comparison flip-flop circuit, a diode D1, a diode D2, a resistor R5, an RS trigger, a third NAND gate, a fourth NAND gate, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a voltage regulator tube Z1 and a triode TR1, wherein the output end of the comparison flip-flop circuit is connected with the cathode of a diode D1;
the SD input end of the RS trigger is connected with the anode of the diode D1, the anode of the diode D2 and one end of the resistor R5, and the other end of the resistor R5 is connected with a power supply VCC;
the Q output end of the RS trigger is connected with two input pins of the third NAND gate, the output pin of the third NAND gate is connected with one input pin of the fourth NAND gate, the other input pin of the fourth NAND gate is pulled down and grounded through a resistor R7, and the output pin of the fourth NAND gate is connected with the anode of a voltage regulator tube Z1 through a resistor R8;
the cathode of the voltage regulator tube Z1 is connected with one end of a resistor R9 and is connected with the base electrode of the triode TR1, the other end of the resistor R9 is connected with the emitting electrode of the triode TR1 and the power supply VCC, and the collector electrode of the triode TR1 is grounded through a resistor R10.
2. The hardware protection circuit with fast response of claim 1, wherein the comparison flip-flop circuit comprises a voltage comparator, a resistor R1, a resistor R2, a resistor R3 and a resistor R4, a positive input terminal of the voltage comparator is connected to one end of the resistor R1, one end of the resistor R2 and one end of the resistor R3, the other end of the resistor R1 is connected to the power source VCC, the other end of the resistor R2 is grounded, a negative input terminal of the voltage comparator is connected to the input signal, an output terminal of the voltage comparator is connected to the other end of the resistor R3 and a cathode of the diode D1, and an output terminal of the voltage comparator is pulled up to the power source VCC through the resistor R4.
3. The fast-response hardware protection circuit of claim 2, wherein the RS flip-flop includes a first nand gate and a second nand gate, one input pin of the first nand gate is connected to the anode of the diode D1 and the anode of the diode D2, and the other input pin of the first nand gate is connected to the output pin of the second nand gate;
one input pin of the second NAND gate is connected with the MCU, a resistor R6 is connected between the input pin of the second NAND gate and the MCU, the resistor R6 is also connected with a power supply VCC, and the other input pin of the second NAND gate is connected with the output pin of the first NAND gate.
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CN202120200926.0U CN214337550U (en) | 2021-01-25 | 2021-01-25 | Hardware protection circuit with high response speed |
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CN202120200926.0U CN214337550U (en) | 2021-01-25 | 2021-01-25 | Hardware protection circuit with high response speed |
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