CN214014245U - Repeater drive circuit - Google Patents

Repeater drive circuit Download PDF

Info

Publication number
CN214014245U
CN214014245U CN202120037605.3U CN202120037605U CN214014245U CN 214014245 U CN214014245 U CN 214014245U CN 202120037605 U CN202120037605 U CN 202120037605U CN 214014245 U CN214014245 U CN 214014245U
Authority
CN
China
Prior art keywords
pin
resistor
electrically connected
diode
connector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202120037605.3U
Other languages
Chinese (zh)
Inventor
陈垂泽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen Changjiang Electronic Technology Co ltd
Original Assignee
Xiamen Changjiang Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiamen Changjiang Electronic Technology Co ltd filed Critical Xiamen Changjiang Electronic Technology Co ltd
Priority to CN202120037605.3U priority Critical patent/CN214014245U/en
Application granted granted Critical
Publication of CN214014245U publication Critical patent/CN214014245U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Telephonic Communication Services (AREA)

Abstract

The utility model relates to the technical field of repeaters, in particular to a repeater drive circuit, which comprises an input RJ45 interface, an input network filter circuit, a network transformer, a bridge rectifier circuit, an output network filter circuit, a power supply detection circuit, an output RJ45 interface and a load circuit, wherein the network transformer is respectively electrically connected with the input network filter, the bridge rectifier circuit and the output network filter circuit, the input RJ45 interface is electrically connected with the input network filter circuit, the output RJ45 interface is electrically connected with the output network filter circuit, the power supply detection circuit is respectively electrically connected with the bridge rectifier circuit and the load circuit, through the cooperation between input RJ45 interface, input network filter circuit, network transformer, bridge rectifier circuit, output network filter circuit, power detection circuitry, output RJ45 interface and the load circuit, saved PSE power supply unit's test fixture.

Description

Repeater drive circuit
Technical Field
The utility model relates to a repeater technical field, in particular to repeater drive circuit.
Background
In ethernet communication, a switch device combines a power supply and communication signals on a line to form a PSE device. And the PSE equipment performs signal transmission through a super-five type wire or a common network cable. The network signal transmission is carried out on data terminals such as a network camera (IPC), a wireless AP, an IP telephone and the like, and meanwhile, power supply is carried out on terminal equipment, and the equipment can supply power by directly connecting a network cable without newly carrying out wiring connection of a power line.
Production or maintenance testing becomes more and more complex for such power over ethernet devices. Personnel must test the network communications capabilities of the network devices and also test the power capabilities of the ethernet. In the tests, a complex test flow is required, and meanwhile, a worker needs to frequently plug and unplug a network cable interface to test network communication and equipment power supply respectively.
SUMMERY OF THE UTILITY MODEL
In order to overcome the defects of the prior art, the utility model aims to solve the technical problems that: a repeater driving circuit is provided.
In order to solve the technical problem, the utility model discloses a technical scheme be:
a repeater driving circuit comprises an input RJ45 interface, an input network filter circuit, a network transformer, a bridge rectifier circuit, an output network filter circuit, a power supply detection circuit, an output RJ45 interface and a load circuit, wherein the network transformer is electrically connected with the input network filter circuit, the bridge rectifier circuit and the output network filter circuit respectively, the input RJ45 interface is electrically connected with the input network filter circuit, the output RJ45 interface is electrically connected with the output network filter circuit, and the power supply detection circuit is electrically connected with the bridge rectifier circuit and the load circuit respectively.
Further, the input network filter circuit comprises a transformer L1, a transformer L2, a transformer L3, a transformer L4, a transformer L5, a transformer L6, a transformer L7, a transformer L8, a connector J1, a connector J2 and a chip U1B;
the first pin of the chip U1B, the fourth pin of the chip U1B, the seventh pin of the chip U1B and the tenth pin of the chip U1B are all electrically connected to the bridge rectifier circuit, the second pin of the chip U1B is electrically connected to the first pin of the connector J1 through the primary winding of the transformer L1, the third pin of the chip U1B is electrically connected to the second pin of the connector J1 through the secondary winding of the transformer L1, the fifth pin of the chip U1B is electrically connected to the third pin of the connector J1 through the primary winding of the transformer L3, the sixth pin of the chip U1B is electrically connected to the fourth pin of the connector J1 through the secondary winding of the transformer L3, the eighth pin of the chip U1B is electrically connected to the fifth pin of the connector J1 through the primary winding of the transformer L5, the ninth pin of the chip U1B is electrically connected to the sixth pin of the connector J1 through the secondary winding of the transformer L5, the eleventh pin of the chip U1B is electrically connected to the seventh pin of the connector J1 through the primary winding of the transformer L7, the twelfth pin of the chip U1B is electrically connected to the eighth pin of the connector J1 through the secondary winding of the transformer L7, the forty-seventh pin of the chip U1B is electrically connected to the first pin of the connector J2 through the primary winding of the transformer L2, the forty-sixth pin of the chip U1B is electrically connected to the second pin of the connector J2 through the primary winding of the transformer L2, the forty-fourth pin of the chip U1B is electrically connected to the third pin of the connector J2 through the primary winding of the transformer L4, the forty-third pin of the chip U1B is electrically connected to the fourth pin of the connector J2 through the secondary winding of the transformer L4, the forty-first pin of the chip U1B is electrically connected to the fifth pin of the connector J2 through the primary winding of the transformer L6, the forty-fourth pin of the chip U1B is electrically connected with the sixth pin of the connector J2 through the secondary winding of the transformer L6, the thirty-eighth pin of the chip U1B is electrically connected with the seventh pin of the connector J2 through the primary winding of the transformer L8, the thirty-seventh pin of the chip U1B is electrically connected with the eighth pin of the connector J2 through the secondary winding of the transformer L8, the ninth pin of the connector J1, the tenth pin of the connector J1, the eleventh pin of the connector J1 and the twelfth pin of the connector J1 are all grounded, and the ninth pin of the connector J2, the tenth pin of the connector J2, the eleventh pin of the connector J2 and the twelfth pin of the connector J2 are all grounded.
Further, the bridge rectifier circuit comprises a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, a diode D6, a diode D7 and a diode D8, wherein the anode of the diode D1 is electrically connected with the cathode of the diode D3 and the input network filter circuit respectively, the cathode of the diode D1 is electrically connected with the cathode of the diode D4 and the power supply detection circuit respectively, the anode of the diode D3 is electrically connected with the anode of the diode D7 and the power supply detection circuit respectively, and the anode of the diode D4 is electrically connected with the cathode of the diode D7 and the input network filter circuit respectively;
the anode of the diode D2 is respectively and electrically connected with the cathode of the diode D5 and the input network filter circuit, the cathode of the diode D2 is respectively and electrically connected with the cathode of the diode D6 and the power detection circuit, the anode of the diode D5 is respectively and electrically connected with the anode of the diode D8 and the power detection circuit, and the anode of the diode D6 is respectively and electrically connected with the cathode of the diode D8 and the input network filter circuit.
Further, the power detection circuit includes a resistor R13, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a resistor R25, a capacitor C12, a capacitor C14, a capacitor C15, a diode D9, a diode D10, a diode D12, a light emitting diode D11, a connector J3, a field effect transistor Q1, and a chip U2, wherein a second pin of the chip U2 is electrically connected to one end of the resistor R23, one end of the resistor R22, one end of the resistor R21, and one end of the resistor R20, a fourth pin of the chip U2 is electrically connected to the other end of the resistor R23, the other end of the resistor R22, the other end of the resistor R21, one end of the resistor R21, an anode of the diode D21, and a bridge circuit, and a fifth pin of the chip U21 is electrically connected to the cathode of the light emitting diode R21 and the cathode 21 of the light emitting diode D21, One end of a resistor R24, one end of a capacitor C15, an anode of a diode D12 and a source of a field effect transistor Q1 are electrically connected, a sixth pin of the chip U2 is electrically connected with one end of a resistor R18, the other end of a resistor R18 is electrically connected with one end of a resistor R19, an anode of a diode D9, the other end of a capacitor C14, a cathode of a diode D10, a bridge rectifier circuit, the other end of a capacitor C12, one end of a resistor R13 and a first pin of a connector J3, an anode of the diode D11 is electrically connected with the other end of the resistor R19, the other end of the resistor R13 is electrically connected with the other end of the resistor R24, the other end of the capacitor C15, the cathode of a diode D12 and a gate of the field effect transistor Q1, and a drain of the field effect transistor Q1 is electrically connected with a second pin of the connector J3.
Further, the load circuit includes a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R14, a resistor R15, a resistor R16, a resistor R17, and a capacitor C11, one end of the resistor R9 is electrically connected to one end of the resistor R14 and the power detection circuit, the other end of the resistor R9 is electrically connected to the other end of the resistor R14, one end of the resistor R10, and one end of the resistor R15, the other end of the resistor R10 is electrically connected to the other end of the resistor R15, one end of the resistor R11, and one end of the resistor R16, the other end of the resistor R11 is electrically connected to the other end of the resistor R16, one end of the resistor R12, and one end of the resistor R17, the other end of the resistor R12 is electrically connected to the other end of the resistor R17, one end of the capacitor C11, and the other end of the capacitor C11 is grounded.
The beneficial effects of the utility model reside in that:
the system is characterized in that an input RJ45 interface is arranged to connect a five-class line of the gateway switch equipment to be tested; an input network filter circuit is arranged to filter the input high-speed signal and filter a common-mode interference signal; setting a network transformer to extract the power supply of the Ethernet; setting an output network filter circuit to carry out secondary filtering on the network transmission signal; an output RJ45 interface is arranged, and a network communication signal is transmitted to an instrument for relevant network test; the extracted Ethernet power supply is subjected to direct current shaping through the bridge rectifier circuit, and a power supply with fixed polarity is output; the power supply detection circuit is arranged and used for carrying out voltage detection and current detection on the switch equipment so as to realize a good power supply management function; setting a load circuit to complete power detection of the load; the repeater drive circuit of this scheme design has saved PSE power supply unit's test fixture through the cooperation between input RJ45 interface, input network filter circuit, network transformer, bridge rectifier circuit, output network filter circuit, power detection circuit, output RJ45 interface and the load circuit to can test network signal quality simultaneously, the operation of the tester that has significantly reduced, with low costs and small in size.
Drawings
Fig. 1 is a block diagram illustrating a module connection of a repeater drive circuit according to the present invention;
fig. 2 is a schematic circuit diagram of an input network filter circuit of a repeater drive circuit according to the present invention;
fig. 3 is a schematic circuit diagram of a bridge rectifier circuit of a repeater drive circuit according to the present invention;
fig. 4 is a schematic circuit diagram of a power detection circuit of a repeater drive circuit according to the present invention;
fig. 5 is a schematic circuit diagram of a load circuit of a repeater drive circuit according to the present invention;
description of reference numerals:
1. input RJ45 interface; 2. an input network filter circuit; 3. a network transformer; 4. a bridge rectifier circuit; 5. an output network filter circuit; 6. a power supply detection circuit; 7. an output RJ45 interface; 8. a load circuit.
Detailed Description
In order to explain the technical content, the objects and the effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1, the technical solution provided by the present invention is:
a repeater driving circuit comprises an input RJ45 interface, an input network filter circuit, a network transformer, a bridge rectifier circuit, an output network filter circuit, a power supply detection circuit, an output RJ45 interface and a load circuit, wherein the network transformer is electrically connected with the input network filter circuit, the bridge rectifier circuit and the output network filter circuit respectively, the input RJ45 interface is electrically connected with the input network filter circuit, the output RJ45 interface is electrically connected with the output network filter circuit, and the power supply detection circuit is electrically connected with the bridge rectifier circuit and the load circuit respectively.
From the above description, the beneficial effects of the present invention are:
the system is characterized in that an input RJ45 interface is arranged to connect a five-class line of the gateway switch equipment to be tested; an input network filter circuit is arranged to filter the input high-speed signal and filter a common-mode interference signal; setting a network transformer to extract the power supply of the Ethernet; setting an output network filter circuit to carry out secondary filtering on the network transmission signal; an output RJ45 interface is arranged, and a network communication signal is transmitted to an instrument for relevant network test; the extracted Ethernet power supply is subjected to direct current shaping through the bridge rectifier circuit, and a power supply with fixed polarity is output; the power supply detection circuit is arranged and used for carrying out voltage detection and current detection on the switch equipment so as to realize a good power supply management function; setting a load circuit to complete power detection of the load; the repeater drive circuit of this scheme design has saved PSE power supply unit's test fixture through the cooperation between input RJ45 interface, input network filter circuit, network transformer, bridge rectifier circuit, output network filter circuit, power detection circuit, output RJ45 interface and the load circuit to can test network signal quality simultaneously, the operation of the tester that has significantly reduced, with low costs and small in size.
Further, the input network filter circuit comprises a transformer L1, a transformer L2, a transformer L3, a transformer L4, a transformer L5, a transformer L6, a transformer L7, a transformer L8, a connector J1, a connector J2 and a chip U1B;
the first pin of the chip U1B, the fourth pin of the chip U1B, the seventh pin of the chip U1B and the tenth pin of the chip U1B are all electrically connected to the bridge rectifier circuit, the second pin of the chip U1B is electrically connected to the first pin of the connector J1 through the primary winding of the transformer L1, the third pin of the chip U1B is electrically connected to the second pin of the connector J1 through the secondary winding of the transformer L1, the fifth pin of the chip U1B is electrically connected to the third pin of the connector J1 through the primary winding of the transformer L3, the sixth pin of the chip U1B is electrically connected to the fourth pin of the connector J1 through the secondary winding of the transformer L3, the eighth pin of the chip U1B is electrically connected to the fifth pin of the connector J1 through the primary winding of the transformer L5, the ninth pin of the chip U1B is electrically connected to the sixth pin of the connector J1 through the secondary winding of the transformer L5, the eleventh pin of the chip U1B is electrically connected to the seventh pin of the connector J1 through the primary winding of the transformer L7, the twelfth pin of the chip U1B is electrically connected to the eighth pin of the connector J1 through the secondary winding of the transformer L7, the forty-seventh pin of the chip U1B is electrically connected to the first pin of the connector J2 through the primary winding of the transformer L2, the forty-sixth pin of the chip U1B is electrically connected to the second pin of the connector J2 through the primary winding of the transformer L2, the forty-fourth pin of the chip U1B is electrically connected to the third pin of the connector J2 through the primary winding of the transformer L4, the forty-third pin of the chip U1B is electrically connected to the fourth pin of the connector J2 through the secondary winding of the transformer L4, the forty-first pin of the chip U1B is electrically connected to the fifth pin of the connector J2 through the primary winding of the transformer L6, the forty-fourth pin of the chip U1B is electrically connected with the sixth pin of the connector J2 through the secondary winding of the transformer L6, the thirty-eighth pin of the chip U1B is electrically connected with the seventh pin of the connector J2 through the primary winding of the transformer L8, the thirty-seventh pin of the chip U1B is electrically connected with the eighth pin of the connector J2 through the secondary winding of the transformer L8, the ninth pin of the connector J1, the tenth pin of the connector J1, the eleventh pin of the connector J1 and the twelfth pin of the connector J1 are all grounded, and the ninth pin of the connector J2, the tenth pin of the connector J2, the eleventh pin of the connector J2 and the twelfth pin of the connector J2 are all grounded.
Further, the bridge rectifier circuit comprises a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, a diode D6, a diode D7 and a diode D8, wherein the anode of the diode D1 is electrically connected with the cathode of the diode D3 and the input network filter circuit respectively, the cathode of the diode D1 is electrically connected with the cathode of the diode D4 and the power supply detection circuit respectively, the anode of the diode D3 is electrically connected with the anode of the diode D7 and the power supply detection circuit respectively, and the anode of the diode D4 is electrically connected with the cathode of the diode D7 and the input network filter circuit respectively;
the anode of the diode D2 is respectively and electrically connected with the cathode of the diode D5 and the input network filter circuit, the cathode of the diode D2 is respectively and electrically connected with the cathode of the diode D6 and the power detection circuit, the anode of the diode D5 is respectively and electrically connected with the anode of the diode D8 and the power detection circuit, and the anode of the diode D6 is respectively and electrically connected with the cathode of the diode D8 and the input network filter circuit.
Further, the power detection circuit includes a resistor R13, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a resistor R25, a capacitor C12, a capacitor C14, a capacitor C15, a diode D9, a diode D10, a diode D12, a light emitting diode D11, a connector J3, a field effect transistor Q1, and a chip U2, wherein a second pin of the chip U2 is electrically connected to one end of the resistor R23, one end of the resistor R22, one end of the resistor R21, and one end of the resistor R20, a fourth pin of the chip U2 is electrically connected to the other end of the resistor R23, the other end of the resistor R22, the other end of the resistor R21, one end of the resistor R21, an anode of the diode D21, and a bridge circuit, and a fifth pin of the chip U21 is electrically connected to the cathode of the light emitting diode R21 and the cathode 21 of the light emitting diode D21, One end of a resistor R24, one end of a capacitor C15, an anode of a diode D12 and a source of a field effect transistor Q1 are electrically connected, a sixth pin of the chip U2 is electrically connected with one end of a resistor R18, the other end of the resistor R18 is electrically connected with one end of a resistor R19, an anode of a diode D9, the other end of a capacitor C14, a cathode of a diode D10, a bridge rectifier circuit, the other end of a capacitor C12, one end of a resistor R13 and a first pin of a connector J3 respectively, an anode of the diode D11 is electrically connected with the other end of a resistor R19, the other end of the resistor R13 is electrically connected with the other end of a resistor R24, the other end of a capacitor C15, the cathode of a diode D12 and a gate of a field effect transistor Q1, and a drain of the field effect transistor Q1 is electrically connected with a second pin of the connector J3.
Further, the load circuit includes a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R14, a resistor R15, a resistor R16, a resistor R17, and a capacitor C11, one end of the resistor R9 is electrically connected to one end of the resistor R14 and the power detection circuit, the other end of the resistor R9 is electrically connected to the other end of the resistor R14, one end of the resistor R10, and one end of the resistor R15, the other end of the resistor R10 is electrically connected to the other end of the resistor R15, one end of the resistor R11, and one end of the resistor R16, the other end of the resistor R11 is electrically connected to the other end of the resistor R16, one end of the resistor R12, and one end of the resistor R17, the other end of the resistor R12 is electrically connected to the other end of the resistor R17, one end of the capacitor C11, and the other end of the capacitor C11.
Referring to fig. 1 to 5, a first embodiment of the present invention is:
referring to fig. 1, a repeater driving circuit includes an input RJ45 interface 1, an input network filter circuit 2, a network transformer 3, a bridge rectifier circuit 4, an output network filter circuit 5, a power detection circuit 6, an output RJ45 interface 7, and a load circuit 8, where the network transformer 3 is electrically connected to the input network filter, the bridge rectifier circuit 4, and the output network filter circuit 5, the input RJ45 interface 1 is electrically connected to the input network filter circuit 2, the output RJ45 interface 7is electrically connected to the output network filter circuit 5, and the power detection circuit 6 is electrically connected to the bridge rectifier circuit 4 and the load circuit 8, respectively.
Referring to fig. 2, the input network filter circuit 2 includes a transformer L1, a transformer L2, a transformer L3, a transformer L4, a transformer L5, a transformer L6, a transformer L7, a transformer L8, a connector J1, a connector J2 (model number FRJ45004-1100K6K02C0), and a chip U1B (model number G4801S);
the first pin of the chip U1B, the fourth pin of the chip U1B, the seventh pin of the chip U1B and the tenth pin of the chip U1B are all electrically connected with the bridge rectifier circuit 4, the second pin of the chip U1B is electrically connected with the first pin of the connector J1 through the primary winding of the transformer L1, the third pin of the chip U1B is electrically connected with the second pin of the connector J1 through the secondary winding of the transformer L1, the fifth pin of the chip U1B is electrically connected with the third pin of the connector J1 through the primary winding of the transformer L3, the sixth pin of the chip U1B is electrically connected with the fourth pin of the connector J1 through the secondary winding of the transformer L3, the eighth pin of the chip U1B is electrically connected with the fifth pin of the connector J1 through the primary winding of the transformer L5, the ninth pin of the chip U1B is electrically connected with the sixth pin of the connector J1 through the secondary winding of the transformer L5, the eleventh pin of the chip U1B is electrically connected to the seventh pin of the connector J1 through the primary winding of the transformer L7, the twelfth pin of the chip U1B is electrically connected to the eighth pin of the connector J1 through the secondary winding of the transformer L7, the forty-seventh pin of the chip U1B is electrically connected to the first pin of the connector J2 through the primary winding of the transformer L2, the forty-sixth pin of the chip U1B is electrically connected to the second pin of the connector J2 through the primary winding of the transformer L2, the forty-fourth pin of the chip U1B is electrically connected to the third pin of the connector J2 through the primary winding of the transformer L4, the forty-third pin of the chip U1B is electrically connected to the fourth pin of the connector J2 through the secondary winding of the transformer L4, the forty-first pin of the chip U1B is electrically connected to the fifth pin of the connector J2 through the primary winding of the transformer L6, the forty-fourth pin of the chip U1B is electrically connected with the sixth pin of the connector J2 through the secondary winding of the transformer L6, the thirty-eighth pin of the chip U1B is electrically connected with the seventh pin of the connector J2 through the primary winding of the transformer L8, the thirty-seventh pin of the chip U1B is electrically connected with the eighth pin of the connector J2 through the secondary winding of the transformer L8, the ninth pin of the connector J1, the tenth pin of the connector J1, the eleventh pin of the connector J1 and the twelfth pin of the connector J1 are all grounded, and the ninth pin of the connector J2, the tenth pin of the connector J2, the eleventh pin of the connector J2 and the twelfth pin of the connector J2 are all grounded.
Referring to fig. 3, the bridge rectifier circuit 4 includes a diode D1 (model B1100), a diode D2 (model B1100), a diode D3 (model B1100), a diode D4 (model B1100), a diode D5 (model B1100), a diode D6 (model B1100), a diode D7 (model B1100), and a diode D8 (model B1100), wherein an anode of the diode D1 is electrically connected to a cathode of the diode D3 and the input network filter circuit 2, a cathode of the diode D1 is electrically connected to a cathode of the diode D4 and the power detection circuit 6, an anode of the diode D3 is electrically connected to an anode of the diode D7 and the power detection circuit 6, and an anode of the diode D4 is electrically connected to a cathode of the diode D7 and the input network filter circuit 2;
the anode of the diode D2 is electrically connected to the cathode of the diode D5 and the input network filter circuit 2, the cathode of the diode D2 is electrically connected to the cathode of the diode D6 and the power detection circuit 6, the anode of the diode D5 is electrically connected to the anode of the diode D8 and the power detection circuit 6, and the anode of the diode D6 is electrically connected to the cathode of the diode D8 and the input network filter circuit 2.
Referring to fig. 4, the power detection circuit 6 includes a resistor R13 (with a resistance of 100k Ω), a resistor R18 (with a resistance of NC), a resistor R19 (with a resistance of 47k Ω), a resistor R20 (with a resistance of NC), a resistor R21 (with a resistance of NC), a resistor R22 (with a resistance of NC), a resistor R23 (with a resistance of 30.9 Ω), a resistor R24, a resistor R25 (with a resistance of NC), a capacitor C12 (with a capacitance of 22 μ F), a capacitor C14 (with a capacitance of 0.1 μ F), a capacitor C15 (with a capacitance of 1 μ F), a diode D9 (with a model SMAJ58, A), a diode D10 (with a model SMAJ58A), a diode D12 (with a model MM3Z12VT1), a light emitting diode D11, a connector J11 (with a model PH-2A model 11), a fet Q11 (with a model IRF 3710), and a chip U11 (with a model LTC 4272), and a resistor R72 at one end of the second chip R4272, respectively, One end of a resistor R21 is electrically connected with one end of a resistor R20, a fourth pin of the chip U2 is respectively electrically connected with the other end of the resistor R23, the other end of the resistor R22, the other end of the resistor R21, the other end of the resistor R20, one end of a resistor R25, one end of a capacitor C14, an anode of a diode D10 and the bridge rectifier circuit 4, a fifth pin of the chip U2 is respectively electrically connected with the other end of the resistor R25, a cathode of the light emitting diode D11, one end of a capacitor C12, one end of a resistor R24, one end of a capacitor C15, an anode of a diode D12 and a source of the field effect transistor Q1, a sixth pin of the chip U2 is electrically connected with one end of a resistor R18, the other end of the resistor R18 is respectively electrically connected with one end of a resistor R19, an anode of a diode D9, the other end of a capacitor C14, a cathode of a diode D10, a bridge rectifier circuit 4, the other end of a capacitor C12, one end of a terminal of a resistor R13 and a first connector 3, the anode of the diode D11 is electrically connected with the other end of the resistor R19, the other end of the resistor R13 is electrically connected with the other end of the resistor R24, the other end of the capacitor C15, the cathode of the diode D12 and the gate of the field-effect transistor Q1, and the drain of the field-effect transistor Q1 is electrically connected with the second pin of the connector J3.
Referring to fig. 5, the load circuit 8 includes a resistor R9 (with a resistance of 51 Ω), a resistor R10 (with a resistance of 51 Ω), a resistor R11 (with a resistance of 51 Ω), a resistor R12 (with a resistance of 51 Ω), a resistor R14 (with a resistance of NC), a resistor R15 (with a resistance of NC), a resistor R16 (with a resistance of NC), a resistor R17 (with a resistance of NC), and a capacitor C11 (with a capacitance of 1nF), one end of the resistor R9 is electrically connected to one end of the resistor R14 and the power detection circuit 6, the other end of the resistor R9 is electrically connected to the other end of the resistor R14, one end of the resistor R10 and one end of the resistor R15, the other end of the resistor R10 is electrically connected to the other end of the resistor R15, one end of the resistor R11 and one end of the resistor R16, the other end of the resistor R11 is electrically connected to the other end of the resistor R16, one end of the resistor R12 and one end of the resistor R17, the other end of the resistor R12 is electrically connected with the other end of the resistor R17, one end of the capacitor C11 and the power detection circuit 6 respectively, and the other end of the capacitor C11 is grounded.
The working principle of the repeater driving circuit is as follows:
various high-frequency circuits, digital circuits and analog circuits are mixed in signals of the high-speed transmission circuit, and when the high-speed transmission circuit works, a large amount of high-frequency electromagnetic waves are generated to interfere with each other, namely EMI. These EMI may also be emitted through the motherboard wiring or external cables, causing electromagnetic radiation pollution, and affecting the normal operation of other electronic devices. Connector J1 connects signal cables and these EMI are introduced to the PCB board along with the transmission signals, so by using transformer L1, transformer L3, transformer L5 and transformer L7, these devices are called common mode inductors. After passing through the transformer L1, an interference current caused by a potential difference between a differential line (two signal lines) for transmitting signals and a PCB ground flows through each of the two signal lines in half and in the same direction, and the ground is used as a common circuit. A good EMI common mode rejection is formed. The other transformers L3, L5 and L7 have the same principle; if the common mode current on the high-speed interface wiring is not filtered by attenuation, the common mode interference current can easily generate electromagnetic radiation through the interface data line, thereby affecting the signal transmission.
During the voltage transmission process, the polarities of the nodes CT1, CT2, CT3 and CT4 from which the voltage is transmitted are not determined, and the transmission polarity problem is compatible by using a rectifier bridge circuit. The combined path nodes VIN1+ and VIN 1-are formed to take out voltage, so that the network transmission equipment can be compatible with all network transmission equipment on the market.
When the CT1 is a positive pole and the CT2 is a negative pole, the diode D2 and the diode D8 are turned on, and the diode D5 and the diode D6 are turned off, so that the positive pole voltage is transmitted to the VIN1+ through the diode D2, and the negative pole voltage VIN-forms a loop through the diode D8; when the CT1 is a negative electrode and the CT2 is a positive electrode, the diode D5 and the diode D6 are turned on, and the diode D2 and the diode D8 are turned off, so that the positive electrode voltage is transmitted to the VIN1+ through the diode D6, and the negative electrode voltage VIN-is transmitted to the diode D5 through the diode D5 to form a loop, which is compatible with the problem of transmission polarity, and finally, the VIN1+ is taken as the positive electrode and the VIN1 is taken as the negative electrode no matter how the input voltage lines are connected.
When the CT3 is a positive pole and the CT4 is a negative pole, the diode D1 and the diode D7 are turned on, and the diode D3 and the diode D4 are turned off, so that the positive pole voltage is transmitted to the VIN1+ through the diode D1, and the negative pole voltage VIN-passes through the diode D7 to form a loop; when the CT3 is a negative electrode and the CT4 is a positive electrode, the diode D3 and the diode D4 are turned on, and the diode D1 and the diode D7 are turned off, so that the positive electrode voltage is transmitted to the VIN1+ through the diode D4, and the negative electrode voltage VIN-is transmitted to the diode D3 through the diode D3 to form a loop, which is compatible with the problem of transmission polarity, and finally, the VIN1+ is taken as the positive electrode and the VIN1 is taken as the negative electrode no matter how the input voltage lines are connected.
In the specification of network transmission, there are many non-standard connections, and an operator cannot determine that when a voltage signal is connected with a connector J1, the voltage signal may be a voltage at CT1 and CT2 or a voltage at CT3 and CT4, so that the voltage signal can be transmitted to VIN1+ and VIN 1-by node combination of the voltages, and the combined path nodes VIN1+ and VIN 1-are formed to take out the voltage, so that all network transmission equipment on the market can be compatible.
The chip U2 is selected from LTC4257 chip for IEEE
Figure BDA0002888108830000111
And the complete power interface port of the powered device performs voltage detection and current detection on the power supply device of the PSE, so that a good power management function is realized.
The resistor R20, the resistor R21, the resistor R22 and the resistor R23 can classify and set the power supply load power.
The compatibility test of the resistor R20, the resistor R21, the resistor R22 and the resistor R23 is shown in table 1:
grading Detecting load power (W) Detecting load current (mA) LTC4257 selects resistance value
1 0.44-12.95 <5 Open(NC)
2 0.44-3.84 10.5 124Ω
3 3.84-6.49 18.5 68.1Ω
4 6.49-12.95 28 30.9Ω
TABLE 1
The compatibility test in the above table is generally finally performed by using level 1, resistor selection open (nc), i.e. the resistor R23 is not welded.
In the use of the circuit, if a component is damaged or has no function, the voltage and the current can further damage the circuit, so that the design of the circuit needs to be protected to a certain extent, and by arranging the diode D9 and the diode D10, when the polarity of the voltage is reversed, the current is led to the common ground through the diode D9 and the diode D10, so that the protection effect on other components is achieved.
When the circuit is powered on by POE, the current reaches the light emitting diode D11 through the resistor R19, and the light emitting diode D11 is lit up to indicate that the circuit is working normally.
The field effect transistor Q1 carries out chip control of switching on and off on the working circuit, the resistor R13 and the resistor R24 carry out grid power supply on the field effect transistor Q1, the field effect transistor Q1 is conducted, and the diode D12 is used for stably supplying power; the capacitor C15 can reduce the effect of parasitic capacitance caused by the fet Q1.
The power detection of the load is completed by selecting 4 high-power cement resistors from a resistor R9, a resistor R10, a resistor R11 and a resistor R12, and because the power detection of 13W is realized, 4 large resistors of 51 omega are selected, the total number of 200 omega is 200 omega, and the load is about 14.5W in a 54V system according to P-U/R; in a 48V system, there is approximately 11.5W load.
To sum up, the utility model provides a repeater drive circuit, which is used for connecting the five types of wires of the gateway switch equipment to be tested by setting the input RJ45 interface; an input network filter circuit is arranged to filter the input high-speed signal and filter a common-mode interference signal; setting a network transformer to extract the power supply of the Ethernet; setting an output network filter circuit to carry out secondary filtering on the network transmission signal; an output RJ45 interface is arranged, and a network communication signal is transmitted to an instrument for relevant network test; the extracted Ethernet power supply is subjected to direct current shaping through the bridge rectifier circuit, and a power supply with fixed polarity is output; the power supply detection circuit is arranged and used for carrying out voltage detection and current detection on the switch equipment so as to realize a good power supply management function; setting a load circuit to complete power detection of the load; the repeater drive circuit of this scheme design has saved PSE power supply unit's test fixture through the cooperation between input RJ45 interface, input network filter circuit, network transformer, bridge rectifier circuit, output network filter circuit, power detection circuit, output RJ45 interface and the load circuit to can test network signal quality simultaneously, the operation of the tester that has significantly reduced, with low costs and small in size.
The above mentioned is only the embodiment of the present invention, and not the limitation of the patent scope of the present invention, all the equivalent transformations made by the contents of the specification and the drawings, or the direct or indirect application in the related technical field, are included in the patent protection scope of the present invention.

Claims (5)

1. A repeater drive circuit is characterized by comprising an input RJ45 interface, an input network filter circuit, a network transformer, a bridge rectifier circuit, an output network filter circuit, a power supply detection circuit, an output RJ45 interface and a load circuit, wherein the network transformer is electrically connected with the input network filter circuit, the bridge rectifier circuit and the output network filter circuit respectively, the input RJ45 interface is electrically connected with the input network filter circuit, the output RJ45 interface is electrically connected with the output network filter circuit, and the power supply detection circuit is electrically connected with the bridge rectifier circuit and the load circuit respectively.
2. The repeater drive circuit according to claim 1, wherein the input network filter circuit comprises a transformer L1, a transformer L2, a transformer L3, a transformer L4, a transformer L5, a transformer L6, a transformer L7, a transformer L8, a connector J1, a connector J2, and a chip U1B;
the first pin of the chip U1B, the fourth pin of the chip U1B, the seventh pin of the chip U1B and the tenth pin of the chip U1B are all electrically connected to the bridge rectifier circuit, the second pin of the chip U1B is electrically connected to the first pin of the connector J1 through the primary winding of the transformer L1, the third pin of the chip U1B is electrically connected to the second pin of the connector J1 through the secondary winding of the transformer L1, the fifth pin of the chip U1B is electrically connected to the third pin of the connector J1 through the primary winding of the transformer L3, the sixth pin of the chip U1B is electrically connected to the fourth pin of the connector J1 through the secondary winding of the transformer L3, the eighth pin of the chip U1B is electrically connected to the fifth pin of the connector J1 through the primary winding of the transformer L5, the ninth pin of the chip U1B is electrically connected to the sixth pin of the connector J1 through the secondary winding of the transformer L5, the eleventh pin of the chip U1B is electrically connected to the seventh pin of the connector J1 through the primary winding of the transformer L7, the twelfth pin of the chip U1B is electrically connected to the eighth pin of the connector J1 through the secondary winding of the transformer L7, the forty-seventh pin of the chip U1B is electrically connected to the first pin of the connector J2 through the primary winding of the transformer L2, the forty-sixth pin of the chip U1B is electrically connected to the second pin of the connector J2 through the primary winding of the transformer L2, the forty-fourth pin of the chip U1B is electrically connected to the third pin of the connector J2 through the primary winding of the transformer L4, the forty-third pin of the chip U1B is electrically connected to the fourth pin of the connector J2 through the secondary winding of the transformer L4, the forty-first pin of the chip U1B is electrically connected to the fifth pin of the connector J2 through the primary winding of the transformer L6, the forty-fourth pin of the chip U1B is electrically connected with the sixth pin of the connector J2 through the secondary winding of the transformer L6, the thirty-eighth pin of the chip U1B is electrically connected with the seventh pin of the connector J2 through the primary winding of the transformer L8, the thirty-seventh pin of the chip U1B is electrically connected with the eighth pin of the connector J2 through the secondary winding of the transformer L8, the ninth pin of the connector J1, the tenth pin of the connector J1, the eleventh pin of the connector J1 and the twelfth pin of the connector J1 are all grounded, and the ninth pin of the connector J2, the tenth pin of the connector J2, the eleventh pin of the connector J2 and the twelfth pin of the connector J2 are all grounded.
3. The repeater driving circuit according to claim 1, wherein the bridge circuit comprises a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, a diode D6, a diode D7 and a diode D8, wherein the anode of the diode D1 is electrically connected to the cathode of the diode D3 and the input network filter circuit, the cathode of the diode D1 is electrically connected to the cathode of the diode D4 and the power detection circuit, the anode of the diode D3 is electrically connected to the anode of the diode D7 and the power detection circuit, and the anode of the diode D4 is electrically connected to the cathode of the diode D7 and the input network filter circuit;
the anode of the diode D2 is respectively and electrically connected with the cathode of the diode D5 and the input network filter circuit, the cathode of the diode D2 is respectively and electrically connected with the cathode of the diode D6 and the power detection circuit, the anode of the diode D5 is respectively and electrically connected with the anode of the diode D8 and the power detection circuit, and the anode of the diode D6 is respectively and electrically connected with the cathode of the diode D8 and the input network filter circuit.
4. The repeater driving circuit according to claim 1, wherein the power detection circuit comprises a resistor R, a capacitor C, a diode D, a light emitting diode D, a connector J, a field effect transistor Q and a chip U, wherein a second pin of the chip U is electrically connected with one end of the resistor R, one end of the resistor R and one end of the resistor R respectively, a fourth pin of the chip U is electrically connected with the other end of the resistor R, one end of the capacitor C, an anode of the diode D and a rectifier circuit respectively, and a fifth pin of the chip U is electrically connected with the other end of the resistor R, the anode of the bridge circuit and the rectifier circuit respectively, A cathode of the light emitting diode D11, one end of the capacitor C12, one end of the resistor R24, one end of the capacitor C15, an anode of the diode D12 and a source of the fet Q1 are electrically connected, a sixth pin of the chip U2 is electrically connected to one end of the resistor R18, the other end of the resistor R18 is electrically connected to one end of the resistor R19, an anode of the diode D9, the other end of the capacitor C14, a cathode of the diode D10, the bridge rectifier circuit, the other end of the capacitor C12, one end of the resistor R13 and a first pin of the connector J3, an anode of the diode D11 is electrically connected to the other end of the resistor R19, the other end of the resistor R13 is electrically connected to the other end of the resistor R24, the other end of the capacitor C15, a cathode of the diode D12 and a gate of the fet Q1, and a drain of the fet Q1 is electrically connected to a second pin of the connector J3.
5. The repeater drive circuit according to claim 1, wherein the load circuit includes a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R14, a resistor R15, a resistor R16, a resistor R17, and a capacitor C11, one end of the resistor R9 is electrically connected with one end of the resistor R14 and the power detection circuit respectively, the other end of the resistor R9 is respectively and electrically connected with the other end of the resistor R14, one end of the resistor R10 and one end of the resistor R15, the other end of the resistor R10 is respectively and electrically connected with the other end of the resistor R15, one end of the resistor R11 and one end of the resistor R16, the other end of the resistor R11 is respectively and electrically connected with the other end of the resistor R16, one end of the resistor R12 and one end of the resistor R17, the other end of the resistor R12 is respectively and electrically connected with the other end of the resistor R17, one end of the capacitor C11 and the power detection circuit, and the other end of the capacitor C11 is grounded.
CN202120037605.3U 2021-01-07 2021-01-07 Repeater drive circuit Active CN214014245U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202120037605.3U CN214014245U (en) 2021-01-07 2021-01-07 Repeater drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202120037605.3U CN214014245U (en) 2021-01-07 2021-01-07 Repeater drive circuit

Publications (1)

Publication Number Publication Date
CN214014245U true CN214014245U (en) 2021-08-20

Family

ID=77294959

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202120037605.3U Active CN214014245U (en) 2021-01-07 2021-01-07 Repeater drive circuit

Country Status (1)

Country Link
CN (1) CN214014245U (en)

Similar Documents

Publication Publication Date Title
CN200959605Y (en) Interface circuit of electric connector
US6492880B1 (en) Common mode termination
CN201319606Y (en) Testing treatment tool
CN102904235A (en) Ethernet power receiving circuit and electrostatic protection circuit thereof
CN102842903A (en) Power over Ethernet system and surge protection device thereof
CN103795054A (en) Lightning protection system and method of direct-current remote supply power equipment
CN204810286U (en) Discernment supply circuit and ethernet power supply unit, system
CN214014245U (en) Repeater drive circuit
US20140160608A1 (en) Surge protective network signal processing circuit assembly
US9722417B2 (en) Transmission circuit for ethernet
US9379919B2 (en) Transmission circuit for ethernet and protection component set thereof
CN205864444U (en) The POE detection output circuit of a kind of WIFI equipment and WIFI equipment
CN110739665A (en) Protection circuit and switching power supply
CN107579832B (en) Ethernet port communication circuit without network transformer
CN109728916A (en) A kind of Power over Ethernet single port extender of POE technology
CN108737673A (en) Network telephone equipment, external connection card and communication method of network telephone equipment
CN206461349U (en) PoE surge prevention protection circuits
CN207853914U (en) PoE equipment without network transformer
CN106100128A (en) Active power distribution network intelligent terminal&#39;s accumulator isolation monitoring device
CN105576641A (en) CAN-BUS protection circuit and motion control system applying same
CN219477849U (en) Separated network transformer circuit and network interface circuit
CN206743267U (en) A kind of non-isolated power supply circuit and equipment
CN107809318B (en) Method for adding POE function to equipment
CN205407248U (en) CAN-BUS protection circuit and motion control system applying same
CN213990136U (en) Multi-port shared piezoresistor-oriented PSE interface lightning stroke protection circuit

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant
PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of utility model: A repeater driving circuit

Effective date of registration: 20220607

Granted publication date: 20210820

Pledgee: Xiamen pilot Free Trade Zone Branch of Bank of China Ltd.

Pledgor: XIAMEN CHANGJIANG ELECTRONIC TECHNOLOGY Co.,Ltd.

Registration number: Y2022980007207

PE01 Entry into force of the registration of the contract for pledge of patent right