CN213960031U - Circuit structure suitable for realizing radio frequency gain automatic switching control at receiving end of vector network analyzer - Google Patents
Circuit structure suitable for realizing radio frequency gain automatic switching control at receiving end of vector network analyzer Download PDFInfo
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- CN213960031U CN213960031U CN202023017494.4U CN202023017494U CN213960031U CN 213960031 U CN213960031 U CN 213960031U CN 202023017494 U CN202023017494 U CN 202023017494U CN 213960031 U CN213960031 U CN 213960031U
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Abstract
The utility model relates to a circuit structure suitable for vector network analysis appearance receiving terminal realizes radio frequency gain automatic switch control, including first order decay network, second level decay network, third level decay network, amplifier and two SPDT switches, first order decay network constitute by two attenuators of different decrement, connect respectively between the SPDT switch, the SPDT switch of second level decay network and first level decay network output link to each other, the amplifier connect between second level decay network and third level decay network. Adopted the utility model discloses a circuit structure suitable for vector network analyzer receiving terminal realizes radio frequency gain automatic switch-over control carries out gain control to the radio frequency signal of vector network analyzer receiver and handles. The power compensation is carried out on the radio frequency small signal under the condition of not changing the index of the large signal, so that the amplitude of the corresponding intermediate frequency signal in the small signal is improved, the dynamic range in the small signal state is further improved, and the trace noise can be improved.
Description
Technical Field
The utility model relates to a communication test instrument and meter technical field especially relates to vector network analyzer's receiver field, specifically indicates a circuit structure suitable for vector network analyzer receiving terminal realizes radio frequency gain automatic switch-over control.
Background
The vector network analyzer is used as a universal S parameter testing instrument, is widely applied to various scientific research institutions, laboratories and production lines for S parameter measurement, and is applied to various antenna tests, cavity filter tests, dielectric filter tests, circulator tests, coupler tests, splitter combiner tests and the like. The cavity filter has high requirements on indexes such as a dynamic range, trace noise and the like of the vector network analyzer, and particularly under the condition of small signal measurement, the accuracy of a measurement result is greatly influenced by the dynamic range and the trace noise indexes of the vector network analyzer. The output power of the port of the vector network analyzer generally has a wider range, such as-50 dBm- +10dBm, when the output power of the port of the vector network analyzer is set to-30 dBm or even-50 dBm, the dynamic range of the vector network analyzer becomes smaller, and the trace noise becomes very jittering, so that the out-band rejection and in-band insertion loss indexes of the cavity filter cannot be accurately measured.
To improve the dynamic range, instrumentation companies often adopt a method of adding a gain control circuit to the if signal link so that the if signal amplitude reaching the ADC is increased to the maximum range of the ADC at best without overflowing. In a conventional gain control circuit, as shown in fig. 1, a small signal is obtained by sampling an intermediate frequency main signal through a power divider or a coupler, the small signal is detected by a detector and converted into a digital signal, the digital signal is compared with a preset value by a comparator, and the attenuation amplitude of an attenuator or the gain of an amplifier is controlled according to the comparison result, so that the amplitude of the intermediate frequency signal is changed. The method has the disadvantages that the circuit is large, the control process is complex, the circuit comprises an analog circuit and a digital circuit, and new interference is easily introduced to the intermediate frequency signal.
SUMMERY OF THE UTILITY MODEL
The utility model aims at overcoming the shortcoming of above-mentioned prior art, providing one kind and satisfying easy and simple to handle, the flexibility is high, application scope is comparatively extensive be applicable to the circuit structure that vector network analyzer receiving terminal realized radio frequency gain automatic switch-over control.
In order to achieve the above object, the utility model discloses a circuit structure suitable for vector network analyzer receiving terminal realizes radio frequency gain automatic switch control as follows:
the circuit structure suitable for realizing radio frequency gain automatic switching control at the receiving end of a vector network analyzer is mainly characterized by comprising a first-stage attenuation network, a second-stage attenuation network, a third-stage attenuation network, an amplifier and two SPDT switches, wherein the first-stage attenuation network consists of two attenuators with different attenuation amounts and is respectively connected between the SPDT switches; the circuit structure also comprises a port protection circuit which is connected with the SPDT switch at the input end of the first-stage attenuation network and receives an input signal; the circuit structure further comprises an upper computer and an ADSP circuit, the upper computer is connected with the ADSP circuit, the ADSP circuit outputs signals to the switch control signals, and the circuit structure controls two-gear high and low power through automatic gain.
Preferably, in the circuit structure, under the condition that the upper computer outputs a large signal, the ADSP circuit judges according to the power setting value of the upper computer, sends out a switch control signal, switches the two SPDT switches to the large-attenuation network, attenuates the signal, and amplifies the signal to a pre-attenuation state through the amplifier.
Preferably, in the circuit structure, under the condition that the upper computer sets and outputs a small signal, the ADSP circuit judges through the power setting value of the upper computer, sends out a switch control signal, switches the two SPDT switches to a small attenuation state, performs small attenuation or no attenuation on the signal, and amplifies and outputs the signal through the amplifier.
Preferably, the first-stage attenuation network, the second-stage attenuation network and the third-stage attenuation network are pi-type attenuation networks.
Preferably, the second-stage attenuation network and the third-stage attenuation network are small-attenuation-quantity attenuation networks, and are used for performing input and output matching debugging and auxiliary debugging on flatness in a broadband range on the amplifier.
Adopted the utility model discloses a circuit structure suitable for vector network analysis appearance receiving terminal realizes radio frequency gain automatic switch-over control is different from traditional automatic gain control circuit. The utility model discloses an automatic gain control circuit carries out gain control to the radio frequency signal of vector network analyzer receiver and handles. When the small-signal amplification compensation circuit works, the small signal is amplified and compensated, and the large signal is not amplified, so that the corresponding intermediate-frequency signal amplitude is improved when the small signal is generated by performing power compensation on the radio-frequency small signal under the condition of not changing the index of the large signal, thereby improving the dynamic range under the state of the small signal and improving the trace noise.
Drawings
Fig. 1 is a block diagram of a prior art gain control.
Fig. 2 is the utility model discloses a circuit structure's traditional gain control block diagram suitable for vector network analyzer receiving terminal realizes radio frequency gain automatic switch control.
Fig. 3 is a schematic circuit diagram of an embodiment of the circuit structure suitable for implementing the rf gain automatic switching control at the receiving end of the vector network analyzer.
Detailed Description
In order to more clearly describe the technical content of the present invention, the following further description is given with reference to specific embodiments.
In the technical scheme of the circuit structure for realizing the radio frequency gain automatic switching control of the receiving end of the vector network analyzer, each functional block and block unit included therein can correspond to a particular hardware circuit in an integrated circuit structure, and thus relates only to the modification of specific hardware circuitry, not merely to the carrier for executing control software or computer programs, the technical problem is solved and the technical result is achieved accordingly, without involving any control software or computer program, i.e. the invention solves the technical problem to be solved and achieves the corresponding technical result by only using the improvement of the hardware circuit structure involved by the modules and units, without the aid of specific control software or computer programs for implementing the respective functions.
The utility model discloses a circuit structure suitable for vector network analyzer receiving terminal realizes radio frequency gain automatic switch control, including first level decay network, second level decay network, third level decay network, amplifier and two SPDT switches, first level decay network constitute by two attenuators of different decrement, connect respectively between the SPDT switch, second level decay network link to each other with the SPDT switch of first level decay network output, the amplifier connect between second level decay network and third level decay network; the circuit structure also comprises a port protection circuit which is connected with the SPDT switch at the input end of the first-stage attenuation network and receives an input signal; the circuit structure further comprises an upper computer and an ADSP circuit, the upper computer is connected with the ADSP circuit, the ADSP circuit outputs signals to the switch control signals, and the circuit structure controls two-gear high and low power through automatic gain.
As the utility model discloses a preferred embodiment, circuit structure under the condition of host computer setting output large signal, the ADSP circuit is judged through the power setting value of host computer, sends the on-off control signal, switches two SPDT switches to big decrement decay network, attenuates the signal, enlargies to the state before the decay through the amplifier.
As the utility model discloses a preferred embodiment, circuit structure under the condition that the host computer set up the output small signal, the ADSP circuit is judged through the power setting value of host computer, sends the on-off control signal, switches two SPDT switches to little decrement state, carries out little decay or not decay to the signal, amplifies the output through the amplifier to the signal.
As a preferred embodiment of the present invention, the first-stage attenuation network, the second-stage attenuation network and the third-stage attenuation network are pi-type attenuation networks.
As a preferred embodiment of the present invention, the second-stage attenuation network and the third-stage attenuation network are small attenuation networks, and the amplifier is subjected to input/output matching debugging and auxiliary debugging of flatness in a wide frequency band range.
The utility model discloses an among the embodiment, contain 2 SPDT switches, an amplifier, tertiary decay network, the circuit is simple. The upper computer and the ADSP circuit are auxiliary circuits and are not included in the utility model. As shown in figure 2 of the drawings, in which,
the first-stage attenuation network consists of two attenuators with different attenuation amounts, and the attenuators are respectively connected with two stages of the switch. The second stage attenuation network and the third stage attenuation network are respectively connected with the input and the output of the amplifier. The utility model discloses an automatic gain control circuit is applied to the receiver front end, as preferred, increases port protection circuit at the radio frequency signal input, prevents that the back stage circuit from being destroyed by port static electricity etc..
The utility model discloses a gain control circuit, for two grades of automatic gain control of high low power, the during operation, when the vector network analysis appearance sets up the output large signal through the host computer, ADSP judges through the power setting value of host computer, sends the on-off control signal, switches two SPDT switches to big decrement decay network, attenuates the signal, then amplifies to the state before the decay through the back-stage amplifier; when the vector network analyzer outputs a small signal through the setting of the upper computer, the ADSP judges through the power setting value of the upper computer, sends out a switch control signal, switches the two SPDT switches to a small attenuation state, performs small attenuation or no attenuation on the signal, then amplifies the signal through a rear-stage amplifier, and then outputs the signal to a rear-stage circuit. Therefore, power compensation is performed on the small signal, the dynamic range of the small signal can be increased, trace noise can be improved, and the test accuracy of the vector network analyzer under the small signal can be improved.
As shown in fig. 2, the first-stage attenuation network, the second-stage attenuation network, the third-stage attenuation network, and the common pi-type attenuation network have low cost and convenient debugging. The first-stage attenuation network is a main attenuation network, because the resistor used by the pi-type attenuation network is a lumped parameter device, the attenuation network has large attenuation to low-frequency signals and small attenuation to high-frequency signals, and when a plurality of amplifiers work, the low-frequency gain is large and the high-frequency gain is small. Therefore, when the working frequency is very wide, the first-stage attenuation network is not enough to ensure the attenuation flatness of the whole frequency band, and the flatness of the whole working frequency band can be adjusted by increasing the slope capacitor and matching with the post-stage amplifier. The second-stage third-stage attenuation network is a small-attenuation-quantity attenuation network, and can carry out input and output matching debugging and flatness auxiliary debugging in a wide frequency band range on the amplifier.
Like fig. 2, the utility model discloses an automatic gain control circuit places the amplifier on the main road, and like this, the temperature drift uniformity that can guarantee big signal and small signal all can pass through the amplifier with the small signal, improves the test accuracy.
Like fig. 2, the utility model discloses an automatic gain control circuit, control is simple, only need the control level signal of a switch can, digital circuit such as ADC does not contain, can avoid the factor mode alternately and introduce the interference noise signal.
As shown in fig. 2, the power ranges of the large signal and the small signal can be defined according to actual conditions. For example, taking the output power of the vector network analyzer from-50 dBm to 10dBm as an example, the signals from-30 dBm to 10dBm are called large signals, and the signals from-50 dBm to-30 dBm are called small signals. When the upper computer of the vector network analyzer sets the power to be a large signal, the ADSP makes a judgment according to the power setting value of the upper computer, outputs a switch control signal, switches 2 SPDT switches to a P2 pin, and attenuates and amplifies the large signal. When the upper computer of the vector network analyzer sets the power to be a small signal, the ADSP makes a judgment according to the power setting value of the upper computer, outputs a switch control signal, switches 2 SPDT switches to a P1 pin, and only amplifies the small signal without attenuation.
In a specific embodiment of the present invention, as shown in fig. 3, U1 is a port guard; U2/U5 is SPDT transfer switch; U3/U4 are attenuators, form the first level of attenuation network; u6 is an amplifier; R1/R2/R3 form a second-stage attenuation network; R4/R5/R6 form a third-stage attenuation network.
Referring to fig. 3, in the present embodiment, the attenuator U3 is a small attenuation attenuator, and is set to 0dB attenuation by default; attenuator U4 is a large attenuation attenuator, and is set by default to 20dB attenuation.
In this embodiment, the attenuator U3/U4 selects an attenuator chip with a fixed attenuation value instead of the pi-type attenuation network, which is a preferable scheme of this embodiment.
U6 is fixed gain amplifier, and is the controllable gain amplifier of traditional mode relatively, and the circuit is simple like this, and the debugging is convenient. Because many amplifiers have the characteristics of large gain at the low-frequency end and small gain at the high-frequency end, the attenuation networks in the front and at the back of the amplifiers are assisted by slope capacitors and are used for debugging the flatness of the broadband.
As shown in FIG. 3, R1/R2/R3 form a second stage attenuation network, and C8 is a slope capacitor for adjusting the attenuation flatness of the whole frequency band.
As shown in FIG. 3, R4/R5/R6 form a third stage attenuation network, and C11 is a slope capacitor for adjusting the attenuation flatness of the whole frequency band.
As shown in fig. 3, in application, when the output power is set to be a large signal by the upper computer, the SPDT switches U2/U4 are all switched to the 20dB attenuator U4, the large signal is attenuated first, and then amplified and compensated by the post amplifier U6, and returns to the state before attenuation, without affecting the dynamic range and trace noise index at that time, i.e., without affecting the test accuracy in this state.
As shown in fig. 3, when the output power is set to be a small signal by the upper computer, the SPDT switches U2/U4 are all switched to the 0dB attenuator U2, the small signal is not attenuated, and is amplified and compensated by the post amplifier U6, and the small signal is amplified and then output to the post mixer circuit. Therefore, the dynamic range under the small-signal state is equivalently improved, the trace noise is improved, and the test accuracy under the small-signal state can be improved.
To sum up, the utility model discloses a self-defined power size scope can set up in a flexible way, amplifies the compensation according to actual conditions to the small signal, improves the index under the small signal.
Adopted the utility model discloses a circuit structure suitable for vector network analysis appearance receiving terminal realizes radio frequency gain automatic switch-over control is different from traditional automatic gain control circuit. The utility model discloses an automatic gain control circuit carries out gain control to the radio frequency signal of vector network analyzer receiver and handles. When the small-signal amplification compensation circuit works, the small signal is amplified and compensated, and the large signal is not amplified, so that the corresponding intermediate-frequency signal amplitude is improved when the small signal is generated by performing power compensation on the radio-frequency small signal under the condition of not changing the index of the large signal, thereby improving the dynamic range under the state of the small signal and improving the trace noise.
In this specification, the invention has been described with reference to specific embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
Claims (5)
1. A circuit structure suitable for realizing radio frequency gain automatic switching control at a receiving end of a vector network analyzer is characterized by comprising a first-stage attenuation network, a second-stage attenuation network, a third-stage attenuation network, an amplifier and two SPDT switches, wherein the first-stage attenuation network consists of two attenuators with different attenuation amounts and is respectively connected between the SPDT switches; the circuit structure also comprises a port protection circuit which is connected with the SPDT switch at the input end of the first-stage attenuation network and receives an input signal; the circuit structure further comprises an upper computer and an ADSP circuit, the upper computer is connected with the ADSP circuit, the ADSP circuit outputs signals to the switch control signals, and the circuit structure controls two-gear high and low power through automatic gain.
2. The circuit structure suitable for realizing radio frequency gain automatic switching control at the receiving end of a vector network analyzer according to claim 1, wherein in the case that the circuit structure is set by the upper computer to output a large signal, the ADSP circuit judges through the power setting value of the upper computer, sends out a switch control signal, switches two SPDT switches to a large-attenuation-amount attenuation network, attenuates the signal, and amplifies the signal to a pre-attenuation state through an amplifier.
3. The circuit structure suitable for realizing automatic switching control of radio frequency gain at the receiving end of a vector network analyzer as claimed in claim 1, wherein in the case that the circuit structure is configured to output a small signal at the upper computer, the ADSP circuit judges through the power setting value of the upper computer, sends out a switch control signal, switches the two SPDT switches to a state of small attenuation amount, performs small attenuation or no attenuation on the signal, and amplifies and outputs the signal through an amplifier.
4. The circuit structure suitable for implementing automatic switching control of radio frequency gain at the receiving end of a vector network analyzer as claimed in claim 1, wherein the first stage attenuation network, the second stage attenuation network and the third stage attenuation network are pi-type attenuation networks.
5. The circuit structure suitable for implementing automatic switching control of radio frequency gain at the receiving end of a vector network analyzer as claimed in claim 1, wherein the second-stage attenuation network and the third-stage attenuation network are small-attenuation networks, and are used for performing input and output matching debugging and auxiliary debugging on flatness in a wide frequency band range on the amplifier.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202023017494.4U CN213960031U (en) | 2020-12-14 | 2020-12-14 | Circuit structure suitable for realizing radio frequency gain automatic switching control at receiving end of vector network analyzer |
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| CN202023017494.4U CN213960031U (en) | 2020-12-14 | 2020-12-14 | Circuit structure suitable for realizing radio frequency gain automatic switching control at receiving end of vector network analyzer |
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Address after: 201601 Block C, No.7, Lane 205, Gaoji Road, Sijing Town, Songjiang District, Shanghai Patentee after: Chuangyuan Xinke (Shanghai) Technology Co.,Ltd. Address before: 201601 Block C, No.7, Lane 205, Gaoji Road, Sijing Town, Songjiang District, Shanghai Patentee before: TRANSCOM INSTRUMENTS Co.,Ltd. |