CN213814656U - PCIe compatible mode switching device - Google Patents

Abstract

The utility model provides a PCIe compatibility mode switching device, which comprises a microprocessor, a UART-to-USB module and an SMP connector; the microprocessor is connected with the CLB jig through the SMP connector, and the microprocessor switches the PCIe compatibility mode through the level; the microprocessor is also connected with the computer through a UART-to-USB module. The UART-to-USB module adopts a signal conversion chip; a signal input pin of the UART signal input signal conversion chip; and the USB signal is output from the signal output pin of the signal conversion chip. The (TX) PD1 pin and the (RX) PD0 pin of the microprocessor are used for UART signal output; the ADC0 pin to ADC5 pin of the microprocessor is used to output a high-low level that switches PCIe compatibility mode. The utility model discloses a micro-processing single-chip sees through the control trigger switch and just can effectively improve the problem that causes because of human misoperation.

Description

PCIe compatible mode switching device

Technical Field

The utility model belongs to the technical field of the PCIe switches, in particular to PCIe compatibility mode switching device.

Background

PCI Express is PCI-E for short, PCIe for official short, an important branch of computer bus, and builds a higher-speed serial communication system standard along with the existing PCI programming concept and signal standard. Currently, the standard is established and maintained by a PCI-SIG organization. PCIe only applies to internal interconnects. Since PCIe is based on existing PCI systems, the existing PCI systems can be converted to PCIe with only the physical layer modified and no software modification required. PCIe has a faster rate, and therefore replaces almost all internal busses (including AGP and PCI) in the past. Intel and AMD now employ single chipset technology instead of the original south bridge/north bridge solution. The full name of CLB is company Base Board, PCI-SIG provides a compatible substrate for add-on card testing. The SMP cable is used for measuring the cable used in PCIe standard test, and the standard tool CLB/CBB using the Association standard is provided with an SMP connector, and the SMP cable is used for verifying PCIe signals. PCIe company Mode is a common standard default value for PCIe, PCIe has four different transmission speeds such as Gen1/2/3/4 and the like at present and has respective standard default values, PCIe Gen1 has one group of common default values, PCIe Gen2 has two groups of common default values, PCIe Gen3 has 11 groups of common default values, PCIe Gen4 has 11 groups of common default values, PCIe Gen5/6 … and the like in the future.

The PCIe specification is mainly to increase the speed of all buses inside a computer, so that there are many different specification standards for the bandwidth, among which PCIe x16 is a part designed for display cards. The AGP has the highest data transmission efficiency of 2.1GB/s, but the AGP obviously has the advantages of winning or losing the 8GB/s of the PCIe x16, but the 8GB/s only refers to an ideal value of data transmission, and can have sudden and violent performance by not using a display card of a PCIe interface, and the actual test data has no great difference. PCIe connections are based on a unidirectional serial (1-bit) peer-to-peer connection, called a lane. This is in sharp contrast to earlier PCI connections, which are based on bus control, where all devices share a bi-directional 32-bit parallel bus. PCIe is a multi-layer protocol consisting of a transaction layer, a data exchange layer and a physical layer. The physical layer may be further divided into a logic sub-layer and an electrical sub-layer. The logic sublayer can be divided into a Physical Code Sublayer (PCS) and a media access control sublayer (MAC), and currently, the PCIe standard test needs to follow a test method established by the PCI-SIG association, and rely on a tool established by the association to capture PCIe DATA/CLOCK signals. The CLB jig made by the society has two different specifications, one is the standard jig board card of x16/x1, and the second is the standard jig board card of x8/x4, so as to be designed for slots with different sizes.

In order to meet the PCIe standard test requirement, different PCIe company modes are often required to be switched on a PCIe slot for testing, and the switching manner can be to switch the different PCIe company modes by injecting a pulse through the PCIe Rx end on the CLB, and the injection method generally uses built-in circuits on the CLB to connect from the SMP connector (J5/J85) to the PCIe Rx end of the CLB. The PCIe company Mode switching circuit built in the CLB applies the continuous Clock signal input to the CLB by the object to be tested, switches the continuous Clock signal to the PCIe company Mode switching circuit through switch switching, converts the input continuous Clock signal into a single Pulse signal to be output by circuit and button control, and outputs a Pulse signal once per button click to complete PCIe company Mode switching. The PCIe standard default value may be switched with a Pulse triggering the Rx terminal, and the switching sequence according to the current development of PCIe is PCIe-Gen1 → PCIe-Gen2_ -3.5dB → PCIe-Gen2-6dB → PCIe-Gen3_ P0 → PCIe-Gen3_ P3 → PCIe-Gen3_ P3 → PCIe-Gen3_ P3 → PCIe-Gen3_ P3 → PCIe-Gen3 → PCIe-P3 → Gen3 → PCIe-Gen3 → PCIe 3 → Gen3 → No 3 → PCIe 3 → Gen3 → No 3 → PCIe 3 → No 3 → PCIe 3 → No. 3 → No 3 → No. 3 → PCIe 3 → No. 3 → PCIe 3 → No. 3 → PCIe 3 → No. 3 → No. 3 → No. 3 → No. 3 → No. 3 → No. 3 → No. 3 → PCIe 3 → No. 3 → PCIe 3 → No. 3 → PCIe 3 → No. 3 → No. 3 → PCIe 3 → No. 3 → PCIe 3 → No. PCIe 3 → No. 3 → PCIe 3 → No. 3 → PCIe 3 → No. 3 → No. 3 → No. 3 → No.. In the future, there will be more modes that can be switched, such as PCIe Gen 5-6. If the default value of P10 of PCIe Gen4 is to be verified, the PCIe company Mode is switched in the current Mode, the switch on the CLB must be pressed 24 times, once the switch is pressed more or less, the test error will be caused, and the verification must be performed again, so the problem of PCIe Gen 5-6 will become more serious in the future.

Disclosure of Invention

In order to solve the technical problem, the utility model provides a PCIe compatibility mode switching device adopts the micro-processing single-chip to see through the control trigger switching just can effectively improve the problem that causes because of human misoperation.

In order to achieve the purpose, the utility model adopts the following technical proposal,

the PCIe compatibility mode switching device comprises a microprocessor, a UART-to-USB module and an SMP connector;

the microprocessor is connected with the CLB jig through the SMP connector, and the microprocessor switches the PCIe compatibility mode through the level; the microprocessor is also connected with the computer through a UART-to-USB module.

Furthermore, the UART-to-USB module adopts a signal conversion chip; the UART signal is input into a signal input pin of the signal conversion chip; the USB signal is output from the signal conversion chip signal output pin.

Further, the model of the signal conversion chip is ATMEGA16U 2.

Further, the microprocessor is of the type ATMEGA 328P.

Further, The (TX) PD1 pin and (RX) PD0 pin of the microprocessor are used for UART signal output; the microprocessor's ADC0 pin to ADC5 pin is used to output a high-low level that switches PCIe compatible mode.

Further, the ADC0 pin to ADC5 pin of the microprocessor are connected to the SMP connector.

Further, the PCIe compatibility mode switching device has a size of 8cm by 8 cm.

The effect provided in the summary of the invention is only the effect of the embodiment, not all the effects of the invention, and one of the above technical solutions has the following advantages or beneficial effects:

the utility model provides a PCIe compatibility mode switching device, which comprises a microprocessor, a UART-to-USB module and an SMP connector; the microprocessor is connected with the CLB jig through the SMP connector, and the microprocessor switches the PCIe compatibility mode through the level; the microprocessor is also connected with the computer through a UART-to-USB module. The UART-to-USB module adopts a signal conversion chip; the UART signal is input into a signal input pin of the signal conversion chip; and the USB signal is output from the signal output pin of the signal conversion chip. The (TX) PD1 pin and the (RX) PD0 pin of the microprocessor are used for UART signal output; the ADC0 pin to ADC5 pin of the microprocessor is used to output a high-low level that switches PCIe compatibility mode. The utility model discloses a micro-processing single-chip sees through the control trigger switch and just can effectively improve the problem that causes because of human misoperation. The utility model discloses compatibility auto-change over device no longer relies on the Clock signal of system output, can avoid leading to the unable problem of operation of switching circuit because of system Clock signal is unusual.

Drawings

Fig. 1 is a schematic diagram of a PCIe compatibility mode switching apparatus according to embodiment 1 of the present invention;

fig. 2 is a schematic connection diagram of a PCIe compatibility mode switching apparatus according to embodiment 1 of the present invention;

fig. 3 is a circuit diagram of a microprocessor chip according to embodiment 1 of the present invention;

fig. 4 is a circuit diagram of the UART-to-USB chip according to embodiment 1 of the present invention.

Detailed Description

In order to clearly illustrate the technical features of the present invention, the present invention is explained in detail by the following embodiments in combination with the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. In order to simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted so as to not unnecessarily limit the invention.

Example 1

The utility model provides a PCIe compatibility mode switching device, as fig. 1 does the utility model discloses embodiment 1PCIe compatibility mode switching device schematic diagram. The USB adapter comprises a microprocessor, a UART-to-USB module and an SMP connector; the microprocessor is connected with the CLB jig through the SMP connector, and the microprocessor switches the PCIe compatibility mode through the level; the microprocessor is also connected with the computer through a UART-to-USB module.

Fig. 2 is a schematic connection diagram of a PCIe compatibility mode switching apparatus according to embodiment 1 of the present invention; the utility model provides a PCIe compatibility mode switching device is an independent platelet, and microprocessor sends the signal of switching PCIe compatibility mode, switches through the height of level, and microprocessor outputs a plurality of level height signals, switches appointed PCIe compatibility mode.

The utility model discloses use general PCB panel preparation, about 8cm x 8cm size, pull out the circuit of microprocessor chip function, adopt the UART control pin of chip to turn into USB connector output, conveniently connect computer control and use, microprocessor's signal output pin is pulled to the SMP connector, conveniently connects the CLB tool and uses.

Fig. 3 is a circuit diagram of a microprocessor chip according to embodiment 1 of the present invention; the microprocessor chip is model ATMEGA 328P. Pin2 is The (TX) PD1 pin and pin3 is the (RX) PD0 pin for UART signal output. Pins Pin23-Pin25 are named ADC0PC0 through ADC5PC5 as the outputs of the microprocessor chip, and any two pins are connected to the SMP connector as the outputs by controlling the level of the program.

Fig. 4 is a circuit diagram of the UART-to-USB chip according to embodiment 1 of the present invention, in which the model of the chip is ATMEGA16U 2. The UART signals are input from Pin8, Pin9, and output from Pin29, Pin30 to the USB connector.

The invention can effectively solve the problem caused by human misoperation by triggering and switching the processor through the program. The PCIe compatibility switching mode does not depend on the Clock signal output by the system any more, and the problem that the switching circuit cannot operate due to the abnormal system Clock signal can be avoided.

When one PCIe slot needs to verify different PCIe compatibility modes, the PCIe compatibility mode switching circuit board is combined with the CLB jig, a complete set of control system can be developed for combination, signals can be automatically switched to the appointed PCIe compatibility mode for automatic verification, then the signals are automatically switched to the next appointed PCIe compatibility mode for verification, and verification of various PCIe compatibility modes of one PCIe slot is completed.

Although the embodiments of the present invention have been described with reference to the accompanying drawings, the scope of the present invention is not limited thereto. Various modifications and alterations will occur to those skilled in the art based on the foregoing description. And are neither required nor exhaustive of all embodiments. On the basis of the technical scheme of the utility model, various modifications or deformations that technical personnel in the field need not pay out creative work and can make still are within the protection scope of the utility model.

Claims (7)

1. The PCIe compatibility mode switching device is characterized by comprising a microprocessor, a UART-to-USB module and an SMP connector;

   the microprocessor is connected with the CLB jig through the SMP connector, and the microprocessor switches the PCIe compatibility mode through the level; the microprocessor is also connected with the computer through a UART-to-USB module.
2. 2. The PCIe compatibility mode switch apparatus of claim 1, wherein the UART to USB module employs a signal conversion chip; the UART signal is input into a signal input pin of the signal conversion chip; the USB signal is output from the signal conversion chip signal output pin.
3. 3. The PCIe compatibility mode switch device of claim 2, wherein the signal conversion chip has a model of ATMEGA16U 2.
4. 4. The PCIe compatibility mode switch device of claim 1, wherein the microprocessor is model number ATMEGA 328P.
5. 5. The PCIe compatibility mode switch device of claim 4, wherein the TXPD1 pin and the RXPD0 pin of the microprocessor are used for UART signal output; the ADC0 pin to ADC5 pin of the microprocessor is used to output a high-low level that switches PCIe compatibility mode.
6. 6. The PCIe compatible mode switch device of claim 5, wherein ADC0 pin-to-ADC 5 pin of the microprocessor is connected to the SMP connector.
7. 7. The PCIe compatibility mode switch device of claim 1, wherein the PCIe compatibility mode switch device has a size of 8cm by 8 cm.

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