CN213718211U - Power amplifier module of high-power 6000W digital power amplifier - Google Patents
Power amplifier module of high-power 6000W digital power amplifier Download PDFInfo
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- CN213718211U CN213718211U CN202023259912.0U CN202023259912U CN213718211U CN 213718211 U CN213718211 U CN 213718211U CN 202023259912 U CN202023259912 U CN 202023259912U CN 213718211 U CN213718211 U CN 213718211U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model discloses a power amplifier module of high-power 6000W digital power amplifier, power adopt PFC and half-bridge switching power supply technique, and the power overflows overvoltage protection, carries out voltage detection/on-line control, starts/closes detection control, and output mode/output detects control, temperature control, two sections controls with higher speed of fan. The utility model discloses a AC input is connected to first bridge rectifier and filter circuit input, and first bridge rectifier and filter circuit output is through swashing back formula switching power supply circuit connection power control circuit, soft switch starting circuit, half-bridge switching power supply circuit, and power control circuit connects soft switch starting circuit. The utility model discloses a power amplifier module is arranged for the double-deck board, and is rationally distributed, and a lock is on U type radiator, and the radiating effect is good, and tone quality fidelity is effectual.
Description
Technical Field
The utility model relates to a power amplifier device especially relates to a pulse width modulation's power amplifier module.
Background
The power amplifier is used for amplifying weak signals input by sound source equipment, generating enough current to push a loudspeaker to replay sound, and amplifying audio electric signals to drive the loudspeaker of a sound box to make sound. Professional power amplifiers are generally used for public address of conferences, performances, halls, fields and museums. The design mainly aims at large output power, perfect protection circuit and good heat dissipation. The performance of the sound box power amplifier directly affects the effect of the playing tone quality of the whole sound box, so that the conditions of sound distortion and the like often occur, the current sound box power amplifiers have different powers, the power amplifiers with different powers are used in different places, and the design of how to improve the signal processing in the power amplifiers is required to be discussed in the text. Different power amplifiers are also different in internal signal processing, circuit design and production process due to the consideration of power, impedance, distortion, dynamics and different application ranges and control and regulation functions. Professional power amplifiers are generally used for public address of conferences, performances, halls, fields and museums. The design mainly aims at large output power, perfect protection circuit and good heat dissipation.
SUMMERY OF THE UTILITY MODEL
The utility model aims at overcoming prior art's shortcoming, the power adopts PFC and half-bridge switching power supply technique, and power overcurrent overvoltage protection, power amplifier part adopt PWM pulse width modulation circuit, MCU the control unit constitutes, and MCU the control unit is controlled by MCU singlechip, carries out voltage detection/on-line control, starts/closes detection control, output mode/output power detection control, temperature control, two sections accelerated control of fan.
In order to achieve the above object, the utility model discloses a power amplifier module of high-power 6000W digital power amplifier adopts following technical scheme:
a power amplifier module of a high-power 6000W digital power amplifier comprises a soft switch starting circuit, wherein the input end of the soft switch starting circuit is connected with an AC input, and the AC input reaches a half-bridge switch power circuit after passing through a switch impact current protection circuit, a second bridge rectifier and filter circuit and a PFC circuit, and the half-bridge switch power circuit is connected with an auxiliary power supply 1 rectifier and filter circuit, a main power supply bridge rectifier and filter circuit, an auxiliary power supply 2 rectifier and filter circuit, an auxiliary power supply 3 rectifier and filter circuit and an auxiliary power supply 4 rectifier and filter circuit after passing through a transformer isolation output circuit;
the auxiliary power supply 2 rectifying and filtering circuit outputs 3000W/4 ohm after passing through the PWM driving power supply circuit, the digital power amplifier PWM pulse width modulation circuit and the LC filtering circuit;
the auxiliary power supply 3 rectifying and filtering circuit is connected to the MCU control unit through a +/-12V auxiliary power supply circuit and a +5V auxiliary power supply circuit; the auxiliary power supply 4 is connected to the MCU control unit after the rectifying and filtering circuit passes through the fan power supply output circuit; the MCU control unit is connected with the audio compression circuit and the temperature detection circuit, the input end of the audio compression circuit is connected with the signal input, and the output end of the audio compression circuit is connected with the digital power amplifier PWM (pulse width modulation) circuit;
the auxiliary power supply 2 rectifying and filtering circuit is connected with a digital power amplifier PWM pulse width modulation circuit after passing through a main power supply bridge type rectifying and filtering circuit;
the MCU control unit is connected with the fan power supply output circuit.
Further, alternating current is input into a first bridge rectifier filter circuit, a flyback switch power supply circuit is started through a manually closed soft switch circuit, a power supply control circuit is connected with a relay of the soft switch starting circuit after obtaining power, the alternating current passes through a switch impact current protection circuit, a second bridge rectifier filter circuit and a PFC circuit and then reaches a half-bridge switch power supply circuit, a main power supply and each auxiliary power supply are boosted and output through a transformer isolation output circuit to supply power for power amplification PWM driving, power amplification is started, weak signals pass through an audio compression circuit and reach a digital power amplification PWM (pulse width modulation) circuit to be amplified, the power is output through an LC filter circuit, the power is up to 3000W/4 ohm, meanwhile, the auxiliary power supply supplies power for an MCU (microprogrammed control unit), and the temperature in a circuit is detected to control the compression of input signals and the voltage output by a fan.
Further, the AC input is connected with the input end of a first bridge rectifier filter circuit, the output end of the first bridge rectifier filter circuit is connected with a power supply control circuit, a soft switch starting circuit and a half-bridge switch power supply circuit through a flyback switch power supply circuit, and the power supply control circuit is connected with the soft switch starting circuit;
the flyback switching power supply circuit is connected with the soft switching starting circuit, alternating current input firstly passes through the first bridge rectifier filter circuit, rectified direct current enters the flyback switching power supply circuit, an output power supply supplies power to the power supply control circuit, the PFC circuit and the half-bridge switching power supply circuit after rectification and filtering, and the soft switching starting circuit is controlled after the power supply control circuit is electrified to switch on the main power supply bridge rectifier filter circuit (a main power supply circuit).
The auxiliary power supply 1 is rectified and filtered, then drives the triode Q3 and the triode Q12, then the coil of the relay RY2 is electrified and closed, the resistor R3, the resistor R4 and the thermistor PR1 on the switch impact current protection circuit are short-circuited, and loss is reduced;
the voltage induced by the rectification filter circuit of the auxiliary power supply 2 is based on the negative voltage of the main power supply, and the voltage is stabilized after rectification and filtering to obtain a voltage of +12V/-VCC and is output to a digital power amplifier PWM (pulse width modulation) circuit for use;
the auxiliary power supply 3 rectifying and filtering circuit obtains +/-12V voltage after voltage stabilization, the output end is respectively connected with the PWM driving power supply circuit, the audio compression circuit, the +5V auxiliary power supply circuit and the temperature detection circuit, the +12V voltage of the +/-12V auxiliary power supply circuit obtains a +5V power supply after voltage stabilization of the +5V auxiliary power supply circuit, and the output is connected with the MCU control unit;
the voltage output by the rectifying and filtering circuit of the auxiliary power supply 4 is connected to a heat radiation fan of the fan power supply output circuit, and the rotating speed of the fan is controlled by the MCU control unit.
In some embodiments, the input power supply adopts a soft switch design, a strong current part is controlled and input by using a weak current, when the power supply is started normally when the starting impact current is processed, the impact current protection component is short-circuited by a relay, so that extra useless power loss is avoided during high-power work, the power supply driving chip supplies power by using a flyback switch power supply, and the power supply driving chip stably works during high-power work.
Further, the PFC circuit drives two parallel NMOS tubes Q4 and Q5 by a PFC driving chip U8 in a totem-pole manner, and a pin 3 of the PFC driving chip U8 is connected to the source electrodes S of the NMOS tubes Q4 and Q5 after passing through a resistor R1 and parallel resistors R11-R18; a pin 4 of a PFC driving chip U8 is connected to a drain D of an NMOS tube Q4 and an NMOS tube Q5 through a resistor R64, a resistor R63 and an inductor L2; the source electrodes S of the NMOS tube Q4 and the NMOS tube Q5 are grounded, and the drain electrodes D of the NMOS tube Q4 and the NMOS tube Q5 are connected to a power supply positive VCC after passing through the anode-cathode of the diode BD 2; a resistor R21 is connected in parallel to a grid G and a source S of the NMOS transistor Q4, and a resistor R22 is connected in parallel to a grid G and a source S of the NMOS transistor Q5;
a pin 7 of the PFC driving chip U8 is connected to an emitter E of an NPN triode Q2 in the soft switch starting circuit through a resistor R10, a collector C of the NPN triode Q2 is connected to a +15V-PRI end (namely the pin 7 of the PFC driving chip U8 is connected to the +15V-PRI end through a resistor R10 and an NPN triode Q2), and a pin 8 of the PFC driving chip U8 is connected to a base B of the NPN triode Q1 and a base B of the PNP triode Q14; an emitter of an NPN triode Q1 is connected with an emitter of a PNP triode Q14, an emitter of an NPN triode Q1 and an emitter of a PNP triode Q14 are connected to a grid G of an NMOS tube Q4 through a driving resistor R19, and an emitter of an NPN triode Q1 and an emitter of a PNP triode Q14 are connected to a grid G of an NMOS tube Q5 through a driving resistor R20; the collector of the PNP triode Q14 is grounded, the collector of the NPN triode Q1 is connected to a pin 2 of a PFC driving chip U8 through a resistor R5, and the collector of the PNP triode Q14 is connected with a pin 1 of a PFC driving chip U8;
a driving resistor R19 and a driving resistor R20 are respectively connected with a fast diode D18 and a fast diode D19 in parallel, the positive electrode of the fast diode D18 and the positive electrode of the fast diode D19 are connected to the grid G of the NMOS tube Q4, the grid G and the source S of the NMOS tube Q4 and the NMOS tube Q5 are respectively connected with a resistor R21 and a resistor R21 in parallel, the drain D and the source S of the NMOS tube Q21 are respectively connected with a capacitor C21 and a capacitor C21 in parallel, the resistors R21-R21 are connected to the source S of the NMOS tube Q21 and the source S of the NMOS tube Q21 in parallel and then connected with a short circuit protection of the NMOS tube Q21, the drain D of the NMOS tube Q21 and the drain D of the NMOS tube Q21 are connected with the positive electrode of the fast diode BD 21, the negative electrode of the fast diode BD 21 is connected to the power supply positive electrode VCC, and the capacitor C21 BD are connected in series and then connected in parallel to the fast diode BD 21; the source S of the NMOS transistor Q5 is grounded.
Further, the half-bridge switch power circuit adopts a totem pole mode to push an NMOS tube, a power driving chip U7 pin 2 and a pin 3 are connected to +15V-PRI, a low-power switch power supply is adopted, a power driving chip U7 pin 14 is connected to +15V-PRI through a diode D21 cathode-anode, a power driving chip U7 pin 14 is connected to a power driving chip U7 pin 12 through a capacitor C52 and a capacitor C53 which are connected in parallel, a power driving chip U7 pin 13 is connected to an NPN triode Q8 base and a PNP triode Q7 base through a resistor R38, a power driving chip U7 pin 13 is connected to an optocoupler U2 pin 1 through a resistor R43, a power driving chip U7 pin 11 is connected to an NPN triode Q9 base and a PNP triode Q6 base through a resistor R37, an NPN triode Q9 base and a PNP triode Q6 base are connected to an optocoupler 3 pin 53 and an emitter 84 7 of an NPN triode Q82 7 through a resistor R44, emitters of an NPN triode Q8 and a PNP triode Q7 are connected to a grid electrode of an NMOS tube Q10 through two driving resistors R41 and R42 which are connected in parallel, a fast diode D22 is connected in parallel to the driving resistor R41 and the driving resistor R42, the resistor R48 is connected between a grid electrode and a source electrode of the NMOS tube Q10 in parallel, and the fast diode D27 and an RC absorption circuit (composed of a resistor R54 and a capacitor C57 which are connected in series) are connected between a drain electrode and a source electrode of the NMOS tube Q10 in parallel;
in some embodiments, the half-bridge switching power supply circuit drives a power supply NMOS tube by using a totem-pole driving mode, a fast diode is connected in parallel with a driving resistor, the fast diode and an RC absorption circuit are connected in parallel with a drain electrode and a source electrode of the NMOS tube, and a resistor is connected in parallel with a grid electrode and the source electrode of the NMOS tube;
an emitter of an NPN triode Q9 is connected with an emitter of a PNP triode Q6, an emitter of a PN triode Q9 and an emitter of a PNP triode Q6 are connected with a grid electrode of an NMOS tube Q11 after passing through a driving resistor R39 and a driving resistor R40 which are connected in parallel, a fast diode D23 is connected with the driving resistor R39 and the driving resistor R40 in parallel, a resistor R47 is connected with the grid electrode and the source electrode of the NMOS tube Q11 in parallel, a fast diode D28 and another RC absorption circuit (composed of a resistor R55 and a capacitor C58 which are connected in series) are connected with a drain electrode and a source electrode of the NMOS tube Q11 in parallel, and a pin 8 and a pin 9 of;
the main winding J4 of the transformer T2 is terminated to a pin 4 of a high-frequency transformer T1, a pin 2 of the high-frequency transformer T1 returns to a central point (CEN) of main voltage after passing through two capacitors C61 and C62 which are connected in parallel, the secondary side of the high-frequency transformer T1 is connected to a pin 3 of a comparator U5A through voltage rectified by a bridge, and a pin 1 of the comparator U5A is connected to a pin 10 of a power driving chip U7.
Furthermore, the digital power amplifier PWM pulse width modulation circuit comprises two groups of PWM power amplifier units, an over-temperature protection circuit is arranged on the first group of power amplifier units, a power supply +5V-D is grounded through a resistor R448 and a thermistor PR400, the voltage drop of the thermistor PR400 is detected by using a singlechip U16 pin 40 and a pin 42 of an MCU control unit, the thermistor PR400 is positioned beside a power amplifier NMOS tube, the digital power amplifier PWM pulse width modulation circuit is distributed on an upper layer circuit board, the rest circuits are distributed on a lower layer circuit board, and the whole circuit is assembled on a U-shaped radiating fin, so that the digital power amplifier PWM pulse width modulation circuit has good radiating conditions and is convenient to assemble and maintain;
the pulse width modulation chip U201 pin 15 of the first group of power amplification units is connected with a positive main power supply J1 interface after passing through a resistor R218, the pulse width modulation chip U201 pin 9 is connected with a negative main power supply J2 interface, the pulse width modulation chip U201 pin 14 is connected with a grid G of an NMOS tube FET202 through a resistor R220, the pulse width modulation chip U201 pin 13 is connected with a source S of the NMOS tube FET202 and a drain D of the NMOS tube FET203, the pulse width modulation chip U201 pin 13 outputs a power amplification signal, the drain of the NMOS tube FET202 is connected with a positive main power supply J1 interface, the pulse width modulation chip U201 pin 16 is connected with a resistor R504 in series, the drain D of the NMOS tube FET202 is connected after the anode and the cathode of a diode D206, a resistor R216 is connected in parallel with the pulse width modulation chip U201 pin 16 and the pin 13, one end of the resistor R215 is connected with the anode of the diode D206, the other end of the resistor R215 is connected with the pulse, Resistor R222), and another RC absorption circuit (composed of resistor R223 and capacitor C226 connected in series) is connected in parallel between the drain D and the source S of the NMOS transistor FET 203;
the pin 10 of the pulse width modulation chip U201 is connected to the source electrode of the NMOS tube FET203 through a resistor R253 and the anode-cathode of the light emitting diode DS201, the second group of power amplification units are the same as the first group of power amplification units, and the digital power amplification PWM circuit is connected with interfaces J9, J10, J12, J7, 11 and J8 of other circuits through an interface J1, an interface J2, an interface J3, an interface J4, an interface J5 and an interface J6.
Further, pin 38 of an MCU control chip U16 of the MCU control unit is connected to a +5V power supply + 5V; after a pin 44 of the MCU control chip U16 is connected to an inductor L5, the MCU control chip U16 is connected to a main power positive voltage detection (power supply + 85V); after the pin 1 of the MCU control chip U16 is connected to the inductor L8, the MCU control chip U16 is connected to the output negative terminal for voltage detection; pin 3 of the MCU control chip U16 is connected to the inductor L9 and is connected to the output positive terminal voltage detection; the MCU control chip U16 pin 5 and pin 7 are connected to the interface COM1 and used for downloading and updating programs; the pin 12 of the MCU control chip U16 is connected to a power supply of +5V through a resistor R178 and the cathode-anode of a light emitting diode D81;
a pin 18 of the control chip U16 is connected to a base B of an NPN triode Q13 through an inductor L3, a positive electrode-negative electrode of a diode D4 and a resistor R67, and a pin 19 of the control chip U16 is connected to a base B of an NPN triode Q13 through an inductor L4, a positive electrode-negative electrode of a diode D5 and a resistor R68; a pin 21 of the control chip U16 is connected to the anode of the diode D76 through a resistor R187 and a pin 23 through a resistor R186, a pin 22 of the control chip U16 is connected to the anode of the diode D75 through a resistor R185 and a pin 24 through a resistor R184, and the cathodes of the diode D75 and the diode D76 are connected to a pin 1 of an optical coupler U18 of the audio compression circuit;
the pin 30 of the control chip U16 is connected to the base of an NPN triode Q22 through a resistor R145, the emitter of the NPN triode Q22 is connected to the anode of a light-emitting diode D82, the cathode of the light-emitting diode D82 is grounded, and the collector of the NPN triode Q22 is connected to the +12V power supply through a resistor R146.
Further, a pin 1 of a compression chip IC2 of the audio compression circuit is connected to a pin 3 of an optical coupler U18 and a pin 3 of a switching tube (bidirectional thyristor) D78 through a resistor R161 and a resistor R165, a pin 4 of an optical coupler U18 is connected to a +12V end of a power supply through a resistor R159, a pin 2 of the compression chip IC2 is connected to the +12V end of the power supply through a resistor R166, a pin 3 of a compression chip IC2 is grounded through a resistor R167, a pin 4 of a compression chip IC2 is connected to a pin 2 of an operational amplifier U20A through a resistor R169, a pin 5 of the compression chip IC2 is connected to a pin 3 of the operational amplifier U20A, and a pin 1 (an output end) of the operational amplifier U20A is connected to a pin 3 of a comparator U19A.
Further, a positive voltage series resistor after the main power supply is rectified and filtered in the main power supply bridge type rectifying and filtering circuit detects the voltage drop on the resistor through a triode Q15, and when the load of the power supply is too high, a triode Q15 drives a triode Q16 to provide signals for the audio compression circuit, so that the input signals are compressed, and the output distortion is avoided.
The utility model discloses a power amplifier module is arranged for the double-deck board, and digital power amplifier PWM pulse width modulation circuit distributes on upper circuit board (PCB board), and all the other circuits are arranged on lower floor's circuit board, and is rationally distributed, and the equipment mode is by two PCBs through row needle row seat mode to inserting, and unified lock attaches on U type radiator, and the radiating effect is good, and tone quality fidelity is effectual.
Drawings
Fig. 1 is a schematic block diagram of the circuit of the present invention;
fig. 2A is a circuit diagram of a flyback switching power supply circuit according to the present invention;
FIG. 2B is a circuit diagram of the soft switch start circuit of the present invention;
FIG. 2C is a circuit diagram of the power control circuit of the present invention;
fig. 3 is a circuit diagram of the PFC circuit of the present invention;
fig. 4 is a circuit diagram of a half-bridge switching power supply circuit according to the present invention;
fig. 5 is a circuit diagram of a first digital power amplifier PWM power amplifier unit of the digital power amplifier PWM pulse width modulation circuit of the present invention;
fig. 6 is a circuit diagram of the digital power amplifier PWM circuit of the present invention;
fig. 7A is a circuit diagram of the MCU control unit of the present invention;
fig. 7B is a circuit diagram of the detection circuit of the MCU control unit of the present invention;
fig. 7C is a circuit diagram of the fan connection circuit of the MCU control unit of the present invention;
fig. 8 is a circuit diagram of the audio compression circuit of the present invention.
The reference numerals are explained below:
the power supply comprises a first bridge rectifier filter circuit 01, a flyback switching power supply circuit 02, a power supply control circuit 03, a soft switch starting circuit 04, a switch inrush current protection circuit 05, a second bridge rectifier filter circuit 06, a PFC circuit 07, a half-bridge switching power supply circuit 08, a transformer isolation output circuit 09, an auxiliary power supply 1 rectifier filter circuit 10, a main power supply bridge rectifier filter circuit 11, an auxiliary power supply 2 rectifier filter circuit 12, a PWM driving power supply circuit 13, a digital power amplifier PWM pulse width modulation circuit 14, an LC filter circuit 15, an auxiliary power supply 3 rectifier filter circuit 16, an +/-12V auxiliary power supply circuit 17, a +5V auxiliary power supply circuit 18, an MCU control unit 19, an audio compression circuit 20, a temperature detection circuit 21, an auxiliary power supply 4 rectifier filter circuit 22 and a fan power supply output circuit 23.
Detailed Description
To further understand the features and technical means of the present invention, and the specific purpose and function achieved, the advantages and spirit of the present invention are further understood by the following detailed description of the present invention with reference to the accompanying drawings.
The utility model discloses a power amplifier module arranges for the double-deck board, and digital power amplifier PWM pulse width modulation circuit 24 (pulse width modulation power amplifier circuit) distributes on upper circuit board, and other arrange on lower floor's circuit board.
The utility model discloses a functional block diagram is seen in attached figure 1, the utility model comprises a first bridge rectifier filter circuit 01, a power control circuit 03, a soft switch starting circuit 04, a PFC circuit 07, a transformer isolation output circuit 09, an MCU control unit 19 and a fan power supply output circuit 23;
the alternating current is input into a first bridge rectifier filter circuit 01, a flyback switching power supply circuit 02 is started through manually closing a soft switching circuit 04, a relay of the soft switching starting circuit 04 is switched on after a power supply control circuit 03 obtains the power supply, the alternating current is boosted through a switch surge current protection circuit 05, a second bridge rectifier filter circuit 06 and a PFC circuit 07, then the signal reaches a half-bridge switch power circuit 08, a main power supply and each auxiliary power supply are output through a transformer isolation output circuit 09 to supply power for power amplifier PWM drive, a power amplifier is started, a weak signal passes through an audio compression circuit 20 to reach a digital power amplifier PWM pulse width modulation circuit 14 for amplification, the weak signal is output through an LC filter circuit 15, the power is up to 3000W/4 ohm, meanwhile, the auxiliary power supply supplies power to the MCU control unit 19, detects the temperature in the circuit to control the compression of the input signal and the voltage output by the fan power supply output circuit 23.
Further, alternating current input firstly passes through the first bridge rectifier filter circuit 01, rectified direct current enters the flyback switching power supply circuit 02, an output power supply supplies power to the power supply control circuit 03, the PFC circuit 07 and the half-bridge switching power supply circuit 08 after rectification and filtering, and the soft switch starting circuit 04 is controlled after the power supply control circuit 03 is powered on to switch on a main power supply circuit.
An alternating current power supply (alternating current input) firstly passes through a first bridge rectifier and filter circuit 01 and reaches a flyback switch power supply circuit 02, after the drive optocoupler IC1 is started, VCC-PRI voltage is obtained through secondary rectifier and filter of a transformer T3, voltage of +15V-PRI and +5VP is obtained through voltage stabilization, the voltage of +5VP supplies power to a power supply control circuit 03, a control chip of the control chip controls a relay RY1 of a soft switch starting circuit 04 to be closed after obtaining power supply, alternating current reaches a switch impact current protection circuit 05, a second bridge rectifier and filter circuit 06 and a PFC circuit 07 through a relay RY1 and then reaches a half-bridge switch power supply circuit 08, a transformer isolation output circuit 09 boosts the voltage, and main voltage and auxiliary power supply thereof are obtained after rectification and filtering through a main power supply bridge rectifier and filter circuit 11.
The rectification and filtering circuit 10 of the auxiliary power supply 1 drives the triode Q3 and the triode Q12 after rectification and filtering, then the coil of the relay RY2 is electrified and closed, and a resistor R3, a resistor R4 and a thermistor PR1 on the switch impact current protection circuit 05 are short-circuited, so that the loss is reduced;
the voltage induced by the rectifying and filtering circuit 12 of the auxiliary power supply 2 is based on the negative voltage of the main power supply, and the voltage is stabilized after rectification and filtering to obtain a voltage of +12V/-VCC and is output to the digital power amplifier PWM circuit 14 for use;
the auxiliary power supply 3 rectifying and filtering circuit 16 obtains a voltage of +/-12V after voltage stabilization, the output end of the auxiliary power supply is respectively connected with the PWM driving power supply circuit 13, the audio compression circuit 20, the +5V auxiliary power supply circuit 18 and the temperature detection circuit 21, the +12V voltage of the +/-12V auxiliary power supply circuit 17 obtains a +5V power supply after voltage stabilization through the +5V auxiliary power supply circuit 18, and the output end of the +5V power supply is connected with the MCU control unit 19;
the voltage output by the rectifying and filtering circuit 22 of the auxiliary power supply 4 is connected to the heat radiation fan of the fan power supply output circuit 23, and the fan speed is controlled by the MCU control unit 19.
In some embodiments, the input power supply adopts a soft switch design, a strong current part is controlled and input by using a weak current, when the power supply is started normally when the starting impact current is processed, the impact current protection component is short-circuited by a relay, so that extra useless power loss is avoided during high-power work, the power supply driving chip supplies power by using a flyback switch power supply, and the power supply driving chip stably works during high-power work.
Further, the PFC circuit 07 drives two parallel NMOS transistors Q4 and Q5 by a PFC driver chip U8 in a totem pole manner, and a pin 3 of the PFC driver chip U8 is connected to the sources S of the NMOS transistor Q4 and Q5 through a resistor R1 and parallel resistors R11 to R18; a pin 4 of a PFC driving chip U8 is connected to a drain D of an NMOS tube Q4 and an NMOS tube Q5 through a resistor R64, a resistor R63 and an inductor L2; the source electrodes S of the NMOS tube Q4 and the NMOS tube Q5 are grounded, and the drain electrodes D of the NMOS tube Q4 and the NMOS tube Q5 are connected to a power supply positive VCC after passing through the anode-cathode of the diode BD 2; a resistor R21 is connected in parallel to a grid G and a source S of the NMOS transistor Q4, and a resistor R22 is connected in parallel to a grid G and a source S of the NMOS transistor Q5;
a pin 7 of the PFC driving chip U8 is connected to an emitter E of an NPN triode Q2 in the flyback switching power supply circuit 2 through a resistor R10, a collector C of the NPN triode Q2 is connected to the +15V-PRI terminal (i.e., the pin 7 of the PFC driving chip U8 is connected to the +15V-PRI terminal through a resistor R10 and an NPN triode Q2), and a pin 8 of the PFC driving chip U8 is connected to a base B of the NPN triode Q1 and a base B of the PNP triode Q14; an emitter of an NPN triode Q1 is connected with an emitter of a PNP triode Q14, an emitter of an NPN triode Q1 and an emitter of a PNP triode Q14 are connected to a grid G of an NMOS tube Q4 through a driving resistor R19, and an emitter of an NPN triode Q1 and an emitter of a PNP triode Q14 are connected to a grid G of an NMOS tube Q5 through a driving resistor R20; the collector of the PNP triode Q14 is grounded, the collector of the NPN triode Q1 is connected to a pin 2 of a PFC driving chip U8 through a resistor R5, and the collector of the PNP triode Q14 is connected with a pin 1 of a PFC driving chip U8;
a driving resistor R19 and a driving resistor R20 are respectively connected with a fast diode D18 and a fast diode D19 in parallel, the positive electrode of the fast diode D18 and the positive electrode of the fast diode D19 are connected to the grid G of the NMOS tube Q4, the grid G and the source S of the NMOS tube Q4 and the NMOS tube Q5 are respectively connected with a resistor R21 and a resistor R21 in parallel, the drain D and the source S of the NMOS tube Q21 are respectively connected with a capacitor C21 and a capacitor C21 in parallel, the resistors R21-R21 are connected to the source S of the NMOS tube Q21 and the source S of the NMOS tube Q21 in parallel and then connected with a short circuit protection of the NMOS tube Q21, the drain D of the NMOS tube Q21 and the drain D of the NMOS tube Q21 are connected with the positive electrode of the fast diode BD 21, the negative electrode of the fast diode BD 21 is connected to the power supply positive electrode VCC, and the capacitor C21 BD are connected in series and then connected in parallel to the fast diode BD 21; the source S of the NMOS transistor Q5 is grounded.
The PFC circuit 07 is shown in the attached figure 3, after the PFC driving chip U8 is electrified and started, the PFC driving chip U8 pin 8 outputs the PFC driving chip U8 pin, an NMOS tube Q4 and an NMOS tube Q5 of the PFC are pushed in a totem-pole mode, a collector of an NPN triode Q1 is grounded after passing through a resistor R188 and a positive electrode-negative electrode of a light emitting diode D56, and the resistor R188 and the light emitting diode D56 perform indicating functions; the resistors R11-R18 are used for short-circuit protection of an NMOS tube Q4 and an NMOS tube Q5 of the PFC, fast diodes D18 and D19 are respectively connected in parallel to driving resistors R19 and R20 of the resistors, a resistor R21 and a resistor R22 are respectively connected in parallel between the grids and the sources of the NMOS tube Q4 and the NMOS tube Q5, a capacitor C16 and a capacitor C17 are connected in parallel between the drains and the sources of the NMOS tube Q4 and the NMOS tube Q5, and an RC absorption circuit (formed by connecting the resistor R24 and the capacitor C20 in series) is connected in parallel to a fast diode BD2 for rectification of the resistors.
Further, the half-bridge switch power circuit 08 adopts a totem pole mode to push an NMOS tube, a power driving chip U7 pin 2 and a pin 3 are connected to +15V-PRI, a low-power switch power supply is adopted for supplying power, a power driving chip U7 pin 14 is connected to +15V-PRI through a diode D21 cathode-anode, a power driving chip U7 pin 14 is connected with a power driving chip U7 pin 12 through a capacitor C52 and a capacitor C53 which are connected in parallel, a power driving chip U7 pin 13 is connected with an NPN triode Q8 base and a PNP triode Q7 base through a resistor R38, a power driving chip U7 pin 13 is connected to an optocoupler U2 pin 1 through a resistor R43, a power driving chip U7 pin 11 is connected to an NPN triode Q9 base and a PNP triode Q6 base through a resistor R37, the PNP triode Q9 base and the PNP triode Q5 base are connected to an optocoupler pin 1 of a U44, the NPN triode Q8 is connected with an emitter of a PNP triode Q7, the emitters of the NPN triode Q8 and the PNP triode Q7 are connected with a grid of an NMOS tube Q10 after passing through two driving resistors R41 and R42 which are connected in parallel, a fast diode D22 is connected in parallel with the driving resistors R41 and R42, the resistor R48 is connected between the grid and a source of the NMOS tube Q10 in parallel, and the fast diode D27 and an RC absorption circuit (composed of a resistor R54 and a capacitor C57 which are connected in series) are connected between a drain and a source of the NMOS tube Q10 in parallel.
Further, in some embodiments, the half-bridge switching power supply circuit 08 is shown in fig. 4, and the circuit has over-temperature/over-voltage/over-current protection, dc protection, automatic shutdown of thermal protection, power limitation, hiccup protection, self-start at low temperature, Reset protection, power-on Reset, software Reset, and power driving chip U7 pin 2 and pin 3 powered by flyback switching power supply circuit 02 power supply, and stable power driving chip U7 power supply during high power output, power driving chip U7 pin 13 and pin 11 respectively drive totem pole through driving resistor R38 and driving resistor R37 to indirectly drive NMOS transistor Q10 and NMOS transistor Q11, NMOS transistor driving resistor R54 and driving resistor R55 are respectively connected in parallel with fast diode D27 and fast diode D28, and fast diode D27 and diode D28 are respectively connected in parallel between drain and source of NMOS transistor Q10 and NMOS transistor Q11, the drain and source of the NMOS transistor Q10 and Q11 are respectively connected with an RC absorption circuit in parallel: R54-C57 (resistor R54 is connected in series with capacitor C57) and R55-C58 (resistor R55 is connected in series with capacitor C58).
The grid electrodes and the source electrodes of the NMOS tube Q10 and the NMOS tube Q11 are respectively connected with a resistor R47 and a resistor R48 in parallel, a pin 12 of a power driving chip U7 is output to a main winding J3 of a transformer T2, the resistor R56 and the resistor R57 which are connected in parallel are current detection resistors, the current detection resistors are connected with the source electrode of the NMOS tube Q11, the current detection resistors are connected with a pin 3 of a comparator U5A through the resistor R53 and the anode-cathode of a diode D37, and a pin 1 of the comparator U5A is connected with a pin 10 of the power driving chip U7 to realize overcurrent protection;
a main winding J4 of the main transformer T2 flows through a primary side of a high-frequency transformer T1, and is connected to a pin 3 of a comparator U5 through a positive electrode-a negative electrode of a diode D39 after secondary rectification and filtering of the high-frequency transformer T1, so that overvoltage protection is realized; the secondary winding pin 8 of the transformer T2 is rectified and filtered to supply power to the relay RY2, and the resistor R3, the resistor R4 and the thermistor PR1 of the startup impact current protection assembly are short-circuited, so that the loss of useless power in high-power is reduced.
A base electrode of the triode Q7 and a base electrode of the triode Q8 are connected to a pin 1 of an optocoupler U2 through a resistor R43, a pin 2 of the optocoupler U2 is connected to a pin 12 of a power driving chip U7 and used for detecting high-end driving of a power driving chip U7, and an output result is connected to a pin 8 of a power control chip U15 through a resistor R45 by a pin 3 of the optocoupler U2; the base electrodes of the triode Q6 and the triode Q9 are connected to a pin 1 of an optocoupler U3 through a resistor R44, a pin 2 of the optocoupler U3 is grounded and used for detecting the low-end drive of a power supply driving chip U7, and an output result is connected to a pin 7 of a power supply control chip U15 through a resistor R46 through a pin 3 of an optocoupler U3 and used for monitoring the running state of the power supply driving chip U7.
In some embodiments, the half-bridge switching power supply circuit 08 drives a power supply NMOS transistor by using a totem-pole driving method, connects a fast diode in parallel with a driving resistor, connects a fast diode and an RC absorbing circuit in parallel with a drain and a source of the NMOS transistor, and connects a resistor in parallel with a gate and a source of the NMOS transistor;
an emitter of an NPN triode Q9 is connected with an emitter of a PNP triode Q6, an emitter of a PN triode Q9 and an emitter of a PNP triode Q6 are connected with a grid electrode of an NMOS tube Q11 after passing through a driving resistor R39 and a driving resistor R40 which are connected in parallel, a fast diode D23 is connected with the driving resistor R39 and the driving resistor R40 in parallel, a resistor R47 is connected with the grid electrode and the source electrode of the NMOS tube Q11 in parallel, a fast diode D28 and another RC absorption circuit (composed of a resistor R55 and a capacitor C58 which are connected in series) are connected with a drain electrode and a source electrode of the NMOS tube Q11 in parallel, and a pin 8 and a pin 9 of;
the main winding J4 of the transformer T2 is terminated to a pin 4 of a high-frequency transformer T1, a pin 2 of the high-frequency transformer T1 returns to a central point (CEN) of main voltage after passing through two capacitors C61 and C62 which are connected in parallel, the secondary side of the high-frequency transformer T1 is connected to a pin 3 of a comparator U5A through voltage rectified by a bridge, and a pin 1 of the comparator U5A is connected to a pin 10 of a power driving chip U7.
Further, the digital power amplifier PWM pulse width modulation circuit 14 comprises two groups of PWM power amplifier units, the first group of power amplifier units is provided with an over-temperature protection circuit, a power supply +5V-D is grounded through a resistor R448 and a thermistor PR400, the voltage drop of the thermistor PR400 is detected by using a pin 40 and a pin 42 of a singlechip U16 of the MCU control unit 19, the thermistor PR400 is positioned beside an NMOS tube of the power amplifier, the digital power amplifier PWM pulse width modulation circuit 14 is distributed on an upper layer circuit board, other circuits are distributed on a lower layer circuit board, and the whole circuit is assembled on a U-shaped radiating fin, so that the digital power amplifier PWM pulse width modulation circuit 14 has good radiating conditions and is convenient to assemble and;
referring to fig. 5 and 6, a PWM pulse width modulation circuit 14 of a digital power amplifier is shown, in which a pin 15 of a pulse width modulation chip U201 of a first group of power amplifier units is connected to a positive main power source J1 interface after passing through a resistor R218, a pin 9 of the pulse width modulation chip U201 is connected to a negative main power source J2 interface, a pin 14 of the pulse width modulation chip U201 is connected to a gate G of an NMOS FET202 through a resistor R220, a pin 13 of the pulse width modulation chip U201 is connected to a source S of the NMOS FET202 and a drain D of the NMOS FET203, a pin 13 of the pulse width modulation chip U201 outputs a power amplifier signal, a drain of the NMOS FET202 is connected to a positive main power source J1 interface, a pin 16 of the pulse width modulation chip U201 is connected in series to a resistor R504, a positive pole-negative pole of a diode D206 and then to a drain D of the NMOS FET202, a resistor R216 is connected in parallel to the pin 16 and the pin 13 of the pulse width modulation chip U201, one end of the resistor R215 is connected to a positive, Resistor R222), and another RC absorption circuit (composed of resistor R223 and capacitor C226 connected in series) is connected in parallel between the drain D and the source S of the NMOS transistor FET 203;
the pin 10 of the pulse width modulation chip U201 is connected to the source electrode of the NMOS tube FET203 through a resistor R253 and the anode-cathode of a light emitting diode DS201, the second group of power amplification units are the same as the first group of power amplification units, when signals are input, the signals of the second group are the reverse phases of the first group, the signals are output in a bridging mode after being filtered by LC at the output part, and the power is up to 3000W/4 ohm.
The digital power amplifier PWM pulse width modulation circuit 14 is connected with interfaces J9, J10, J12, J7, 11 and J8 of other circuits through an interface J1, an interface J2, an interface J3, an interface J4, an interface J5 and an interface J6.
Further, the circuit of the MCU control unit 19 is shown in fig. 7, and a pin 38 of an MCU control chip U16 of the MCU control unit 19 is connected to +5V power supply + 5V; after a pin 44 of the MCU control chip U16 is connected to an inductor L5, the MCU control chip U16 is connected to a main power positive voltage detection (power supply + 85V); after the pin 1 of the MCU control chip U16 is connected to the inductor L8, the MCU control chip U16 is connected to the output negative terminal for voltage detection; pin 3 of the MCU control chip U16 is connected to the inductor L9 and is connected to the output positive terminal voltage detection; the MCU control chip U16 pin 5 and pin 7 are connected to the interface COM1 and used for downloading and updating programs; the pin 12 of the MCU control chip U16 is connected to a power supply of +5V through a resistor R178 and the cathode-anode of a light emitting diode D81;
a pin 18 of the control chip U16 is connected to a base B of an NPN triode Q13 through an inductor L3, a positive electrode-negative electrode of a diode D4 and a resistor R67, and a pin 19 of the control chip U16 is connected to a base B of an NPN triode Q13 through an inductor L4, a positive electrode-negative electrode of a diode D5 and a resistor R68 and used for a fan accelerating circuit; a pin 21 of the control chip U16 is connected to the anode of the diode D76 through a resistor R187 and a pin 23 through a resistor R186, a pin 22 of the control chip U16 is connected to the anode of the diode D75 through a resistor R185 and a pin 24 through a resistor R184, and the cathodes of the diode D75 and the diode D76 are connected to a pin 1 of an optical coupler U18 of the audio compression circuit 20; for controlling the input signal compression.
The pin 30 of the control chip U16 is connected to the base of an NPN triode Q22 through a resistor R145, the emitter of the NPN triode Q22 is connected to the anode of a light-emitting diode D82, the cathode of the light-emitting diode D82 is grounded, and the collector of the NPN triode Q22 is connected to the +12V power supply through a resistor R146.
Further, a pin 1 of a compression chip IC2 of the audio compression circuit 20 is connected to a pin 3 of an optical coupler U18 and a pin 3 of a switching tube (triac) D78 through a resistor R161 and a resistor R165, a pin 4 of an optical coupler U18 is connected to a +12V end of a power supply through a resistor R159, a pin 2 of the compression chip IC2 is connected to the +12V end of the power supply through a resistor R166, a pin 3 of a compression chip IC2 is grounded through a resistor R167, a pin 4 of a compression chip IC2 is connected to a pin 2 of an operational amplifier U20A through a resistor R169, a pin 5 of the compression chip IC2 is connected to a pin 3 of the operational amplifier U20A, and a pin 1 (an output end) of the operational amplifier U20A is connected to a pin 3 of a comparator U19A and a.
The pin 31 and the pin 34 of the chip of the control chip U16 are connected with a resistor through a diode D45 and a diode D44 respectively to the base of the triode Q20 for controlling the power-off of the PWM chip, and the pin 32 and the pin 35 of the control chip U16 are connected with the pin 1 of the comparator U13 through resistors for detecting the state of the PWM chip.
Further, in the positive voltage series resistor after the main power is rectified and filtered by the main power bridge rectifier and filter circuit 11, the voltage drop across the resistor is detected by the transistor Q15, and when the load of the power is too high, the transistor Q15 drives the transistor Q16 to provide a signal to the audio compression circuit 20, so that the input signal is compressed, and the output distortion is avoided.
The power supply is started in a mode shown in fig. 2A, fig. 2B and fig. 2C, and ac input reaches pin 1 and pin 3 of a socket J16, reaches a socket J15 through a cable socket connection, reaches a fuse F1 and a thermistor PR2, and then enters a bridge rectifier filter bridge BD1 of a first bridge rectifier filter circuit 01, wherein D20 is a gas discharge tube. When the voltage is applied to a 110VAC voltage segment, and the power is switched in 220VAC, the gas discharge tube D20 acts to break the fuse F1, so that the protection effect is achieved; when a switch connected with the socket CN3 is closed, the flyback switching power supply circuit 02 is started, three voltages of VCC-PRI, +15V-PRI and +5VP are obtained after the secondary end of the transformer T3 is stabilized through rectification filtering, the secondary winding of the transformer T3 is grounded after passing through the anode-cathode of the diode D42 and the capacitor C102, the secondary winding of the transformer T3 is rectified and filtered through the anode-cathode of the diode D42 and the capacitor C102, the secondary winding of the transformer T3 is grounded after passing through the anode-cathode of the diode D42, the resistor R88 and the anode-cathode of the light emitting diode D53, and the light emitting diode D53 plays a role in indication;
the negative electrode of a diode D42 is connected to the negative electrode of a voltage regulator tube D54, the positive electrode of a voltage regulator tube D54 is connected to a pin 1 of an optocoupler IC1 through a resistor R89, a pin 5 of an optocoupler IC1 is connected with the negative electrode of a diode D41, the positive electrode of a diode D41 is connected with a pin 4 of a transformer T3, a pin 4 of an optocoupler IC1 is connected with a pin 4 of a flyback switching power supply driving chip U10 for feedback, wherein +5VP voltage supplies power to the power supply control chip U15 of the power supply control circuit 03, then the pin 5 of the power supply control chip U15 controls the closing of a relay RY1 of the soft switching starting circuit 04 through a triode Q18, and alternating current reaches a resistor R3, a resistor R4 and a thermistor PR1 of the switching impact current protection circuit 05 after passing through the relay RY.
The audio compression circuit 20 circuit is shown in fig. 8, a pin 1 of a compression chip IC2 is respectively connected with a pin 3 of an optocoupler U18, a pin 3 of a switching tube (bidirectional thyristor) D78 through a resistor R161 and a resistor R165, a pin 4 of the optocoupler U18 is connected with a resistor R159 to +12V of a power supply, a pin 2 of the compression chip IC2 is connected to +12V of the power supply through a resistor R166, a pin 3 of a compression chip IC2 is grounded through a resistor R167, a pin 4 of the compression chip IC2 is connected to a pin 2 of an operational amplifier U20A through a resistor R169, a pin 5 of the compression chip IC2 is connected to a pin 3 of the operational amplifier U20A, an output of a pin 1 of the operational amplifier U20A is connected to a pin 3 of a comparator U19 36, when the main power supply load is too heavy, the triode Q16 is driven by the triode Q15 to conduct the optocoupler U18 to play a role in compression, when the MCU detects that the power amplifier temperature is too high, the audio compression circuit 20 at the input end is controlled through pins 21-24 of the MCU control chip U16.
The above-mentioned embodiments only represent some embodiments of the present invention, and the description thereof is specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.
Claims (9)
1. The utility model provides a power amplifier module of high-power 6000W digital power amplifier, contains: the soft switch starting circuit (04) is characterized in that the input end of the soft switch starting circuit (04) is connected with an AC input, and reaches a half-bridge switch power supply circuit (08) after passing through a switch impact current protection circuit (05), a second bridge rectifier and filter circuit (06) and a PFC circuit (07), and the half-bridge switch power supply circuit (08) is connected with an auxiliary power supply 1 rectifier and filter circuit (10), a main power supply bridge rectifier and filter circuit (11), an auxiliary power supply 2 rectifier and filter circuit (12), an auxiliary power supply 3 rectifier and filter circuit (16) and an auxiliary power supply 4 rectifier and filter circuit (22) after passing through a transformer isolation output circuit (09);
the auxiliary power supply 2 rectifying and filtering circuit (12) outputs 3000W/4 ohm through a circuit channel after passing through a PWM driving power supply circuit (13), a digital power amplifier PWM pulse width modulation circuit (14) and an LC filtering circuit (15);
an auxiliary power supply 3 rectification filter circuit (16) is connected to an MCU control unit (19) through a +/-12V auxiliary power supply circuit (17) and a +5V auxiliary power supply circuit (18); the auxiliary power supply 4 rectifying and filtering circuit (22) is connected to the MCU control unit (19) through the fan power supply output circuit (23); the MCU control unit (19) is connected with an audio compression circuit (20) and a temperature detection circuit (21), the input end of the audio compression circuit (20) is connected with a signal input, and the output end of the audio compression circuit (20) is connected with a digital power amplifier PWM (pulse width modulation) circuit (14);
the auxiliary power supply 2 rectifying and filtering circuit (12) is connected with a digital power amplifier PWM pulse width modulation circuit (14) after passing through a main power supply bridge type rectifying and filtering circuit (11);
the MCU control unit (19) is connected with a fan power supply output circuit (23).
2. The power amplifier module of a high-power 6000W digital power amplifier as claimed in claim 1, wherein the AC input is connected to the input terminal of the first bridge rectifier filter circuit (01), the output terminal of the first bridge rectifier filter circuit (01) is connected to the power control circuit (03), the soft switch start circuit (04), the half-bridge switch power circuit (08) through the flyback switch power circuit (02), and the power control circuit (03) is connected to the soft switch start circuit (04);
the flyback switching power supply circuit (02) is connected with the soft switch starting circuit (04), alternating current input firstly passes through the first bridge type rectification filter circuit (01), rectified direct current enters the flyback switching power supply circuit (02), an output power supply supplies power to the power supply control circuit (03), the PFC circuit (07) and the half-bridge switching power supply circuit (08) after rectification and filtering, the power supply control circuit (03) is communicated with the soft switch starting circuit (04) after being electrified, and the main power supply bridge type rectification filter circuit (11) is switched on.
3. The power amplifier module of claim 1, wherein the PFC circuit (07) drives two parallel NMOS Q4 and NMOS Q5 by a PFC driver chip U8 in a totem pole manner, and pin 3 of the PFC driver chip U8 is connected to the source S of the NMOS Q4 and the NMOS Q5 through a resistor R1 and parallel resistors R11 to R18; a pin 4 of a PFC driving chip U8 is connected to a drain D of an NMOS tube Q4 and an NMOS tube Q5 through a resistor R64, a resistor R63 and an inductor L2;
a pin 7 of a PFC driving chip U8 is connected to an emitter E of an NPN triode Q2 in the flyback switching power supply circuit (02) through a resistor R10, a collector C of the NPN triode Q2 is connected to a +15V-PRI end, and a pin 8 of the PFC driving chip U8 is connected to a base B of an NPN triode Q1 and a base B of a PNP triode Q14; an emitter of an NPN triode Q1 is connected with an emitter of a PNP triode Q14, an emitter of an NPN triode Q1 and an emitter of a PNP triode Q14 are connected to a grid G of an NMOS tube Q4 through a driving resistor R19, and an emitter of an NPN triode Q1 and an emitter of a PNP triode Q14 are connected to a grid G of an NMOS tube Q5 through a driving resistor R20; the collector of the PNP triode Q14 is grounded, the collector of the NPN triode Q1 is connected to the pin 2 of the PFC driving chip U8 through the resistor R5, and the collector of the PNP triode Q14 is connected with the pin 1 of the PFC driving chip U8.
4. The power amplifier module of claim 3, wherein the driving resistor R19 and the driving resistor R20 are connected in parallel with a fast diode D18 and a fast diode D19, respectively, the anode of the fast diode D18 is connected to the gate G of the NMOS transistor Q4, and the anode of the fast diode D19 is connected to the gate G of the NMOS transistor Q5; a resistor R21 and a resistor R22 are respectively connected in parallel with a grid G and a source S of an NMOS tube Q4 and an NMOS tube Q5, a capacitor C16 and a capacitor C17 are respectively connected in parallel with a drain D and a source S of the NMOS tube Q4 and an NMOS tube Q5, resistors R11-R18 are connected in parallel to the source S of the NMOS tube Q4 and the source S of the NMOS tube Q5, resistors R11-R18 are connected in parallel to serve as short-circuit protection of the NMOS tube Q4 and the NMOS tube Q5, a drain D of the NMOS tube Q4 and a drain D of the NMOS tube Q5 are connected with the anode of a fast diode BD2, the cathode of the fast diode BD2 is connected with a power supply positive VCC, and a resistor R24 and a capacitor C20 are connected in series and then connected in; the source S of the NMOS transistor Q5 is grounded.
5. The power amplifier module of claim 1, wherein the half-bridge switching power supply (08) drives the NMOS transistor in a totem-pole manner, the power driver chip U7 with pin 2 and pin 3 connected to +15V-PRI is powered by a low power switching power supply, the power driver chip U7 with pin 14 connected to +15V-PRI through diode D21 with its cathode-anode connected, the power driver chip U7 with pin 14 connected to the power driver chip U7 with pin 12 through parallel capacitor C52 and capacitor C53, the power driver chip U7 with pin 13 connected to NPN transistor Q8 and base of PNP transistor Q7 through resistor R38, the power driver chip U7 with pin 13 connected to the opto-coupler U2 with pin 1 through resistor R43, the power driver chip U7 with pin 11 connected to base of NPN transistor Q9 and base of PNP transistor Q6 through resistor R37, the base electrode of an NPN triode Q9 and the base electrode of a PNP triode Q6 are connected to a pin 1 of an optocoupler U3 through a resistor R44, an NPN triode Q8 is connected with the emitter electrode of the PNP triode Q7, the emitter electrodes of the NPN triode Q8 and the PNP triode Q7 are connected to the grid electrode of an NMOS tube Q10 after passing through two driving resistors R41 and R42 which are connected in parallel, a fast diode D22 is connected in parallel to the driving resistor R41 and the driving resistor R42, a resistor R48 is connected in parallel between the grid electrode and the source electrode of the NMOS tube Q10, and a fast diode D27 and an RC absorption circuit are connected in parallel between the drain electrode and the.
6. The power amplifier module of claim 5, wherein the emitter of the NPN transistor Q9 is connected to the emitter of the PNP transistor Q6, the emitter of the PN transistor Q9 and the emitter of the PNP transistor Q6 are connected to the gate of the NMOS transistor Q11 through a driving resistor R39 and a driving resistor R40 in parallel, the fast diode D23 is connected in parallel to the driving resistor R39 and the driving resistor R40, the resistor R47 is connected in parallel to the gate and the source of the NMOS transistor Q11, the fast diode D28 and another RC snubber circuit are connected in parallel to the drain and the source of the NMOS transistor Q11, and the pin 8 and the pin 9 of the power driving chip U7 are grounded;
the main winding J4 of the transformer T2 is terminated to a pin 4 of a high-frequency transformer T1, a pin 2 of the high-frequency transformer T1 returns to the central point of main voltage after passing through two capacitors C61 and C62 which are connected in parallel, the secondary of the high-frequency transformer T1 is connected to a pin 3 of a comparator U5A through voltage rectified in a bridge mode, and a pin 1 of the comparator U5A is connected to a pin 10 of a power driving chip U7.
7. The power amplifier module of a high-power 6000W digital power amplifier of claim 1, characterized by that, the said digital power amplifier PWM pulse width modulation circuit (14) includes two groups of PWM power amplifier units, there are over-temperature protective circuits on the first group of power amplifier units, the power +5V-D is grounded through resistance R448, thermistor PR400, use MCU control unit (19) one-chip computer U16 pin 40 and pin 42 to detect the voltage drop of thermistor PR400, its thermistor PR400 locates at the power amplifier NMOS tube side;
the pin 15 of the pulse width modulation chip U201 of the first group of power amplification units is connected with a positive main power supply J1 interface after passing through a resistor R218, the pin 9 of the pulse width modulation chip U201 is connected with a negative main power supply J2 interface, the pin 14 of the pulse width modulation chip U201 is connected with the grid G of an NMOS tube FET202 through a resistor R220, the pin 13 of the pulse width modulation chip U201 is connected with the source S of the NMOS tube FET202 and the drain D of the NMOS tube FET203, the pin 13 of the pulse width modulation chip U201 outputs a power amplification signal, the drain of the NMOS tube FET202 is connected with a positive main power supply J1 interface, the pin 16 of the pulse width modulation chip U201 is connected with a resistor R504 in series, the positive pole-negative pole rear of a diode D206 is connected with the drain D of the NMOS tube FET202, a resistor R216 is connected in parallel with the pin 16 and the pin 13, an RC absorption circuit is connected in parallel between the drain D and the source S of the NMOS tube FET202, and another RC absorption circuit is connected in parallel between the drain D and the source S of the NMOS tube FET 203;
the pin 10 of the pulse width modulation chip U201 is connected to the source electrode of the NMOS tube FET203 through a resistor R253 and the anode-cathode of a light emitting diode DS201, the second group of power amplification units are the same as the first group of power amplification units, and a digital power amplification PWM circuit (14) is connected with interfaces J9, J10, J12, J7, an interface 11 and J8 of other circuits through an interface J1, an interface J2, an interface J3, an interface J4, an interface J5 and an interface J6.
8. The power amplifier module of a high-power 6000W digital power amplifier as claimed in claim 1, wherein pin 38 of MCU control chip U16 of said MCU control unit (19) is connected to +5V power supply + 5V; after a pin 44 of the MCU control chip U16 is connected to the inductor L5, the MCU control chip U16 is connected to a main power supply positive voltage for detection; after the pin 1 of the MCU control chip U16 is connected to the inductor L8, the MCU control chip U16 is connected to the output negative terminal for voltage detection; pin 3 of the MCU control chip U16 is connected to the inductor L9 and is connected to the output positive terminal voltage detection; the MCU control chip U16 pin 5 and pin 7 are connected to the interface COM1 and used for downloading and updating programs; the pin 12 of the MCU control chip U16 is connected to a power supply of +5V through a resistor R178 and the cathode-anode of a light emitting diode D81;
a pin 18 of the control chip U16 is connected to a base B of an NPN triode Q13 through an inductor L3, a positive electrode-negative electrode of a diode D4 and a resistor R67, and a pin 19 of the control chip U16 is connected to a base B of an NPN triode Q13 through an inductor L4, a positive electrode-negative electrode of a diode D5 and a resistor R68; a pin 21 of the control chip U16 is connected to the anode of the diode D76 through a resistor R187 and a pin 23 through a resistor R186, a pin 22 of the control chip U16 is connected to the anode of the diode D75 through a resistor R185 and a pin 24 through a resistor R184, and the cathodes of the diode D75 and the diode D76 are connected to a pin 1 of an optical coupler U18 of the audio compression circuit (20);
the pin 30 of the control chip U16 is connected to the base of an NPN triode Q22 through a resistor R145, the emitter of the NPN triode Q22 is connected to the anode of a light-emitting diode D82, the cathode of the light-emitting diode D82 is grounded, and the collector of the NPN triode Q22 is connected to the +12V power supply through a resistor R146.
9. The power amplifier module of claim 1, wherein a pin 1 of a compression chip IC2 of the audio compression circuit (20) is connected to a pin 3 of an optical coupler U18 and a pin 3 of a switch tube D78 through a resistor R161 and a resistor R165, a pin 4 of the optical coupler U18 is connected to a +12V terminal of a power supply through a resistor R159, a pin 2 of the compression chip IC2 is connected to the +12V terminal of the power supply through a resistor R166, a pin 3 of the compression chip IC2 is grounded through a resistor R167, a pin 4 of the compression chip IC2 is connected to a pin 2 of the operational amplifier U20A after passing through a resistor R169, a pin 5 of the compression chip IC2 is connected to a pin 3 of the operational amplifier U20A, and a pin 1 of the operational amplifier U20A is connected to a pin 3 of a comparator U19A and a pin 6 of the comparator U19B through a resistor R.
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