CN213635975U - Array substrate and display screen - Google Patents

Array substrate and display screen Download PDF

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CN213635975U
CN213635975U CN202022392722.XU CN202022392722U CN213635975U CN 213635975 U CN213635975 U CN 213635975U CN 202022392722 U CN202022392722 U CN 202022392722U CN 213635975 U CN213635975 U CN 213635975U
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layer
substrate
silicon dioxide
array
dioxide layer
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陈建伦
徐阳
刘力明
胡君文
李伟界
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Truly Huizhou Smart Display Ltd
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Truly Huizhou Smart Display Ltd
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Abstract

The application relates to an array substrate, which is applied to electronic products and comprises a substrate, an array module and an anti-static layer, wherein the array module is arranged on one surface of the substrate, and the anti-static layer is arranged on the other surface of the substrate; the antistatic layer at least comprises a silicon dioxide layer, and one surface of the silicon dioxide layer, which is far away from the substrate, is a flat surface. The beneficial effects are that: the silicon dioxide layer is arranged on the back surface of the substrate, and the surface of the silicon dioxide layer is smaller than that of the substrate made of the mother glass; and is more easily separated from static electricity by intermolecular forces. This application silica dioxide layer surface levels the processing, carries out one step enhancement silica dioxide layer surface separation static effect.

Description

Array substrate and display screen
Technical Field
The application relates to the technical field of display equipment manufacturing, in particular to an array substrate and a display screen.
Background
The thin TFT LCD liquid crystal display screen and the OLED organic light emitting display screen are widely applied to mobile phones, televisions, vehicles and wearing. The TFT LCD liquid crystal display module comprises a backlight, a polaroid, an IC/FPC, a TFT panel and the like, wherein the TFT panel is obtained by cutting the TFT LCD panel. Similarly, the AMOLED panel comprises the AMOLED panel. The invention is applied to the TFT LCD panel and AMOLED panel manufacturing industry. The TFT LCD is formed by combining an ARRAY ARRAY large plate and a CF color film large plate, the AMOLED is formed by combining an ARRAY large plate of LTPS/IGZO and a cover plate, and the AMOLED is manufactured by the ARRAY large plate. The ARRAY large board mainly comprises substrate glass, and metal wiring, an insulating layer, a capacitor, a field effect transistor switch and the like which are manufactured on the substrate glass. An Array large plate (Array) of a TFT LCD or an AMOLED display panel needs to be provided with a plurality of layers of metal and nonmetal patterns, each layer is subjected to the working procedures of cleaning/film forming, gluing, exposure, development, etching, film stripping and the like, a glass substrate is contacted and separated with an equipment platen and a pin needle for a plurality of times, and the separation process is always accompanied with the generation of separation static electricity. The problems caused by the damage of the separated static electricity to products are prevented, and the steps of static electricity removal, the periodical replacement/renovation of a bedplate, the addition of an ion fan, soft X-RAY and the like are often needed.
Content of application
This application prevents among the prior art that separation static from destroying the product and causing bad problem, and the technical problem that this application will solve provides an array substrate and display screen.
An array substrate applied in electronic products comprises a substrate, an array module and an anti-static layer,
the array module is arranged on one surface of the substrate, and the antistatic layer is arranged on the other surface of the substrate;
the antistatic layer at least comprises a silicon dioxide layer, and one surface of the silicon dioxide layer, which is far away from the substrate, is a flat surface.
Optionally, a difference between the highest position and the lowest position of the flat surface is less than 5 nm.
Optionally, the antistatic layer further comprises an electrostatic dispersion layer disposed between the substrate and the silicon dioxide layer.
Optionally, the electrostatic dispersion layer is an indium tin oxide layer.
Optionally, the electrostatic dispersion layer has a thickness of 10-70 nm.
Optionally, the thickness of the silicon dioxide layer is 100-500 nm.
Optionally, the array module includes a first transparent conductive layer, a first electrode, a first insulating layer, a second electrode, a second insulating layer, and a metal electrode, which are sequentially disposed on the substrate, and the metal electrode penetrates through the second insulating layer and is connected to the second electrode.
Optionally, the substrate is a mother glass.
In addition, the application also provides a display screen which comprises the array substrate.
The embodiment of the application discloses an AMOLED display module. The beneficial effects are that:
(1) according to the glass substrate, the silicon dioxide layer is arranged on the back surface of the substrate, and the surface energy of the silicon dioxide layer is smaller than that of the substrate made of the glass substrate, so that the silicon dioxide is more easily separated from static electricity under the action of Van der Waals molecular force.
(2) This application silica layer surface carries out leveling, makes the silica layer keep away from a base plate surface and is the levelling surface, and its smooth silica surface separation static effect is better.
(3) The electrostatic dispersion layer is arranged between the silicon dioxide layer and the substrate, so that static electricity accumulated on the substrate can be well dispersed, and the effect of separating the static electricity is further enhanced; meanwhile, the surface of the silicon dioxide layer is smoother by arranging the static electricity dispersing layer.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic view of an array substrate provided in an embodiment of the present application.
Fig. 2 is a micrograph of a planarized antistatic layer provided in the examples of the present application.
FIG. 3 is a schematic representation of the surface energies of various inorganic materials provided in the examples of the present application.
Fig. 4 is a diagram illustrating an effect of separating static electricity from substrates on different back surfaces according to an embodiment of the present application.
Detailed Description
Referring to the drawings, wherein like reference numbers refer to like elements, the principles of the present application are illustrated as being implemented in a suitable computing environment. The following description is based on illustrated embodiments of the application and should not be taken as limiting the application with respect to other embodiments that are not detailed herein.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
In order to solve the problems of the prior art, an embodiment of the present invention provides an array substrate, referring to fig. 1 to 4, applied to an electronic product, including a substrate 1, an array module, and an anti-static layer 3, where the array module is disposed on one surface of the substrate 1, and the anti-static layer 3 is disposed on the other surface of the substrate 1; the antistatic layer 3 at least comprises a silicon dioxide layer 31, and one surface of the silicon dioxide layer 31 away from the substrate 1 is a flat surface. According to the silicon dioxide electrostatic separation device, the silicon dioxide layer 31 is arranged on the back surface of the substrate 1, and the surface energy of the silicon dioxide layer 31 is smaller than that of the substrate 1 made of the mother glass, so that the silicon dioxide is easier to separate from static electricity under the action of van der Waals molecular force.
In some embodiments, the difference between the highest and lowest positions of the flat surface is less than 5 nm; in this embodiment, the highest of the planar surfaces is the lowest, i.e. the height of the outer surface of the silicon dioxide layer 31, i.e. the highest point-to-lowest difference of the outer surface of the silicon dioxide layer 31 is less than 5 nm. This application silica layer 31 surface is leveled the processing, makes silica layer 31 keep away from 1 surface of base plate for the burnishing surface, and its smooth silica surface separation static effect is better.
In some embodiments, the antistatic layer 3 further includes an electrostatic dispersion layer 32, and the electrostatic dispersion layer 32 is disposed between the substrate 1 and the silicon dioxide layer 31. In the application, the static electricity dispersing layer 32 is arranged between the silicon dioxide layer 31 and the substrate 1, so that static electricity accumulated on the substrate 1 can be well dispersed, and the static electricity separating effect is further enhanced; meanwhile, the surface of the silicon dioxide layer 31 is made more flat by providing the static electricity dispersion layer 32. The electrostatic dispersion layer 32 is an indium tin oxide layer. The substrate 1 is made of insulating materials, accumulated static electricity cannot be well dispersed, so that a transparent conductive static electricity dispersion film can be plated on the surface of the substrate, meanwhile, the resistance is too small, such as Al film, induction static electricity and induced static electricity are easy to generate, and ITO (indium tin oxide) is an ideal material. The carbon nanotube material is difficult to be compatible because the organic binder easily pollutes the CVD chamber.
In some embodiments, the ARRAY substrate of the present application is applied to electronic products, and is particularly applied to prevention of separation static electricity in an ARRAY large plate manufacturing process of TFT LCD panels and AMOLED panels. Before the array substrate is manufactured, the back surface of the substrate 1 or the back surface of a loading glass such as ultrathin products of glass on carrier and flexible products of PI on carrier is coated with a layer of SiO2 by a PECVD method. A layer of static electricity dispersing layer ITO with the thickness of 10-70nm is plated on the back surface of a substrate 1 or the back surface of a loading glass by a PVD method, then a layer of 100-500nm silicon dioxide layer SiO2 is plated, and the surface of the SiO2 is in a very flat state, as shown in figure 2, the silicon dioxide layer SiO2, the static electricity dispersing layer ITO and the substrate 1 are respectively arranged from top to bottom in figure 2, and as can be seen from the figure, the difference between the highest position and the lowest position of the flat surface of the silicon dioxide layer SiO2 is less than 5 nm.
Referring to fig. 3, the surface energy of the mother glass substrate 1 is much greater than that of pure SiO2, and it is not easily separated after contacting with other objects under the action of van der waals molecular force; and the silicon dioxide layer is added on the back surface of the substrate 1 to lower the whole surface of the array substrate 1. Wherein, the surface energy is the energy of the surface particles relative to the internal particles. Under the conditions of constant temperature, constant pressure and constant composition of surface energy, the reversible increase of the surface area of a material system needs to do non-volume work on the material. Surface energy is a measure of the breakdown of chemical bonds between molecules when creating a surface of a substance.
Referring to fig. 4, in the present embodiment, different substrate 1 back side film layer types such as film-free layer-elemental glass, electrostatic separation layer ITO, silicon dioxide layer SiO2, ITO + SiO2, and uneven ITO + SiO2 are also provided. The test results are given in the following table:
Figure BDA0002737953040000041
referring to the above table, the flat ITO + Si02 and ITO of the present application have the best electrostatic separation effect, but the single ITO has low hardness.
In addition, the antistatic layer of this application still can set up on carrying glass, and ultra-thin array glass of carrying glass carrier, the back adopts antistatic layer, like SI02 and ITO, when making carrying glass place the transportation on the platen, realizes separating static effect.
In some embodiments, the array module 2 includes a first transparent conductive layer 21, a first electrode 22, a first insulating layer 23, a second electrode 24, a second insulating layer 25, and a metal electrode 26 sequentially disposed on the substrate 1, and the metal electrode 26 is connected to the second electrode 24 through the second insulating layer 25. The substrate 1 is made of mother glass. In this embodiment, the array module 2 may include a first transparent conductive layer 21, a first electrode 22, a first insulating layer 23, a second electrode 24, a second insulating layer 25, and a metal electrode 26, where the first transparent conductive layer 21, the first electrode 22, the first insulating layer 23, the second electrode 24, the second insulating layer 25, and the metal electrode 26 are sequentially disposed on the substrate 1, and each layer is subjected to cleaning/film forming, glue coating, exposure, development, etching, film stripping, and other processes. And forming the final array large plate of the TFT LCD and AMOLED display panel.
In addition, the application also provides a display screen which comprises the array substrate. According to the glass substrate, the silicon dioxide layer is arranged on the back surface of the substrate, and the surface energy of the silicon dioxide layer is smaller than that of the substrate made of the glass substrate, so that the silicon dioxide is more easily separated from static electricity under the action of Van der Waals molecular force. This application silica layer surface carries out leveling, makes the silica layer keep away from a base plate surface and is the levelling surface, and its smooth silica surface separation static effect is better. The static electricity dispersing layer 32 is arranged between the silicon dioxide layer and the substrate, so that static electricity accumulated on the substrate can be well dispersed, and the static electricity separating effect is further enhanced; meanwhile, the surface of the silicon dioxide layer is smoother by arranging the static electricity dispersion layer 32.
The use of the terms "a" and "an" and "the" and similar referents in the context of describing the concepts of the application (especially in the context of the following claims) are to be construed to cover both the singular and the plural. Moreover, unless otherwise indicated herein, recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range, unless otherwise indicated herein, and each separate value is incorporated into the specification as if it were individually recited herein. In addition, the steps of all methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The variations of the present application are not limited to the described order of the steps. The use of any and all examples, or exemplary language (e.g., "such as") provided herein, is intended merely to better illuminate the concepts of the application and does not pose a limitation on the scope of the concepts of the application unless otherwise claimed. Various modifications and adaptations will be apparent to those skilled in the art without departing from the spirit and scope.
The electronic device control method, apparatus, storage medium, and electronic device provided in the embodiments of the present application are described in detail above, and a specific example is applied in the present application to explain the principle and the implementation of the present application, and the description of the above embodiments is only used to help understand the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (9)

1. An array substrate applied in electronic products is characterized in that the array substrate comprises a substrate (1), an array module (2) and an anti-static layer (3),
the array module (2) is arranged on one surface of the substrate (1), and the anti-static layer (3) is arranged on the other surface of the substrate (1);
the antistatic layer (3) at least comprises a silicon dioxide layer (31), and one surface, away from the substrate (1), of the silicon dioxide layer (31) is a flat surface.
2. The array substrate of claim 1, wherein the difference between the highest and the lowest of the planar surfaces is less than 5 nm.
3. An array substrate according to claim 1, wherein the antistatic layer (3) further comprises an electrostatic dispersion layer (32), and the electrostatic dispersion layer (32) is disposed between the substrate (1) and the silicon dioxide layer (31).
4. An array substrate according to claim 3, wherein the electrostatic dissipative layer (32) is an indium tin oxide layer.
5. An array substrate according to claim 3, wherein the electrostatic dissipative layer (32) has a thickness of 10 to 70 nm.
6. The array substrate as claimed in claim 3, wherein the thickness of the silicon dioxide layer (31) is 100-500 nm.
7. The array substrate according to claim 1, wherein the array module (2) comprises a first transparent conductive layer (21), a first electrode (22), a first insulating layer (23), a second electrode (24), a second insulating layer (25), and a metal electrode (26) sequentially disposed on the substrate (1), and the metal electrode (26) is connected to the second electrode (24) through the second insulating layer (25).
8. An array substrate according to claim 1, wherein the substrate (1) is a glass.
9. A display panel comprising an array substrate according to any one of claims 1 to 8.
CN202022392722.XU 2020-10-22 2020-10-22 Array substrate and display screen Active CN213635975U (en)

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