CN213341680U - Isolated wake-up circuit and power supply equipment - Google Patents
Isolated wake-up circuit and power supply equipment Download PDFInfo
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- CN213341680U CN213341680U CN202021861965.7U CN202021861965U CN213341680U CN 213341680 U CN213341680 U CN 213341680U CN 202021861965 U CN202021861965 U CN 202021861965U CN 213341680 U CN213341680 U CN 213341680U
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- 230000033228 biological regulation Effects 0.000 claims description 4
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Abstract
The utility model discloses an keep apart awakening circuit and power supply unit, keep apart awakening circuit and include: the device comprises an isolation module, a voltage stabilizing module, a first power supply and a module to be awakened; the input side of the isolation module is electrically connected with the processor; the output side of the isolation module is respectively and electrically connected with the voltage stabilizing module and the module to be awakened, the first power supply is electrically connected with the voltage stabilizing module and the module to be awakened, or the module to be awakened is electrically connected with the output side of the isolation module through the voltage stabilizing module, and the first power supply is electrically connected with the output side of the isolation module and the module to be awakened; the isolation module is configured to conduct a loop formed by the first power supply, the output side of the isolation module, the voltage stabilizing module and the module to be awakened after acquiring the awakening instruction sent by the processor, so as to output the awakening voltage stabilized by the voltage stabilizing module to the module to be awakened. The application realizes the technical effects that the circuit structure is simple, the cost is lower, the fluctuation range of the wake-up voltage output by the isolation module is small, the wake-up is reliable, and the influence of power supply voltage fluctuation is avoided.
Description
Technical Field
The embodiment of the utility model provides a relate to power battery system technical field, especially relate to an keep apart awakening circuit and power supply unit.
Background
In electronic system design, an isolation region is usually required to be reserved between high voltage and low voltage to eliminate mutual influence between different potentials, however, the difference of reference potentials at two sides of the isolation region can cause that two sides cannot form a power supply signal loop. At present, the isolation side is mainly powered by isolation communication or cell voltage is directly used for supplying power to the isolation module.
However, the isolation communication is used for implementation, the circuit of the isolation communication is complex, and the transformer is used as an isolation transmission device in a general isolation power supply architecture, so that the transformer can bring problems of volume increase, EMC radiation and the like, and the transformer is usually a customized device and can bring certain improvement on cost; directly use electric core voltage to supply power for isolation module, the voltage of output level can fluctuate along with electric core voltage's fluctuation, and the voltage fluctuation range that leads to output level is big, crosses when low at electric core voltage, has the risk of unable discernment, and when electric core voltage was too high, the level that can lead to exporting was too high and damaged the device pin.
SUMMERY OF THE UTILITY MODEL
The utility model provides an keep apart awakening circuit and power supply unit, realized that circuit structure is simple, the cost is lower, and keep apart the technical effect that module output's awakening voltage fluctuation range is little, awaken up reliably, not influenced by mains voltage fluctuation.
The embodiment of the utility model provides an keep apart awakening circuit, include: the device comprises an isolation module, a voltage stabilizing module, a first power supply and a module to be awakened;
the input side of the isolation module is electrically connected with the processor;
the output side of the isolation module is respectively and electrically connected with the voltage stabilizing module and the module to be awakened, the first power supply is electrically connected with the voltage stabilizing module and the module to be awakened, or the module to be awakened is electrically connected with the output side of the isolation module through the voltage stabilizing module, and the first power supply is electrically connected with the output side of the isolation module and the module to be awakened;
the isolation module is configured to conduct a loop formed by the first power supply, the output side of the isolation module, the voltage stabilizing module and the module to be awakened after acquiring the awakening instruction sent by the processor, so as to output the awakening voltage stabilized by the voltage stabilizing module to the module to be awakened.
Further, the isolation module comprises a first resistor, a second resistor, a third resistor, a first switching tube, an optical coupler and a second power supply;
a first end of the first resistor is used as an input side of the isolation module and is electrically connected with the processor, a second end of the first resistor is electrically connected with a control end of the first switch tube, a first end of the first switch tube is electrically connected with a first end of the optocoupler, and a second end of the first switch tube is grounded;
a second end of the optical coupler is electrically connected with a first end of the second resistor, a third end of the optical coupler is electrically connected with a first end of the third resistor, and a fourth end of the optical coupler is used as a second end of the output side of the isolation module;
the second end of the second resistor is electrically connected with the second power supply, and the second end of the third resistor is used as the first end of the output side of the isolation module.
Furthermore, a first end of the output side of the isolation module is electrically connected with a first end of the voltage stabilizing module, and a second end of the output side of the isolation module is electrically connected with an enabling end of the module to be awakened;
the second end of the voltage stabilizing module is electrically connected with the first power supply, and the power supply input end of the module to be awakened is electrically connected with the first power supply.
Furthermore, a first end of the output side of the isolation module is electrically connected with the first power supply through the third resistor, a second end of the output side of the isolation module is electrically connected with a second end of the voltage stabilizing module, and a first end of the voltage stabilizing module is electrically connected with an enabling end of the module to be awakened;
and the power supply input end of the module to be awakened is electrically connected with the first power supply.
Further, the voltage stabilizing module comprises a fourth resistor, a fifth resistor, a first triode and a first diode;
a control end of the first triode is electrically connected with a cathode of the first diode, a first end of the first triode is electrically connected with a second end of the third resistor, and a second end of the first triode is electrically connected with a first end of the fourth resistor;
the anode of the first diode is grounded; a second end of the fourth resistor is electrically connected with the first power supply; a first end of the fifth resistor is electrically connected with a control end of the first triode, and a second end of the fifth resistor is electrically connected with the first power supply;
the isolation module further comprises a sixth resistor; and the first end of the sixth resistor is electrically connected with the fourth end of the optocoupler, and the second end of the sixth resistor is grounded.
Further, the voltage stabilizing module comprises a seventh resistor, an eighth resistor, a second triode and a second diode;
a first end of the seventh resistor is electrically connected with a fourth end of the optocoupler, and a second end of the seventh resistor is electrically connected with a first end of the second triode;
the first end of the eighth resistor is electrically connected with the fourth end of the optocoupler, and the second end of the eighth resistor is electrically connected with the control end of the second triode;
the second end of the second triode is electrically connected with the enabling end of the module to be awakened, and the power input end of the module to be awakened is electrically connected with the first power supply;
the negative electrode of the second diode is electrically connected with the control end of the second triode, and the positive electrode of the second diode is grounded.
Further, the first power supply is a battery cell.
Further, the isolation module further comprises: a ninth resistor and a first capacitor;
the first end of the ninth resistor is electrically connected with the second end of the first resistor, and the second end of the ninth resistor is grounded; the first end of the first capacitor is electrically connected with the second end of the first resistor, and the second end of the first capacitor is grounded.
Furthermore, the module to be awakened also comprises a power output end, and the power output end of the module to be awakened is electrically connected with a load to be powered.
The embodiment of the utility model provides a still provide a power supply unit, power supply unit includes any one of the above-mentioned embodiments isolation wake-up circuit.
The utility model discloses an keep apart awakening circuit and power supply unit, keep apart awakening circuit and include: the device comprises an isolation module, a voltage stabilizing module, a first power supply and a module to be awakened; the input side of the isolation module is electrically connected with the processor; the output side of the isolation module is respectively and electrically connected with the voltage stabilizing module and the module to be awakened, the first power supply is electrically connected with the voltage stabilizing module and the module to be awakened, or the module to be awakened is electrically connected with the output side of the isolation module through the voltage stabilizing module, and the first power supply is electrically connected with the output side of the isolation module and the module to be awakened; the isolation module is configured to conduct a loop formed by the first power supply, the output side of the isolation module, the voltage stabilizing module and the module to be awakened after acquiring the awakening instruction sent by the processor, so as to output the awakening voltage stabilized by the voltage stabilizing module to the module to be awakened. The utility model discloses a circuit structure is simple, the cost is lower, and the wake-up voltage fluctuation range of isolating module output is little, wake-up reliable, not receive the technological effect of mains voltage fluctuation influence.
Drawings
Fig. 1 is a structural diagram of an isolated wake-up circuit according to an embodiment of the present invention;
fig. 2 is a structural diagram of another isolated wake-up circuit according to an embodiment of the present invention;
fig. 3 is a circuit diagram of an isolation module according to an embodiment of the present invention;
fig. 4 is a circuit diagram of an isolated wake-up circuit according to an embodiment of the present invention;
fig. 5 is a circuit diagram of another isolation module provided in an embodiment of the present invention;
fig. 6 is a circuit diagram of another isolated wake-up circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
It should be noted that the terms "first", "second", and the like in the description and claims of the present invention and the accompanying drawings are used for distinguishing different objects, and are not intended to limit a specific order. The embodiments of the present invention can be implemented individually, and can be implemented by combining each other between the embodiments, and the embodiments of the present invention are not limited to this.
Fig. 1 is a structural diagram of an isolated wake-up circuit according to an embodiment of the present invention. Fig. 2 is a structural diagram of another isolated wake-up circuit according to an embodiment of the present invention.
As shown in fig. 1, the isolated wake-up circuit includes: the device comprises an isolation module 10, a voltage stabilizing module 20, a first power supply VDD and a module to be awakened 30; the input side of the isolation module 10 is electrically connected to the processor 40; the output side of the isolation module 10 is electrically connected to the voltage stabilizing module 20 and the module to be awakened 30, respectively, and the first power supply VDD is electrically connected to the voltage stabilizing module 20 and the module to be awakened 30, or, as shown in fig. 2, the module to be awakened 30 is electrically connected to the output side of the isolation module 10 through the voltage stabilizing module 20, and the first power supply VDD is electrically connected to the output side of the isolation module 10 and the module to be awakened 30.
The isolation module 10 is configured to, after acquiring the wake-up instruction sent by the processor 40, turn on a loop formed by the first power supply VDD, the output side of the isolation module 10, the voltage stabilizing module 20, and the module to be woken up 30, so as to output the wake-up voltage stabilized by the voltage stabilizing module 20 to the module to be woken up 30.
Specifically, the to-be-woken module 30 is generally a power supply device for supplying power to a load, and in order to avoid the influence of voltage fluctuation of the first power supply VDD when the isolation module 10 outputs a wake-up signal (i.e., the above wake-up voltage) to the to-be-woken module 30, a voltage stabilizing module 20 is added. After the processor 40 sends a wake-up instruction to the isolation module 10, the isolation module 10 is turned on, a wake-up loop formed by the output side of the isolation module 10, the voltage stabilizing module 20, the module to be woken up 30 and the first power supply VDD is turned on, and the isolation module 10 outputs a wake-up voltage to the module to be woken up 30; after the wake-up voltage is stabilized by the voltage stabilizing module 20, the wake-up voltage output to the module 30 to be woken up has a small fluctuation range, and is not affected by the voltage fluctuation of the module 30 to be woken up, so that the wake-up is more reliable.
Optionally, the first power supply VDD is a battery cell.
For example, the first power supply VDD may be a battery cell, and is used to supply power to the module to be awakened 30 and the isolation module 10. When the voltage stabilizing module 20 is not arranged, the battery cell directly supplies power to the isolation module 10, and when the isolation module 10 outputs a wake-up voltage to the module to be woken up 30, the battery cell is easy to have a large voltage fluctuation range, so that the fluctuation range of the output wake-up voltage is increased, and the reliability of wake-up is influenced; therefore, the voltage stabilizing module 20 is arranged in the present application, and the wake-up voltage output by the isolation module 10 is stabilized and then transmitted to the module to be awakened 30, so that the problem of low wake-up reliability caused by a large fluctuation range of the cell voltage is avoided.
The utility model discloses a circuit structure is simple, the cost is lower, and the wake-up voltage fluctuation range of isolating module output is little, wake-up reliable, not receive the technological effect of mains voltage fluctuation influence.
Fig. 3 is a circuit diagram of an isolation module according to an embodiment of the present invention.
Optionally, as shown in fig. 3, the isolation module 10 includes a first resistor R1, a second resistor R2, a third resistor R3, a first switch tube Q1, an optocoupler U1, and a second power source VCC; a first end of the first resistor R1 is electrically connected to the processor 40 as an input side of the isolation module 10, a second end of the first resistor R1 is electrically connected to the control end 1 of the first switch tube Q1, a first end 2 of the first switch tube Q1 is electrically connected to the first end 4 of the optocoupler U1, and a second end 3 of the first switch tube Q1 is grounded; a second end 5 of the optical coupler U1 is electrically connected with a first end of a second resistor R2, a third end 6 of the optical coupler U1 is electrically connected with a first end of a third resistor R3, and a fourth end 7 of the optical coupler U1 is used as a second end of the output side of the isolation module 10; a second terminal of the second resistor R2 is electrically connected to the second power source VCC, and a second terminal of the third resistor R3 serves as a first terminal of the output side of the isolation module 10.
Alternatively, as shown in fig. 3, a first end of the output side of the isolation module 10 is electrically connected to a first end of the voltage stabilizing module 20, and a second end of the output side of the isolation module 10 is electrically connected to the enable end EN of the module to be waken 30; the second end of the voltage stabilizing module 20 is electrically connected to the first power supply VDD, and the power input end VI of the to-be-awakened module 30 is electrically connected to the first power supply VDD.
For example, referring to fig. 3, the first switch Q1 may be an NPN-type fet, the control terminal 1, the first terminal 2 and the second terminal 3 of the first switch Q1 are the gate, the drain and the source of the NPN-type fet respectively, when the isolation module 10 receives the wake-up command from the processor 40, the first switch Q1 is turned on, the first terminal 2 of the first switch Q1 outputs a low level, the second power VCC selects a high level, the optical coupler U1 is turned on, the loop formed by the output side of the optical coupler U1, the voltage regulation module 20, the module to be wakened 30 and the first power supply VDD is turned on, the first power supply VDD supplies power to the voltage regulation module 20, under the voltage stabilizing effect of the voltage stabilizing module 20, the output side of the isolation module 10 outputs a wake-up voltage stabilized by the voltage stabilizing module 20 to the enable end EN of the to-be-woken-up module 30, the to-be-woken-up module 30 is woken up, and power is supplied to the to-be-supplied load V-supply through the power output end VO.
Fig. 4 is a circuit diagram of an isolated wake-up circuit according to an embodiment of the present invention.
Optionally, as shown in fig. 4, the voltage stabilizing module 20 includes a fourth resistor R4, a fifth resistor R5, a first transistor Q2, and a first diode D1; a control end a of the first triode Q2 is electrically connected with the cathode of the first diode D1, a first end b of the first triode Q2 is electrically connected with a second end of the third resistor R3, and a second end c of the first triode Q2 is electrically connected with a first end of the fourth resistor R4; the anode of the first diode D1 is grounded; a second end of the fourth resistor R4 is electrically connected to the first power supply VDD; a first end of the fifth resistor R5 is electrically connected to the control end a of the first triode, and a second end of the fifth resistor R5 is electrically connected to the first power supply VDD; as shown in fig. 3 and 4, the isolation module 10 further includes a sixth resistor R6; the first end of the sixth resistor R6 is electrically connected with the fourth end 7 of the optocoupler U1, and the second end of the sixth resistor R6 is grounded.
Illustratively, the first triode Q2 may be an NPN-type triode, the control terminal a, the first terminal b, and the second terminal c of the first triode Q2 are respectively a base, an emitter, and a collector of the NPN-type triode, the fourth resistor R4 and the fifth resistor R5 function as voltage divider, the first diode D1 functions as voltage regulator, and the voltage regulator of the voltage regulator module 20 regulates the voltage of the wake-up voltage output by the isolation module 10 to the enable terminal EN of the to-be-woken module 30 to be not affected by the voltage fluctuation of the first power VDD, that is, the voltage value of the wake-up voltage is neither too high nor too low, and the wake-up voltage can be stably and reliably transmitted to the to-be-woken module 30 to wake up the to-be-woken module 30, so as to supply power to the to-be-supplied load V-.
Specifically, referring to fig. 3 and 4, the isolation module 10 further includes a sixth resistor R6, and a second end of the sixth resistor R6 is grounded, so that when the optocoupler U1 is not turned on, the level of the enable end EN of the module to be woken 30 can be pulled down, and the stability of the module to be woken 30 is ensured.
Fig. 5 is a circuit diagram of another isolation module according to an embodiment of the present invention.
Alternatively, as shown in fig. 5, a first end of the output side of the isolation module 10 is electrically connected to the first power supply VDD through a third resistor R3, a second end of the output side of the isolation module 10 is electrically connected to a second end of the voltage stabilizing module 20, and a first end of the voltage stabilizing module 20 is electrically connected to the enable end EN of the module to be woken 30; the power input terminal VI of the module to be woken 30 is electrically connected to the first power supply VDD.
For example, referring to fig. 5, when the isolation module 10 receives a wake-up command sent by the processor 40, the first switching tube Q1 is turned on, the first end 2 of the first switching tube Q1 outputs a low level, the second power VCC usually selects a high level, the optical coupler U1 is turned on, a loop formed by the output side of the optical coupler U1, the voltage stabilizing module 20, the module to be woken 30, and the first power VDD is turned on, the first power VDD supplies power to the output side of the isolation module 10, the output side of the isolation module 10 outputs a wake-up voltage to the enable end EN of the module to be woken 30 through the voltage stabilizing module 20, the wake-up voltage is sent to the enable end EN of the module to be woken 30 after being stabilized by the voltage stabilizing module 20, the module to be woken 30 is woken up, and the load to be supplied with power V-supply through the power output.
Fig. 6 is a circuit diagram of another isolated wake-up circuit according to an embodiment of the present invention.
Optionally, as shown in fig. 6, the voltage stabilizing module 20 includes a seventh resistor R7, an eighth resistor R8, a second transistor Q3, and a second diode D2; a first end of the seventh resistor R7 is electrically connected with the fourth end 7 of the optocoupler U1, and a second end of the seventh resistor R7 is electrically connected with the first end e of the second triode Q3; a first end of the eighth resistor R8 is electrically connected with the fourth end 7 of the optocoupler U1, and a second end of the eighth resistor R8 is electrically connected with the control end d of the second triode Q3; the second end f of the second triode Q is electrically connected with the enable end EN of the module to be awakened 30, and the power input end VI of the module to be awakened 30 is electrically connected with the first power supply VDD; the cathode of the second diode D2 is electrically connected to the control terminal D of the second transistor Q3, and the anode of the second diode D2 is grounded.
Illustratively, the second transistor Q3 may be an NPN-type transistor, the control terminal D, the first terminal e, and the second terminal f of the second transistor Q3 are respectively a base, a collector, and an emitter of the NPN-type transistor, the seventh resistor R7 and the eighth resistor R8 function as voltage divider, the second diode D2 functions as voltage regulator, and the regulated voltage of the voltage regulator module 20 prevents the wake-up voltage output by the isolation module 10 to the enable terminal EN of the to-be-woken module 30 from being affected by voltage fluctuation of the first power VDD, that is, the voltage value of the wake-up voltage is neither too high nor too low, and the wake-up voltage can be stably and reliably transmitted to the to-be-woken module 30, so that the to-be-woken module 30 is woken up, and the to-be-supplied with the to-be-supplied power.
Optionally, as shown in fig. 3 to 6, the isolation module 10 further includes: a ninth resistor R9 and a first capacitor C1; a first end of the ninth resistor R9 is electrically connected with a second end of the first resistor R1, and a second end of the ninth resistor R9 is grounded; the first end of the first capacitor C1 is electrically connected to the second end of the first resistor R1, and the second end of the first capacitor C1 is grounded.
Specifically, the ninth resistor R9 and the first capacitor C1 function to prevent voltage abrupt change, absorb overvoltage in a spike state, and avoid damage to the first switching tube Q1.
Optionally, as shown in fig. 3 to fig. 6, the module to be wakened 30 further includes a power output VO, and the power output VO of the module to be wakened 30 is electrically connected to the load V-supply to be powered.
Specifically, the power output terminal VO of the module 30 to be awakened is connected to the load V-supply to be powered, and when the module 30 to be awakened is awakened by the awakening voltage output by the isolation module 10, the power is supplied to the load V-supply to be powered through the power output terminal VO.
The application provides an keep apart awakening circuit uses common electronic components and parts to build like opto-coupler, field effect transistor etc. and circuit structure is simple, the cost is lower, has realized that the awakening voltage fluctuation range of isolation module output is little, awaken reliably, not influenced by mains voltage fluctuation's technological effect.
The embodiment of the utility model provides a still provide a power supply unit, this power supply unit includes any one of the above-mentioned embodiment isolation wake-up circuit.
The embodiment of the utility model provides a power supply unit includes the isolation wake-up circuit in the above-mentioned embodiment, consequently the embodiment of the utility model provides a power supply unit also possesses the beneficial effect that the above-mentioned embodiment described, and this is no longer repeated here.
In the description of the embodiments of the present invention, unless explicitly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Finally, it should be noted that the above description is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.
Claims (10)
1. An isolated wake-up circuit, comprising: the device comprises an isolation module, a voltage stabilizing module, a first power supply and a module to be awakened;
the input side of the isolation module is electrically connected with the processor;
the output side of the isolation module is respectively and electrically connected with the voltage stabilizing module and the module to be awakened, the first power supply is electrically connected with the voltage stabilizing module and the module to be awakened, or the module to be awakened is electrically connected with the output side of the isolation module through the voltage stabilizing module, and the first power supply is electrically connected with the output side of the isolation module and the module to be awakened;
the isolation module is configured to conduct a loop formed by the first power supply, the output side of the isolation module, the voltage stabilizing module and the module to be awakened after acquiring the awakening instruction sent by the processor, so as to output the awakening voltage stabilized by the voltage stabilizing module to the module to be awakened.
2. The isolated wake-up circuit of claim 1, wherein the isolation module comprises a first resistor, a second resistor, a third resistor, a first switch tube, an optocoupler, and a second power supply;
a first end of the first resistor is used as an input side of the isolation module and is electrically connected with the processor, a second end of the first resistor is electrically connected with a control end of the first switch tube, a first end of the first switch tube is electrically connected with a first end of the optocoupler, and a second end of the first switch tube is grounded;
a second end of the optical coupler is electrically connected with a first end of the second resistor, a third end of the optical coupler is electrically connected with a first end of the third resistor, and a fourth end of the optical coupler is used as a second end of the output side of the isolation module;
the second end of the second resistor is electrically connected with the second power supply, and the second end of the third resistor is used as the first end of the output side of the isolation module.
3. The isolated wake-up circuit according to claim 2, wherein a first end of the output side of the isolation module is electrically connected to a first end of the voltage stabilization module, and a second end of the output side of the isolation module is electrically connected to an enable end of the module to be woken up;
the second end of the voltage stabilizing module is electrically connected with the first power supply, and the power supply input end of the module to be awakened is electrically connected with the first power supply.
4. The isolated wake-up circuit according to claim 2, wherein a first end of the output side of the isolation module is electrically connected to the first power supply through the third resistor, a second end of the output side of the isolation module is electrically connected to a second end of the voltage stabilizing module, and the first end of the voltage stabilizing module is electrically connected to the enable end of the module to be woken up;
and the power supply input end of the module to be awakened is electrically connected with the first power supply.
5. The isolated wake-up circuit of claim 3, wherein the voltage regulation module comprises a fourth resistor, a fifth resistor, a first transistor and a first diode;
a control end of the first triode is electrically connected with a cathode of the first diode, a first end of the first triode is electrically connected with a second end of the third resistor, and a second end of the first triode is electrically connected with a first end of the fourth resistor;
the anode of the first diode is grounded; a second end of the fourth resistor is electrically connected with the first power supply; a first end of the fifth resistor is electrically connected with a control end of the first triode, and a second end of the fifth resistor is electrically connected with the first power supply;
the isolation module further comprises a sixth resistor; and the first end of the sixth resistor is electrically connected with the fourth end of the optocoupler, and the second end of the sixth resistor is grounded.
6. The isolated wake-up circuit of claim 4, wherein the voltage regulation module comprises a seventh resistor, an eighth resistor, a second transistor, and a second diode;
a first end of the seventh resistor is electrically connected with a fourth end of the optocoupler, and a second end of the seventh resistor is electrically connected with a first end of the second triode;
the first end of the eighth resistor is electrically connected with the fourth end of the optocoupler, and the second end of the eighth resistor is electrically connected with the control end of the second triode;
the second end of the second triode is electrically connected with the enabling end of the module to be awakened, and the power input end of the module to be awakened is electrically connected with the first power supply;
the negative electrode of the second diode is electrically connected with the control end of the second triode, and the positive electrode of the second diode is grounded.
7. The isolated wake-up circuit of claim 1, wherein the first power source is a battery cell.
8. The isolated wake-up circuit of any of claims 3 or 4, wherein the isolation module further comprises: a ninth resistor and a first capacitor;
the first end of the ninth resistor is electrically connected with the second end of the first resistor, and the second end of the ninth resistor is grounded; the first end of the first capacitor is electrically connected with the second end of the first resistor, and the second end of the first capacitor is grounded.
9. The isolated wake-up circuit according to any one of claims 3 or 4, wherein the module to be woken up further comprises a power output terminal, and the power output terminal of the module to be woken up is electrically connected with a load to be powered.
10. A power supply device, characterized in that it comprises an isolated wake-up circuit according to any of the preceding claims 1 to 9.
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| CN202021861965.7U CN213341680U (en) | 2020-08-31 | 2020-08-31 | Isolated wake-up circuit and power supply equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115817268A (en) * | 2022-08-25 | 2023-03-21 | 宁德时代新能源科技股份有限公司 | Wake-up circuit, wake-up method, device, system and storage medium |
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2020
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115817268A (en) * | 2022-08-25 | 2023-03-21 | 宁德时代新能源科技股份有限公司 | Wake-up circuit, wake-up method, device, system and storage medium |
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