CN213184297U

CN213184297U - Planar split gate IGBT semiconductor power device with super junction structure

Info

Publication number: CN213184297U
Application number: CN202022096396.8U
Authority: CN
Inventors: 陈利; 陈译; 陈彬
Original assignee: Xiamen Xinyidai Integrated Circuit Co ltd
Current assignee: Xiamen Xinyidai Integrated Circuit Co ltd
Priority date: 2020-09-22
Filing date: 2020-09-22
Publication date: 2021-05-11
Anticipated expiration: 2030-09-22

Abstract

The utility model discloses a plane split gate IGBT semiconductor power device with super junction structure, this device includes: the semiconductor device comprises a semiconductor substrate, an N-type heavily doped region and a P-type well region on the semiconductor substrate, wherein the N-type heavily doped region is arranged in the middle of the P-type well region, one side of the P-type well region is close to an N-type lightly doped region of a gate structure, an N-type heavily doped source region on the N-type lightly doped region, a P-type heavily doped source region connected with the N-type heavily doped source region, an N-type lightly doped drift region on the other side of the P-type well region is close to the gate structure, an N-type heavily doped buffer region connected with the N-type lightly doped drift region, a P-type heavily doped collector region connected with the N-type heavily doped buffer region, a control gate region and a split gate region on the P-type well region, the gate structure region is made of polycrystalline silicon and high-K insulating materials, an emitter is led out from. The IGBT power device can effectively improve the switching speed through the split gate and the super junction structure.

Description

Planar split gate IGBT semiconductor power device with super junction structure

Technical Field

The utility model relates to a semiconductor power technical field, concretely relates to plane split gate IGBT semiconductor power device with super junction structure.

Background

A power semiconductor device is an indispensable electronic device for any electronic system, and is mainly applied to various power supplies and driving loads. With the upgrading of power semiconductor devices, new power semiconductor devices are gradually developing to the benefits of energy saving, material saving, environmental protection, miniaturization, and the like.

The insulated gate bipolar transistor IGBT is a novel power electronic device compounded by an MOSFET and a bipolar transistor, wherein the input electrode of the insulated gate bipolar transistor IGBT is the MOSFET, and the output electrode of the insulated gate bipolar transistor IGBT is a PNP transistor. The IGBT not only has the advantages of simple and quick MOSFET driving, but also has the advantage of large capacity of a power transistor, so that the IGBT is widely applied to the fields of energy conversion, locomotive traction, industrial frequency conversion, automobile electronics, consumer electronics and the like, and is one of important core devices in the field of power electronics. When surpassing the knot and using in the IGBT device, can realize the quick switch of IGBT device and reduce the switching loss, and traditional surpass knot MOS device and have great gate channel on-resistance, in order to reduce the channel ratio on-resistance of grid and reduce gate drive power to and easily integration, the utility model relates to a plane split gate IGBT semiconductor power device with surpass knot structure.

SUMMERY OF THE UTILITY MODEL

The utility model relates to a plane split gate IGBT semiconductor power device with super junction structure adopts lightly doped source region and split gate structure district can reduce the shared proportion of grid channel resistance effectively, also can prevent thermal degradation effect and reduce the grid channel leakage current effect; by adopting the super junction MOS, the switching speed of the semiconductor power device can be effectively improved.

The technical scheme of the utility model is specifically as follows:

a planar split-gate IGBT semiconductor power device with a super junction structure comprises: the semiconductor device comprises a semiconductor substrate, an N-type heavily doped region, a P-type well region, an N-type lightly doped region, an N-type heavily doped source region, a P-type heavily doped source region, an N-type lightly doped drift region, an N-type heavily doped buffer region, a P-type heavily doped collector region and a split gate structure region.

The semiconductor substrate is further provided with an N-type heavily doped region and a P-type well region, wherein the N-type heavily doped region is arranged in the middle of the P-type well region and has an area smaller than that of the P-type well region.

By the arrangement, the super junction structure can be effectively formed by the N-type heavily doped region.

And further arranging an N-type lightly doped region on one side of the P-type well region and close to the split gate structure region, an N-type heavily doped source region on the N-type lightly doped region, and a P-type heavily doped source region adjacent to the N-type heavily doped source region on one side of the N-type heavily doped source region far away from the split gate structure region, wherein the area of the P-type heavily doped source region is smaller than that of the P-type heavily doped collector region.

By adopting the arrangement, the N-type lightly doped region can reduce the specific on-resistance of the gate channel, prevent the thermal degradation effect and reduce the leakage current of the gate channel.

The other side of the P-type well region and close to the control gate region are provided with an N-type lightly doped drift region, one side of the N-type lightly doped drift region far away from the control gate region is provided with N-type heavily doped buffer regions which are adjacent to each other, one side of the N-type heavily doped buffer region is provided with a P-type heavily doped collector region which is adjacent to each other, the area of the P-type heavily doped collector region is smaller than that of the N-type heavily doped buffer region, and the area of the N-type lightly doped drift region is larger than that of the N-type heavily doped buffer region.

By the arrangement, the N-type heavily doped buffer region can collect minority carriers, so that the switching speed is increased; the N-type lightly doped drift region is adopted, so that the conductance modulation effect can be effectively realized.

And further arranging a control gate region and a split gate region on the P-type well region close to the N-type heavily doped region, wherein the gate structure region adopts a polysilicon material and an insulating medium in the polysilicon material adopts a high-K insulating material, and the high-K insulating material is a single substance or a compound or a material formed by overlapping a plurality of related films.

By such arrangement, the high-K insulating material can effectively improve the leakage current effect of the gate channel.

Further setting, an emitter is led out from the N type/P type heavily doped source region, a grid is led out from the grid structure, a collector is led out from the P type heavily doped collector region, and metal electrodes of the emitter, the collector and the grid are made of metal copper materials or aluminum materials.

Further, the semiconductor substrate material is a semiconductor SiC-based material or a GaN-based material.

(III) advantageous effects

The utility model discloses an adopt source region light doping technique, split gate technique and super junction MOS technique, can reduce the specific on resistance of bars channel, reduce bars channel leakage current effect, and then reduce drive loss and switching loss, improve switching speed.

Drawings

Fig. 1 is the structure schematic diagram of the planar split-gate IGBT semiconductor power device with super junction structure of the present invention.

Reference numerals: 1. a semiconductor substrate; 2. a P-type well region; 3. an N-type heavily doped region; 4. an N-type lightly doped region; 5. a P-type heavily doped source region; 6. an N-type heavily doped source region; 7. an N-type lightly doped drift region; 8. an N-type heavily doped buffer region; 9. a P-type heavily doped collector region; 10. an insulating medium in the gate structure region; 11. and a gate structure in the gate structure region.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a planar split-gate IGBT semiconductor power device with a super junction structure according to the present invention.

The utility model provides a pair of planar split gate IGBT semiconductor power device with super junction structure, include: a semiconductor substrate 1, the semiconductor substrate 1 is made of SiC-based or GaN-based material, an N-type heavily doped region 3 and a P-type well region 2 are arranged on the semiconductor substrate 1, the N-type heavily doped region 3 is arranged in the middle of the P-type well region 2, an N-type lightly doped region 4 close to a split gate structure region 10 is arranged on one side of the P-type well region 2, an N-type heavily doped source region 6 is arranged on the N-type lightly doped region 4, a P-type heavily doped source region 5 is arranged adjacent to one side of the N-type heavily doped source region 6 far away from the split gate structure region 10, an N-type lightly doped drift region 7 is arranged on the other side of the P-type well region 2, an N-type heavily doped buffer region 8 is arranged adjacent to the N-type lightly doped drift region 7, a P-type heavily doped collector region 9 is arranged adjacent to the N-type heavily doped buffer region 8, a control gate and split gate structure regions 10 and 11 are arranged on the P-type well region close to the N-type, an emitter is led out from the N type/P type heavily doped source region, a grid is led out from the grid structure 11, and a collector is led out from the P type heavily doped collector region 9.

The utility model discloses the theory of operation is implemented specifically: by adopting the N-type lightly doped region 4 and the split gate and control gate structure, wherein the control gate structure has the accumulated charge quantity of the adjusting channel and bears partial voltage characteristic, the gate driving power of an NMOS in an IGBT device can be effectively reduced; by adopting the super-junction MOS structure, when the super-junction MOS device is turned off, PN junctions on two sides of the N-type heavily doped region 3 are reversely biased to form a PN junction depletion layer, and a similar intrinsic semiconductor region can be formed when the doping concentration and the region width of the N-type heavily doped region 3 are completely matched; when the super-junction MOS device is conducted, electrons enter the N-type heavily doped region 3 from the emitter 6 through the split gate channel and then enter the N-type lightly doped drift region 7 through the control gate channel to provide base current for the PNP transistor, and the PNP transistor is started to enable the IGBT device to enter a conducting state, wherein the N-type lightly doped drift region 7 is adopted to realize a conductance modulation effect; an N-type heavily doped buffer region 8 is added in a collector region 9 of the device to collect minority carriers, so that the electrical performance of the semiconductor power device is improved.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. A planar split-gate IGBT semiconductor power device with a super junction structure is characterized by comprising: a semiconductor substrate (1), an N-type heavily doped region (3) and a P-type well region (2) on the semiconductor substrate (1), the N-type heavily doped region (3) is arranged in the middle of the P-type well region (2), an N-type lightly doped region (4) close to a split gate structure region on one side of the P-type well region (2), an N-type heavily doped source region (6) on the N-type lightly doped region (4), a P-type heavily doped source region (5) on one side of the N-type heavily doped source region (6) far away from the split gate structure region, an N-type lightly doped drift region (7) on the other side of the P-type well region (2), an N-type heavily doped buffer region (8) adjacent to the N-type lightly doped drift region (7), a P-type heavily doped collector region (9) adjacent to the N-type heavily doped buffer region (8), a control gate on the P-type well region close to the N-type heavily doped region (3) and a gate structure, a gate structure (11) of the gate structure region is made of polycrystalline silicon materials, an insulating medium (10) of the gate structure region is made of high-K insulating materials, an emitter is led out from an N-type/P-type heavily doped source region, a gate is led out from the gate structure (11) of the gate structure region, and a collector is led out from a P-type heavily doped collector region (9).

2. The planar split-gate IGBT semiconductor power device with a super junction structure according to claim 1, characterized in that the area of the P-type heavily doped collector region (9) is smaller than the area of the N-type heavily doped buffer region (8).

3. The planar split-gate IGBT semiconductor power device with a super junction structure according to claim 1, characterized in that the area of the N-type lightly doped drift region (7) is larger than the area of the N-type heavily doped buffer region (8).

4. The planar split-gate IGBT semiconductor power device with a super junction structure according to claim 1, characterized in that the area of the heavily doped N-type region (3) on the semiconductor substrate (1) is smaller than the area of the P-type well region (2).

5. The planar split-gate IGBT semiconductor power device with a super junction structure according to claim 1, characterized in that the area of the heavily doped P-type source region (5) is smaller than the area of the heavily doped P-type collector region (9).

6. The planar split-gate IGBT semiconductor power device with a super junction structure according to claim 1, wherein the high-K insulating material is a single substance or a compound or a material formed by stacking several related films.

7. The planar split-gate IGBT semiconductor power device with a super junction structure according to claim 1, wherein the metal electrodes of the emitter, collector and gate are made of a metal copper material or an aluminum material.

8. The planar split-gate IGBT semiconductor power device with a super junction structure according to claim 1, wherein the semiconductor substrate material is a semiconductor SiC-based or GaN-based material.