CN213073237U - Packaging structure based on DSP processing system - Google Patents
Packaging structure based on DSP processing system Download PDFInfo
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- CN213073237U CN213073237U CN202021851421.2U CN202021851421U CN213073237U CN 213073237 U CN213073237 U CN 213073237U CN 202021851421 U CN202021851421 U CN 202021851421U CN 213073237 U CN213073237 U CN 213073237U
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Abstract
The utility model relates to an electronic module encapsulates technical field, discloses a packaging structure based on DSP processing system, reduces planar space's area occupied. The utility model comprises a potting layer, a printed circuit board, a DSP chip, a connector, a first memory, a second memory and a heat sink, wherein the printed circuit board, the DSP chip, the connector, the first memory, the second memory and the heat sink are potted in the potting layer; the DSP chip, the first memory and the second memory are respectively arranged on the corresponding printed circuit boards; the connectors are respectively arranged on one side of the corresponding printed circuit board; the heat dissipation parts are respectively arranged above or below the surfaces of the corresponding printed circuit boards; at least one surface of the external interface of the connector and the surface of the heat dissipation piece are respectively exposed out of the encapsulation layer. The utility model discloses a stacked structure has improved the overall arrangement density of each device effectively, forms the packaging structure of high integrated nature, reduces plane occupation space, adopts the radiating piece can also improve holistic radiating effect, can improve the stability and the security of integrated device during operation.
Description
Technical Field
The utility model relates to an electronic module encapsulates technical field, especially a packaging structure based on DSP processing system.
Background
At present, most DSP signal processing systems are realized by adopting a plurality of special DSP processor chips through plane layout design, the performance of the processor chips basically determines the capacity of the DSP signal processing system, if the capacity of the DSP signal processing system is to be increased, the number of the special DSP processor chips is required to be increased in design, and when the special DSP processor chips with more number are adopted, the signal processing system needs to be realized through plane layout, so that the system size is increased, especially in some special application fields, such as satellite-borne application, the signal processing system with the overlarge size does not meet the requirement of miniaturization installation.
SUMMERY OF THE UTILITY MODEL
The utility model discloses aim at solving one of the technical problem that exists among the prior art at least. Therefore, the utility model provides a packaging structure based on DSP processing system can realize the size miniaturization, reduces the area occupied in plane space.
According to the utility model discloses an encapsulation structure based on DSP processing system of first aspect embodiment, including encapsulating layer, at least two-layer printed circuit board, at least two DSP chips, at least two connectors, at least two first storages, at least two second storages and at least two radiating pieces, at least two printed circuit board from bottom to top piles up and forms stacked structure; the DSP chip is arranged on the corresponding printed circuit board; the at least two connectors are respectively arranged on one side of the corresponding printed circuit board and are electrically connected with the DSP chip on the corresponding printed circuit board; the at least two first memories are respectively arranged on the corresponding printed circuit boards and are electrically connected with the DSPs on the corresponding printed circuit boards; the at least two second memories are respectively arranged on the corresponding printed circuit boards and are electrically connected with the DSP chips on the corresponding printed circuit boards; the at least two heat dissipation pieces are respectively arranged above or below the surface of the corresponding printed circuit board; the embedment layer is used for with the stacked structure DSP chip the connector first memory the second memory and the radiating piece embedment is in inside, the external interface of connector and wherein at least one surface of radiating piece is equallyd divide and is do not expose outside the embedment layer.
According to the utility model discloses packaging structure based on DSP processing system has following beneficial effect at least: at least two-layer printed circuit board who is provided with the DSP chip adopts stacked structure, has improved the overall arrangement density of each device effectively, forms the packaging structure of high integrated nature to reduce printed circuit board's plane occupation space effectively, utilize the connector simultaneously, can realize being connected with outside communication, adopt the radiating piece can also improve holistic radiating effect, can improve the stability and the security of integrated device during operation.
According to some embodiments of the present invention, each layer of the printed circuit board is provided with two DSP chips, one connector, eight first memories and two second memories.
According to some embodiments of the utility model, each the connector respectively with same layer two on the printed circuit board DSP chip electric connection, each the DSP chip respectively with same layer last four of correspondence of printed circuit board first memory and one of correspondence second memory electric connection.
According to some embodiments of the invention, the first memory is a synchronous dynamic random access memory.
According to some embodiments of the invention, the second memory is a flash memory.
According to some embodiments of the invention, the connector on each layer of the printed circuit board is provided on the same side.
According to some embodiments of the invention, the printed circuit board is provided with two layers.
According to some embodiments of the invention, one of the heat dissipation elements is located above the printed circuit board on the upper layer, and the other heat dissipation element is located below the printed circuit board on the lower layer.
According to some embodiments of the invention, the heat sink is a metal heat conducting block.
According to the utility model discloses a some embodiments, each layer both sides still are equipped with a plurality of lead bridges around the printed circuit board, both sides still are equipped with the metallic coating around the encapsulating layer, and correspond lead bridge associative connection makes between each layer printed circuit board realizes the associative connection.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic diagram of a package structure based on a DSP processing system according to an embodiment of the present invention;
FIG. 2 is a schematic perspective view of the DSP processing system based package shown in FIG. 1;
FIG. 3 is a schematic diagram of a printed circuit board of the DSP processing system based packaging architecture shown in FIG. 1;
FIG. 4 is a schematic view of another side of the printed circuit board shown in FIG. 3;
fig. 5 is a schematic block diagram of the circuitry on the one-layer printed circuit board shown in fig. 3.
Reference numerals: the memory module comprises a printed circuit board 100, a DSP chip 200, a connector 300, a first memory 400, a second memory 500, a heat sink 600, a potting layer 700 and a metal plating layer 800.
Detailed Description
This section will describe in detail the embodiments of the present invention, preferred embodiments of the present invention are shown in the attached drawings, which are used to supplement the description of the text part of the specification with figures, so that one can intuitively and vividly understand each technical feature and the whole technical solution of the present invention, but they cannot be understood as the limitation of the protection scope of the present invention.
In the description of the present invention, it should be understood that the orientation or positional relationship indicated with respect to the orientation description, such as up, down, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, a plurality of means are one or more, a plurality of means are two or more, and the terms greater than, less than, exceeding, etc. are understood as not including the number, and the terms greater than, less than, within, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless there is an explicit limitation, the words such as setting, installation, connection, etc. should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above words in combination with the specific contents of the technical solution.
Referring to fig. 1 and 2, according to the present invention, a package structure based on a DSP processing system includes a potting layer 700, at least two layers of printed circuit boards 100, at least two DSP chips 200(Digital Signal processing), at least two connectors 300, at least two first memories 400, at least two second memories 500, and at least two heat dissipation members 600, where the at least two printed circuit boards 100 are stacked from bottom to top to form a stacked structure; the DSP chip 200 is disposed on the corresponding printed circuit board 100; at least two connectors 300 are respectively arranged at one side of the corresponding printed circuit board 100 and electrically connected with the DSP chip 200 on the corresponding printed circuit board 100; the at least two first memories 400 are respectively arranged on the corresponding printed circuit boards 100 and are electrically connected with the DSP chips 200 on the corresponding printed circuit boards 100; the at least two second memories 500 are respectively arranged on the corresponding printed circuit boards 100 and are electrically connected with the corresponding DSPs on the printed circuit boards 100; at least two heat dissipation members 600 are disposed above or below the surface of the corresponding printed circuit board 100, respectively; the potting layer 700 is used for potting the stacked structure, the DSP chip 200, the connector 300, the first memory 400, the second memory 500, and the heat sink 600 inside, and at least one of the external interfaces of the connector 300 and the surface of the heat sink 600 is exposed outside the potting layer 700. The potting layer 700 is epoxy resin, after electrical fitting is performed on corresponding components on each layer of printed circuit board 100, each layer of printed circuit board 100 is stacked, then potting is performed by using the epoxy resin to form the potting layer 700 for molding, required size is formed by cutting after potting, at least one surface of the external interface of the connector 300 and the heat dissipation member 600 of each layer is exposed on the surface of the potting layer 700, so that the connector 300 performs communication connection and heat dissipation of the heat dissipation member 600.
It is contemplated that the number of the printed circuit boards 100 may be two, three or more than four layers according to the functional requirements of the actual DSP processing system, and each layer of the printed circuit boards 100 has at least one DSP chip 200, at least one first memory 400, at least one second memory 500 and at least one connector 300.
The following description will be made with reference to fig. 1 to 5, which are specific examples.
Referring to fig. 1 to 4, in the present embodiment, the printed circuit board 100 has two layers, and each layer of the printed circuit board 100 has two DSP chips 200, one connector 300, eight first memories 400 and two second memories 500. The two layers of printed circuit boards 100 are made of high TG board, that is, the glass transition temperature of the board can be greater than 170 degrees under high temperature heating.
Referring to fig. 5, in the present embodiment, each connector 300 is electrically connected to two DSP chips 200 on the same pcb 100, and each DSP chip 200 is electrically connected to four corresponding first memories 400 and one corresponding second memory 500 on the same pcb 100.
Referring to fig. 5, the first memory 400 is a synchronous dynamic random access memory and the second memory 500 is a flash memory. In this embodiment, the first memory 400 is a DDR3 chip (third generation double data rate synchronous dynamic random access memory), and the second memory 500 is an SPI-FLASH chip (Serial Peripheral Interface-FLASH, that is, a FLASH memory using an SPI Interface). It is noted that the models of the first memory 400 and the second memory 500 may be selected as needed according to the performance requirements of the actual DSP processing system.
Referring to fig. 1 and 2, in the present embodiment, the connectors 300 on each layer of the pcb 100 are disposed on the same side. When the integral structure is installed, the uniform direction of external connection can be determined, so that the plug wire of the external element can be aligned and plugged conveniently.
Referring to fig. 1 and 2, in the present embodiment, two heat dissipation members 600 are provided, one of the heat dissipation members 600 is disposed above the upper printed circuit board 100 and abuts against the surface of the corresponding printed circuit board 100, and the other heat dissipation member 600 is disposed below the lower printed circuit board 100 and abuts against the surface of the corresponding printed circuit board 100. The heat dissipation is realized through the upper direction and the lower direction, the heat dissipated between the two heat dissipation parts 600 cannot cause influence, meanwhile, the two printed circuit boards 100 can be subjected to distributed heat dissipation, and the heat dissipation efficiency can be further improved.
In the present embodiment, the heat sink 600 is a metal heat conduction block. By using the metal material, the heat dissipation efficiency can be improved.
Referring to fig. 1 to 4, in this embodiment, two DSP chips 200, four first memories 400 and one connector 300 are disposed on the same surface of the printed circuit board 100, two second memories 500 and a peripheral circuit are disposed on the other surface of the printed circuit board, specifically, the printed circuit board 100 on the upper layer, the corresponding DSP chip 200, first memory 400 and connector 300 are disposed above the printed circuit board 100 on the upper layer, the corresponding second memory 500 and peripheral circuit are disposed below the printed circuit board 100 on the upper layer, the printed circuit board 100 on the lower layer, the corresponding DSP chip 200, first memory 400 and connector 300 are disposed above the printed circuit board 100 on the lower layer, the corresponding second memory 500 and peripheral circuit are disposed below the printed circuit board 100 on the lower layer, and the two heat dissipation members 600 are respectively abutted against the corresponding DSP chips 200, when the DSP processing system works, the main heat comes from the DSP chip 200, so the heat sink 600 is directly abutted to the corresponding DSP chip 200, and the heat of the DSP processing system can be effectively dissipated.
In this embodiment, a plurality of lead bridges (not shown) are further disposed on the front and rear sides of each layer of the printed circuit board 100, and the metal plating layers 800 are further disposed on the front and rear sides of the potting layer 700 and are connected to the corresponding lead bridges in a related manner, so that the printed circuit boards 100 between the layers are connected in a related manner. The DSP chip 200 can be electrically connected between the two layers of the printed circuit boards 100 by using the lead bridge and the metal plating layer 800.
The specific manufacturing and production process comprises the following steps:
firstly, respectively welding corresponding chips and peripheral circuits on two layers of printed circuit boards 100, and enabling the chips and the corresponding peripheral circuits to be connected in a related manner according to corresponding electrical connection relations, then, stacking the two layers of printed circuit boards 100 to form a stacked structure according to the specific embodiment, enabling the connectors 300 to be located on the same side in the stacking process, enabling the heat dissipation members 600 to be respectively abutted to the corresponding printed circuit boards 100, then carrying out epoxy resin potting to form a potting layer 700, and cutting the potting layer 700 after the potting layer 700 is solidified, so that the surfaces of the upper heat dissipation member 600, the lower heat dissipation member 600, the external interfaces of the corresponding connectors 300 and the corresponding lead bridges are exposed; and carrying out metallization treatment on the surfaces of the lead bridges, which are positioned on the encapsulation layer 700, and forming a metal plating layer 800 through engraving to make the lead bridges connected in a related manner, so that devices corresponding to the printed circuit boards 100 of the upper layer and the lower layer are connected in a related manner, and finally, a packaging structure with the overall size of 78mm multiplied by 26mm is formed, and the error of the size is within +/-1 mm.
According to the utility model discloses packaging structure based on DSP processing system, through so setting up, some effects as following at least can be reached, at least two-layer printed circuit board 100 that is provided with DSP chip 200 adopts stacked structure, the overall arrangement density of each device has been improved effectively, form the packaging structure of high integrated nature, thereby reduce printed circuit board 100's plane occupation space effectively, utilize connector 300 simultaneously, can realize being connected with outside communication, adopt radiating piece 600 can also improve holistic radiating effect, can improve the stability and the security of integrated device during operation.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples" or the like mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
Claims (10)
1. A package structure based on a DSP processing system, comprising:
the printed circuit boards are stacked from bottom to top to form a stacked structure;
the DSP chips are arranged on the corresponding printed circuit boards;
the at least two connectors are respectively arranged on one side of the corresponding printed circuit board and are electrically connected with the DSP on the corresponding printed circuit board;
the at least two first memories are respectively arranged on the corresponding printed circuit boards and are electrically connected with the DSP chips on the corresponding printed circuit boards;
the at least two second memories are respectively arranged on the corresponding printed circuit boards and are electrically connected with the DSP chips on the corresponding printed circuit boards;
at least two heat dissipation pieces which are respectively arranged above or below the surface of the corresponding printed circuit board;
and the encapsulating layer is used for encapsulating the stacking structure, the DSP chip, the connector, the first storage, the second storage and the radiating piece in the inner part, and the external interface of the connector and at least one surface of the radiating piece are respectively exposed out of the encapsulating layer.
2. The DSP processing system based package structure of claim 1, wherein: and two DSP chips, one connector, eight first memories and two second memories are arranged on each layer of the printed circuit board.
3. The DSP processing system based package structure of claim 2, wherein: each connector is electrically connected with two DSP chips on the same layer of printed circuit board respectively, and each DSP chip is electrically connected with four corresponding first memories and one corresponding second memory on the same layer of printed circuit board respectively.
4. A DSP processing system based package structure according to any one of claims 1 to 3, wherein: the first memory is a synchronous dynamic random access memory.
5. A DSP processing system based package structure according to any one of claims 1 to 3, wherein: the second memory is a flash memory.
6. A DSP processing system based package structure according to any one of claims 1 to 3, wherein: the connectors on each layer of the printed circuit board are arranged on the same side.
7. A DSP processing system based package structure according to any one of claims 1 to 3, wherein: the printed circuit board is provided with two layers.
8. The DSP processing system based package structure of claim 7, wherein: one of the heat dissipation members is disposed above the printed circuit board on the upper layer, and the other heat dissipation member is disposed below the printed circuit board on the lower layer.
9. The DSP processing system based package structure of claim 1 or 8, wherein: the heat dissipation piece is a metal heat conduction block.
10. A DSP processing system based package structure according to any one of claims 1 to 3, wherein: and a plurality of lead bridges are arranged on the front side and the rear side of each layer of the printed circuit board, and metal coatings are arranged on the front side and the rear side of the potting layer and are connected with the corresponding lead bridges in an associated manner, so that the printed circuit boards among the layers are connected in an associated manner.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021851421.2U CN213073237U (en) | 2020-08-27 | 2020-08-27 | Packaging structure based on DSP processing system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021851421.2U CN213073237U (en) | 2020-08-27 | 2020-08-27 | Packaging structure based on DSP processing system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN213073237U true CN213073237U (en) | 2021-04-27 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202021851421.2U Active CN213073237U (en) | 2020-08-27 | 2020-08-27 | Packaging structure based on DSP processing system |
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| CN (1) | CN213073237U (en) |
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- 2020-08-27 CN CN202021851421.2U patent/CN213073237U/en active Active
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