CN212932853U - Double-pulse test system based on ARM processor - Google Patents
Double-pulse test system based on ARM processor Download PDFInfo
- Publication number
- CN212932853U CN212932853U CN202021457474.6U CN202021457474U CN212932853U CN 212932853 U CN212932853 U CN 212932853U CN 202021457474 U CN202021457474 U CN 202021457474U CN 212932853 U CN212932853 U CN 212932853U
- Authority
- CN
- China
- Prior art keywords
- pulse signal
- pulse
- test system
- double
- amplified
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Apparatus For Disinfection Or Sterilisation (AREA)
Abstract
The utility model relates to a dipulse test system based on ARM treater, include: the upper computer is used for providing a control signal; the controller is used for controlling the high-resolution timer to generate a first pulse signal and a second pulse signal according to the control signal; the driving device is used for carrying out power amplification processing on the first pulse signal to obtain a first amplified pulse signal and carrying out power amplification processing on the second pulse signal to obtain a second amplified pulse signal; and the level conversion device is used for converting the first amplified pulse signal into a first output pulse signal with high level and converting the second amplified pulse signal into a second output pulse signal with high level. The utility model discloses under the prerequisite of limited dominant frequency, still can provide the pulse precision of demand through the high resolution time-recorder, simultaneously the utility model provides a pulse signal is through enlargiing, level conversion processing, has stronger interference killing feature.
Description
Technical Field
The utility model relates to a IGBT performance detects technical field, especially relates to a dipulse test system based on ARM treater.
Background
An Insulated Gate Bipolar Transistor (IGBT for short) is a composite fully-controlled voltage-driven power semiconductor device composed of a Bipolar Transistor and an Insulated Gate field effect Transistor, and has the advantages of both high input impedance of a MOSFET and low on-state voltage drop of a Giant Transistor (GTR for short). The IGBT is a core device for energy conversion and transmission, commonly known as the "CPU" of a power electronic device, and is used as a strategic emerging industry in the country, and has a wide application in the fields of rail transit, smart grid, aerospace, electric vehicles, new energy equipment, and the like.
Parameters in the specification of a general IGBT are test data under specific conditions, and do not necessarily represent real performance in practical application, and when the IGBT is used, the IGBT cannot depend too much on a data table, and needs to be combined with practical application conditions, and at this time, a series of tests on the IGBT through double pulses are needed.
The improvement of the frequency of the switching device puts higher requirements on the precision of the double-pulse test platform, and the resolution of the double-pulse test platform is directly related to the working frequency of the core controller; at present, the main frequency of a core controller of a common double-pulse test platform in the market is hundred megahertz, and the pulse precision is generally us-level, but under the condition of limited main frequency, the existing double-pulse test platform cannot provide corresponding pulse precision.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a dipulse test system based on ARM treater to the realization still can provide corresponding pulse precision in the condition of limited dominant frequency.
In order to achieve the above object, the utility model provides a following scheme:
a kind of double pulse test system based on ARM processor, including:
the upper computer is used for providing a control signal;
the controller is used for controlling the high-resolution timer to generate a first pulse signal and a second pulse signal according to the control signal;
the driving device is used for carrying out power amplification processing on the first pulse signal to obtain a first amplified pulse signal and carrying out power amplification processing on the second pulse signal to obtain a second amplified pulse signal;
and the level conversion device is used for converting the first amplified pulse signal into a first output pulse signal with high level and converting the second amplified pulse signal into a second output pulse signal with high level.
Preferably, the controller is of the model STM32F 334.
Preferably, the test system further comprises:
and the TTL-USB device is used for converting the control signal from a USB logic level to a UART logic level and sending the UART logic level to the controller.
Preferably, the drive means is of the type 74HC 245.
Preferably, the model of the level conversion device is 14504 BG.
Preferably, the controller is connected with the TTL-USB device through a twisted pair.
Preferably, the control signal includes:
the pulse generator includes generation signals of the first pulse signal and the second pulse signal, a high level time of the first pulse signal, an interval time of the first pulse signal and the second pulse signal, and a high level time of the second pulse signal.
According to the utility model provides a concrete embodiment, the utility model discloses a following technological effect:
the utility model relates to a dipulse test system based on ARM treater, include: the upper computer is used for providing a control signal; the controller is used for controlling the high-resolution timer to generate a first pulse signal and a second pulse signal according to the control signal; the driving device is used for carrying out power amplification processing on the first pulse signal to obtain a first amplified pulse signal and carrying out power amplification processing on the second pulse signal to obtain a second amplified pulse signal; and the level conversion device is used for converting the first amplified pulse signal into a first output pulse signal with high level and converting the second amplified pulse signal into a second output pulse signal with high level. The utility model discloses under the prerequisite of limited dominant frequency, still can provide the pulse precision of demand through the high resolution time-recorder, simultaneously the utility model provides a pulse signal is through enlargiing, level conversion processing, has stronger interference killing feature.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of the dual-pulse testing system based on the ARM processor of the present invention.
Description of the symbols: the system comprises a host computer 1, a controller 2, a driving device 3, a level conversion device 4, a TTL-USB device 5, a UART21 and a high-resolution timer 22.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The utility model aims at providing a dipulse test system based on ARM treater to the realization still can provide corresponding pulse precision in the condition of limited dominant frequency, and the pulse signal interference killing feature of simultaneous output is strong.
In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention is described in detail with reference to the accompanying drawings and the detailed description.
Fig. 1 is the utility model discloses the structural schematic of dipulse test system based on ARM treater, as shown in fig. 1, the utility model provides a dipulse test system based on ARM treater, include: host computer 1, controller 2, drive arrangement 3 and level shifter 4.
The upper computer 1 is used for providing control signals.
The controller 2 is used for controlling the high resolution timer 22 to generate a first pulse signal PWM1 and a second pulse signal PWM2 according to the control signal. In this embodiment, the model of the controller 2 is STM32F 334.
The driving device 3 is configured to perform power amplification on the first pulse signal PWM1 to obtain a first amplified pulse signal EPWM1, and perform power amplification on the second pulse signal PWM2 to obtain a second amplified pulse signal EPWM 2. In this embodiment, the driving device 3 is 74HC 245.
Level conversion means 4 for converting the first amplified pulse signal EPWM1 into a high-level first output pulse signal EPWM1_ OUT and converting the second amplified pulse signal EPWM2 into a high-level second output pulse signal EPWM2_ OUT. In this embodiment, the model of the level shifter 4 is 14504 BG.
Specifically, the controller 2 is connected with a pin 7 and a pin 9 of the driving device 3; pin 11 of the driving device 3 is connected to pin 3 of the level shifter 4, and pin 13 of the driving device 3 is connected to pin 14 of the level shifter 4.
As an optional implementation manner, the test system of the present invention further includes: TTL-USB device 5.
An Asynchronous Receiver/Transmitter (UART/Transmitter for short) 21 of the controller 2 is connected with a TTL end of the TTL-USB device 5; and the USB end of the TTL-USB device 5 is connected with the USB interface of the upper computer 1.
The TTL-USB device 5 is configured to convert the control signal from a USB logic level to a UART21 logic level, and send the control signal to the controller 2 through the UART 21.
Further, the UART21 of the controller 2 is connected to the TTL terminal of the TTL-USB device 5 through a twisted pair.
As an optional implementation manner, the control signal of the present invention includes:
the pulse generator includes generation signals of the first pulse signal and the second pulse signal, a high level time of the first pulse signal, an interval time of the first pulse signal and the second pulse signal, and a high level time of the second pulse signal.
The utility model discloses the dominant frequency of the controller of selecting for use is 72MHz, generates the pulse signal of 217ps resolution ratio through the high resolution timer, carries out power amplification and level conversion respectively through drive arrangement and level conversion device simultaneously, has improved pulse signal's driving force and interference killing feature.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The principle and the implementation of the present invention are explained herein by using specific examples, and the above description of the embodiments is only used to help understand the system and the core idea of the present invention; meanwhile, for the general technical personnel in the field, according to the idea of the present invention, there are changes in the concrete implementation and the application scope. In summary, the content of the present specification should not be construed as a limitation of the present invention.
Claims (7)
1. A kind of dipulse test system based on ARM processor, characterized by that, including:
the upper computer is used for providing a control signal;
the controller is used for controlling the high-resolution timer to generate a first pulse signal and a second pulse signal according to the control signal;
the driving device is used for carrying out power amplification processing on the first pulse signal to obtain a first amplified pulse signal and carrying out power amplification processing on the second pulse signal to obtain a second amplified pulse signal;
and the level conversion device is used for converting the first amplified pulse signal into a first output pulse signal with high level and converting the second amplified pulse signal into a second output pulse signal with high level.
2. The double pulse test system of claim 1, wherein the controller is model number STM32F 334.
3. The double-pulse test system of claim 1, further comprising:
and the TTL-USB device is used for converting the control signal from a USB logic level to a UART logic level and sending the UART logic level to the controller.
4. The double-pulse testing system of claim 1, wherein said drive device is of the type 74HC 245.
5. The double-pulse test system of claim 1, wherein the level shifting apparatus is model number 14504 BG.
6. The double-pulse test system of claim 3, wherein the controller is coupled to the TTL-USB device via a twisted pair.
7. The double-pulse test system of claim 1, wherein the control signal comprises:
the pulse generator includes generation signals of the first pulse signal and the second pulse signal, a high level time of the first pulse signal, an interval time of the first pulse signal and the second pulse signal, and a high level time of the second pulse signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021457474.6U CN212932853U (en) | 2020-07-22 | 2020-07-22 | Double-pulse test system based on ARM processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021457474.6U CN212932853U (en) | 2020-07-22 | 2020-07-22 | Double-pulse test system based on ARM processor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212932853U true CN212932853U (en) | 2021-04-09 |
Family
ID=75331362
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202021457474.6U Active CN212932853U (en) | 2020-07-22 | 2020-07-22 | Double-pulse test system based on ARM processor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212932853U (en) |
-
2020
- 2020-07-22 CN CN202021457474.6U patent/CN212932853U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109800499B (en) | Modeling simulation method for electromagnetic interference emission of inverter motor driving system | |
| CN105162356A (en) | Voltage phase adjustable full-bridge resonant ultrasonic driving circuit easy to connected in parallel | |
| CN111175601A (en) | Modular functional test system | |
| CN201707413U (en) | Electromagnetic compatibility testing device | |
| CN212932853U (en) | Double-pulse test system based on ARM processor | |
| CN202119855U (en) | System for measuring open circuit or short circuit of integrated circuit | |
| CN101770684B (en) | Remote control signal simulator for small satellite ground test and remote control signal analogy method | |
| CN204575808U (en) | A kind of IGBT drive circuit plate automatic testing equipment | |
| CN204116564U (en) | A kind of motor in electric automobile drives working condition simulation test system | |
| CN101424739A (en) | Radar system interface card based on FPGA | |
| CN204536442U (en) | Cab signaling equipment anti-traction current harmonic wave disturbed test device | |
| CN111024389A (en) | Harmonic reducer load testing device with electric energy feedback and method | |
| CN101800821A (en) | Medical communication calling equipment | |
| CN203761252U (en) | High-power high-frequency power supply driving device | |
| CN106153997A (en) | A kind of pulse outputting unit for the test of rail vehicle charger | |
| CN102394605A (en) | Pulse generation method and device used for IGBT (insulated gate bipolar transistor) test | |
| CN203691218U (en) | Photovoltaic inverter IGBT parallel driving signal circuit board | |
| CN103279055A (en) | Design scheme of adaptor board for connecting Arinc708 board card with field programmable gate array (FPGA) development board | |
| CN212229096U (en) | IGBT drive plate aging test circuit | |
| CN103855933A (en) | High-power and high-frequency power driving device | |
| CN103439617A (en) | Power module parallel testing method for H-bridge circuit | |
| CN208849692U (en) | A kind of compact high-voltage switch gear component | |
| CN105515349A (en) | Switch tube drive circuit applied to programmable DC power supply | |
| CN210835273U (en) | Capacitive coupling resistivity measuring device | |
| CN208046576U (en) | A kind of automobile ADAS ultrasound amplifying circuits |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20230904 Address after: No. 2-24 Jianye Road, Nanhu New District, Zhongxiang City, Jingmen City, Hubei Province, 431900 Patentee after: HUBEI YINGLI ELECTRIC CO.,LTD. Address before: Building C3, xieqianlian Industrial Park, Nanhu New District, Zhongxiang City, Jingmen City, Hubei Province Patentee before: HUBEI YINGLI ELECTRIC CO.,LTD. Patentee before: Beijing international science and Technology Co.,Ltd. |