CN212572497U - Self-adaptive filter based on FPGA - Google Patents
Self-adaptive filter based on FPGA Download PDFInfo
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Abstract
The utility model discloses an adaptive filter based on FPGA, include: the adaptive module adjusts the coefficient of the reference adjustable filter, a signal is input to the reference adjustable filter and is input to the adaptive module after a certain time delay, the signal passing through the reference adjustable filter is synthesized with a standard signal and is input to the adaptive module, and the coefficient of the reference adjustable filter is adjusted. In this way, the utility model discloses self-adaptation wave filter based on FPGA compares the DSP treater and just has bus adjustable advantage through adopting the parallel structure of FPGA treater design self-adaptation wave filter, can shorten half operation cycle with filtering process and self-adaptation process parallel design, has extensive market prospect in self-adaptation wave filter's based on FPGA's popularization.
Description
Technical Field
The utility model relates to the field of communication, especially, relate to an adaptive filter based on FPGA.
Background
With the continuous development of signal processing technology, the requirements for signal processing speed are also increasing. Due to the limitations of the state of the art, and in particular the evolution of integrated circuit technology, many signal processing algorithms that are well-established in theory are difficult to implement, one of the most important reasons for this is the hardware speed. The signal form required to be processed is more and more complex, so that most of modern signal processing methods are mainly characterized by large data volume and high complexity. In such a situation, it is necessary and urgent to find an effective real-time signal processing method.
The filtering technology is a basic method and technology in signal processing, especially the digital filtering technology is widely used, and the research of the digital filtering theory and the development of products thereof are always paid attention by many countries. Filtering can be classified into classical filtering and modern filtering in general. Classical filtering requires statistical properties of known signals and noise, such as wiener filtering and kalman filtering. Modern filtering does not require knowledge of the statistical properties of the signal and noise, such as adaptive filtering.
The principle of the adaptive filtering is to automatically adjust the filtering parameters at the current moment by using the results of the filtering parameters obtained at the previous moment and the like, thereby achieving the optimal filtering. The self-adaptive filtering has strong self-learning and self-tracking capabilities and is suitable for detection and estimation of stationary and non-stationary random signals. Adaptive filtering generally comprises 3 modules: a filtering structure, performance criteria and an adaptive algorithm. The adaptive filtering algorithm is always a research hotspot of people, and comprises a linear adaptive algorithm and a nonlinear adaptive algorithm, wherein the nonlinear adaptive algorithm has stronger signal processing capacity, but the calculation is more complex, and the linear adaptive filtering algorithm is still used in most practical applications. The linear adaptive filtering algorithms are various, and include an LMS adaptive filtering algorithm, an R-path adaptive filtering algorithm, a transform domain adaptive filtering algorithm, an affine projection algorithm, a conjugate gradient algorithm, and the like.
With the acceleration of informatization process and the rapid development of computer science and technology, signal processing theory and method, etc., the data volume to be processed is larger and larger, and the requirements on instantaneity and precision are higher and higher. At present, the data transmission rate of a widely used GSM system is only 9.6kbit/s, the data transmission rate of a narrow-band CDMA system is only 14.4kbit/s, but the data transmission rate of a GPRS system of 2.5G reaches about 150kbit/t, the data transmission rate of a 3G communication room or in a static state reaches 2Mbit/s according to an IMT2000 protocol, and the data transmission rate of a 3G communication room or in a static state reaches 100Mbit/s in a 4G era based on an all-IP network. The adaptive receiving technology includes an adaptive equalizer, a smart antenna, adaptive modulation, adaptive coding, etc., which are one of the key technologies in the digital communication system. After the communication system has been developed to 3G, data transmission rates of tens or even hundreds of megabits per second are a great challenge for adaptive reception techniques. Although the DSP processor has good versatility and flexibility, the DSP processor is greatly improved in hardware structure, such as adding a plurality of hardware multipliers and parallel instructions using a plurality of multipliers, but does not get rid of the traditional CPU operating mode, and the DSP processor completes the DSP algorithm through software instructions, and its sequential operating mode restricts its data processing rate, and the use of a multi-chip DSP combination circuit and too many external interface circuits leads to an excessively long and complex signal path and a cost doubling, so the DSP processor is unable to handle data processing rates of tens or even hundreds of megabits per second in 3G and 4G communications.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the main technical problem who solves provides an adaptive filter based on FPGA, parallel structure through adopting FPGA treater design adaptive filter, compare the DSP treater and just have bus adjustable advantage, the extensive parallel processing ability that FPGA has and the flexibility that can programme make the system of design obtain high processing performance, and can adapt to the standard that changes day by day, agreement and performance demand, can shorten half operation cycle with filtering process and adaptive process parallel design, and its performance is usually far superior to the fixed filter who designs with usual method, can provide the new signal processing ability that non-adaptive method can not provide, there is extensive market prospect in adaptive filter's based on FPGA popularization.
In order to solve the technical problem, the utility model provides a self-adaptive filter based on FPGA, include: the adaptive module adjusts the coefficient of the reference adjustable filter, a signal is input to the reference adjustable filter to form an output signal, the output signal is input to the adaptive module after a certain time delay, the signal passing through the reference adjustable filter is synthesized with a standard signal to form an error signal, the error signal is input to the adaptive module, the coefficient of the reference adjustable filter is adjusted, and the output signal and the error signal are output.
In a preferred embodiment of the present invention, the reference tunable filter employs an FIR filter.
The utility model has the advantages that: the utility model discloses self-adaptation wave filter based on FPGA is through adopting the parallel structure of FPGA treater design self-adaptation wave filter, compare the DSP treater and just have bus adjustable advantage, the extensive parallel processing ability that FPGA had makes the system of design obtain high processing performance with the flexibility that can programme, and can adapt to the standard that changes day by day, agreement and performance demand, can shorten half operation cycle with filtering process and self-adaptation process parallel design, and its performance is far superior to the fixed filter of usual method design usually, can provide the new signal processing ability that non-self-adaptation method can not provide, there is extensive market prospect in self-adaptation wave filter's based on FPGA popularization.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained without inventive work, wherein:
fig. 1 is a schematic structural diagram of a preferred embodiment of the adaptive filter based on FPGA of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely below, and it should be apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Referring to fig. 1, an embodiment of the present invention includes:
an FPGA-based adaptive filter comprising: the adaptive module adjusts the coefficient of the reference adjustable filter, a signal is input to the reference adjustable filter to form an output signal, the output signal is input to the adaptive module after a certain time delay, the signal passing through the reference adjustable filter is synthesized with a standard signal to form an error signal, the error signal is input to the adaptive module, the coefficient of the reference adjustable filter is adjusted, and the output signal and the error signal are output.
Preferably, the reference tunable filter employs an FIR filter.
The modern high-capacity and high-speed FPGA has unique advantages in the field of reconfigurable digital signal processing application, particularly front-end digital signal processing operation with single task and complex algorithm. For example, for an adaptive filter that requires frequent updates of the filter weight coefficients, the use of an FPGA processor has the advantage of bus adjustability over a DSP processor, since the number of bits for a particular DSP processor is fixed. In addition, the massively parallel processing capability and the programmable flexibility of FPGAs enable systems to be designed that achieve extremely high processing performance and can accommodate increasingly changing standards, protocols, and performance requirements.
The utility model discloses self-adaptation wave filter's based on FPGA beneficial effect is:
the parallel structure of the self-adaptive filter is designed by adopting the FPGA processor, compared with a DSP processor, the parallel structure has the advantage of bus adjustability, the large-scale parallel processing capability and the programmable flexibility of the FPGA enable the designed system to obtain extremely high processing performance, and can adapt to the increasingly changing standards, protocols and performance requirements, the parallel design of the filtering process and the self-adaptive process can shorten the operation period by half, the performance of the parallel design is usually far superior to that of a fixed filter designed by a common method, and the parallel structure can provide new signal processing capability which cannot be provided by a non-self-adaptive method.
The above only is the embodiment of the present invention, not limiting the patent scope of the present invention, all of which utilize the equivalent structure or equivalent flow transformation made by the content of the specification of the present invention, or directly or indirectly applied to other related technical fields, all included in the same way in the patent protection scope of the present invention.
Claims (2)
1. An adaptive filter based on an FPGA, comprising: the adaptive module adjusts the coefficient of the reference adjustable filter, a signal is input to the reference adjustable filter to form an output signal, the output signal is input to the adaptive module after a certain time delay, the signal passing through the reference adjustable filter is synthesized with a standard signal to form an error signal, the error signal is input to the adaptive module, the coefficient of the reference adjustable filter is adjusted, and the output signal and the error signal are output.
2. The FPGA-based adaptive filter of claim 1, wherein said reference tunable filter is a FIR filter.
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CN114401020A (en) * | 2022-03-25 | 2022-04-26 | 北京航空航天大学 | High-speed non-ideal channel self-adaptive compensation method based on multidimensional wienerhoff equation |
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CN114401020A (en) * | 2022-03-25 | 2022-04-26 | 北京航空航天大学 | High-speed non-ideal channel self-adaptive compensation method based on multidimensional wienerhoff equation |
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