CN212324448U - Embedded electronic device - Google Patents
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- CN212324448U CN212324448U CN202020250172.5U CN202020250172U CN212324448U CN 212324448 U CN212324448 U CN 212324448U CN 202020250172 U CN202020250172 U CN 202020250172U CN 212324448 U CN212324448 U CN 212324448U
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Abstract
The utility model provides an embedded electronic device, this embedded electronic device includes: a first substrate; a first magnetic core embedded in the first substrate; the first circuit and the second circuit are positioned on the first substrate and positioned on two sides of the first magnetic core; a plurality of first conductive elements in the first substrate connecting the first and second lines to form a coil loop for transmitting current around the first core; the first shielding layer is positioned on one side, back to the first magnetic core, of the first circuit and used for shielding external electromagnetic interference. The utility model discloses can reduce external signal to electron device's signal interference.
Description
Technical Field
The utility model relates to an electron device field especially relates to an embedded electron device.
Background
In recent years, integration and miniaturization have become the trend of integrated circuits, and electronic devices are widely used in integrated circuits as an important device to realize functions such as impedance matching, power combining, and ac coupling.
Electronic devices are generally designed to be integrated in order to reduce the occupied area of the electronic devices in a chip and achieve better integration effect. Although the chip area is effectively reduced by the method of the integrated stack design, the coupling effect between the electronic devices is rapidly increased along with the continuous improvement of the working frequency, so that the crosstalk effect is very obvious, the performance of each electronic device and the stability of a circuit are affected, and the reduction of the crosstalk between the electronic devices is a problem which needs to be solved urgently at present.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the main technical problem who solves provides an embedded electronic device to realize reducing the purpose of the mutual interference of electronic device.
In order to solve the technical problem, the utility model discloses a technical scheme be: there is provided an embedded electronic device comprising: a first substrate; a first magnetic core embedded in the first substrate; the first circuit and the second circuit are positioned on the first substrate and positioned on two sides of the first magnetic core; a plurality of first conductive elements in the first substrate connecting the first and second lines to form a coil loop that carries current around the first core; and the first shielding layer is positioned on one side of the first circuit, which is back to the first magnetic core, and is used for shielding external electromagnetic interference.
The utility model has the advantages that: be different from prior art's condition, the utility model provides an embedded electronic device, it is right through first base plate fluting and embedding first magnetic core, and on the first base plate reach magnetic core both sides form first circuit and second circuit first circuit is back to one side of first magnetic core sets up first shielding layer to this realizes reducing the purpose of the mutual interference of electronic device.
Drawings
Fig. 1 a-1 c are schematic structural and sectional views of a first embodiment of an embedded electronic device according to the present invention;
fig. 2 is a schematic cross-sectional view of a second embodiment of the embedded electronic device of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely below, and it should be understood that the described embodiments are only a part of the embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Please refer to fig. 1 a-1 c, which are schematic structural and sectional views of a first embodiment of an embedded electronic device according to the present invention. The embedded electronic device 110 includes: a first substrate 10 and a first magnetic core 16, wherein the first substrate 10 includes a first central portion 12 having a plurality of first inner vias 13 formed therethrough and penetrating the first substrate 10; a first peripheral portion 14 on which a plurality of first external via holes 15 penetrating the first substrate 10 are formed; a first receiving slot 18 is formed between the first central portion 12 and the first peripheral portion 14. The first magnetic core 60 is embedded in the first substrate 10, specifically, the first magnetic core 16 is placed in the first receiving groove 18, and the plurality of first conductive elements 17 are disposed in the first inner via hole 13 and the first outer via hole 15; a first circuit 20 and a second circuit 30 on the first substrate 10 and on both sides of the magnetic core 16 and connecting the plurality of first conductive elements 17; the conductive element 17 electrically connects the first and second wires 20, 30 and forms a coil loop for transmitting current around the core 16. The embedded electronic device 110 further includes a center tap 171 connected to the first wire 20 and/or the second wire 30 and grounded.
As shown in fig. 1c, the first shielding layer 50 is located on both sides of the first and second wires 20 and 30 away from the first magnetic core 16. In another embodiment, the first shielding layer 50 may also be located only on a side of the first wire 20 away from the first magnetic core 16. Or in another embodiment, the first shielding layer 50 may also be located on a side of the second line 30 away from the first magnetic core 16. In particular, the first shielding layer 50 is particularly used to shield external interference.
Wherein, the first shielding layer 50 may be provided as a whole layer covering the first line 20 or the second line 30; the first line 20 or the second line 30 can be covered and the shape of the first line 20 or the second line 30 is corresponding; it may also be provided as an annular layer covering the first or second lines 20, 30 and exposing the first central portion 12, or any combination thereof, or may be shaped according to the specific shapes of the first and second lines 20, 30, as long as the purpose of covering the first or second lines 20, 30 with the first shielding layer 50 is achieved; the first shielding layer 50 is made of copper, but may be made of other materials.
An insulating layer 501 is disposed between the first shielding layer 50 and the first line 20, an insulating layer 502 is disposed between the second line 30 and the first shielding layer 50, via holes 51 are disposed on the insulating layers 501 and 502 and the first shielding layer 50, the first shielding layer 50 is connected to the center tap 171 through the via holes 51 and grounded, or a ground line (not shown) is disposed on the first shielding layer 50, and the first shielding layer 50 is grounded through the ground line, so that the effect of reducing signal interference through the shielding layer is achieved.
Wherein the dielectric loss of the first substrate 10 may be less than or equal to 0.02. Specifically, the first substrate 10 is composed of a central material and a peripheral material, wherein the material is a high-speed and low-speed material, the material is an organic resin, the first substrate 10 may also be made of a resin material, and the peripheral material is a conductive material, such as copper. The reinforced material is soaked with resin adhesive and is prepared by the processes of drying, cutting, laminating and the like.
The first central portion 12 and the first peripheral portion 14 may be an integral structure, that is, the first substrate 10 is divided into the first central portion 12 and the first peripheral portion 14 by forming a first receiving groove 18 at the center of the first substrate 10. Of course, in other embodiments, the first central portion 12 and the first peripheral portion 14 may be separate structures, for example, a circular receiving groove is formed at the center of the first substrate 10, and then the first central portion 12 is fixed in the circular first receiving groove 18 by, for example, bonding, so that the annular receiving groove 18 is formed between the first central portion 12 and the first peripheral portion 14, and two end faces of the first central portion 12 and the first peripheral portion 14 are flush.
In the present embodiment, the cross-sectional shape of the annular receiving groove 18 is substantially the same as the cross-sectional shape of the magnetic core 16, so that the magnetic core 16 can be received in the annular receiving groove 18. The cross-sectional shape of the annular accommodating groove 18 may be circular, square, elliptical, etc. Correspondingly, the shape of the magnetic core 16 may be circular, square, elliptical, etc.
The first conductive element 17 may be a metal pillar, and the diameter of the metal pillar corresponding to each first inner via hole 13 or each first outer via hole 15 is smaller than or equal to the diameter of the first inner via hole 13 or the first outer via hole 15 in which the metal pillar is located. The material of the metal pillar includes, but is not limited to, copper, aluminum, iron, nickel, gold, silver, platinum group, chromium, magnesium, tungsten, molybdenum, lead, tin, indium, zinc, or alloys thereof, and the like.
In the present embodiment, a metal layer may be formed on the inner walls of the first inner via hole 13 and the first outer via hole 15 by, for example, plating, coating, etc., so as to electrically connect the first line 20 and the second line 30 on opposite sides of the first substrate 10.
Fig. 2 is a schematic cross-sectional view of a second embodiment of the embedded electronic device according to the present invention. Compared with the first embodiment, the present embodiment is different in that the present embodiment further includes a second substrate 120 stacked on the first substrate 10 and a second magnetic core 161 disposed in the second substrate, the second substrate 120 is also provided with a second receiving groove to divide the second substrate 120 into a second center portion 121 and a second peripheral portion 141, and a plurality of second inner via holes 131 and a plurality of second outer via holes 151 are opened in the second center portion 121 and the second outer peripheral portion 141, and the second conductive elements 172 are disposed in the second inner via holes 131 and the second outer via holes 151, the structure is the same as that of the first embodiment, and details are not repeated herein, in addition, a third circuit 70 and a fourth circuit 80 are respectively disposed on the second substrate 120 and at two sides of the second core 161, and the third circuit 70 and the fourth circuit 80 are connected to the second conductive element 172 to form a coil loop for transmitting current around the second core 161.
In the present application, the first substrate 10, the first core 16, the first conductive element 17, the first line 20, and the second line 30 form a transformer, and the second substrate 121, the second core 161, the second conductive element 172, the third line 70, and the fourth line 80 form a filter. In one embodiment, a shielding layer is disposed between the filter and the transformer, so as to shield signal interference between the two devices.
Specifically, as shown in fig. 2, in the present embodiment, the second shielding layer 52 is disposed on a side of the third wire 70 away from the second magnetic core 16, or the second shielding layer 52 is disposed on a side of the fourth wire 80 away from the second magnetic core 16, and the second shielding layer 52 may be disposed on both sides of the third wire 70 and the fourth wire 80 away from the second magnetic core 16. When the transformer and the filter are integrated, the first shielding layer 50 and the second shielding layer 52 may be simultaneously located between the transformer and the filter, and further, the first shielding layer 50 and the second shielding layer 52 may be the same layer and disposed between the transformer and the filter.
The first shielding layer 50 and the second shielding layer 52 may be a whole layer; the first line 20 and the third line 80 may be covered with the third line 80 and the first line 20 may be shaped correspondingly. It may be an annular layer covering the first and third lines 20, 80 and exposing the first and second central portions 12, 121, or any combination thereof; the first and second shield layers 50 and 52 are made of copper, but may be made of other materials.
In another embodiment, the first shielding layer 50 and the second shielding layer 52 are both located between the first substrate 10 and the second substrate 120. Specifically, when the first shielding layer 50 and the second shielding layer 52 are both located between the first substrate 10 and the second substrate 120, the first shielding layer 50 and the second shielding layer 52 may be the same layer, and when the first shielding layer and the second shielding layer are the same layer, they may be a front layer shielding the circuit of the first substrate 10 close to the second substrate 120 and shielding the circuit of the second substrate 120 close to the first substrate 10, or an annular layer exposing the first central portion 12 and the second central portion 121.
In all embodiments of the present invention, the embedded electronic device may be a transformer, a filter, a combination of a transformer and a filter, or other devices.
In this embodiment, only some related functional elements of the embedded electronic device are described, and other functional elements are the same as those of the embedded electronic device in the prior art, and are not described herein again.
The utility model discloses a set up the shielding layer that covers the circuit on the at least one circuit of the back of the body both sides of current embedded electronic device to the realization reduces external signal interference to between embedded electronic device and two embedded electronic devices.
The above is only the embodiment of the present invention, not the limitation of the patent scope of the present invention, all the equivalent structures or equivalent processes that are used in the specification and the attached drawings or directly or indirectly applied to other related technical fields are included in the patent protection scope of the present invention.
Claims (9)
1. An embedded electronic device, comprising:
a first substrate;
a first magnetic core embedded in the first substrate;
the first circuit and the second circuit are positioned on the first substrate and positioned on two sides of the first magnetic core;
a plurality of first conductive elements in the first substrate connecting the first and second lines to form a coil loop that carries current around the first core;
and the first shielding layer is positioned on one side of the first circuit, which is back to the first magnetic core, and is used for shielding external electromagnetic interference.
2. The embedded electronic device of claim 1, further comprising:
a second substrate stacked on the first substrate;
a second magnetic core embedded in the second substrate;
the third circuit and the fourth circuit are positioned on the second substrate and positioned on two sides of the second magnetic core;
a plurality of second conductive elements in the second substrate connecting the third and fourth lines to form a coil loop for transmitting current around the second core;
and the second shielding layer is positioned on one side of the third circuit, which faces away from the second magnetic core.
3. The embedded electronic device according to claim 2, wherein the first and/or second shielding layer is located between the first and second substrates.
4. The embedded electronic device of claim 3, wherein the first and second shielding layers are the same layer.
5. The embedded electronic device of claim 3, wherein the first substrate, the first magnetic core, the plurality of first conductive elements, the first wire, and the second wire form a transformer;
the second substrate, the second magnetic core, the plurality of second conductive elements, the third line, and the fourth line form a filter.
6. The embedded electronic device of claim 5, wherein the first substrate comprises:
a first center portion on which a plurality of first inner via holes penetrating the first substrate are formed; and
a first peripheral portion having a plurality of first external via holes formed therethrough; a first accommodating groove is formed between the first central part and the first peripheral part and is used for accommodating the first magnetic core;
the plurality of first conductive elements are partially positioned in the first inner via hole, the rest of the plurality of first conductive elements are positioned in the first outer via hole, and part of the plurality of first conductive elements positioned in the first inner via hole and part of the plurality of first conductive elements positioned in the first outer via hole are connected with the first line and the second line to form a coil for transmitting current around the first magnetic core;
the second substrate includes:
a second center portion having a plurality of second inner via holes formed therethrough; and
a second peripheral portion having a plurality of second outer via holes formed therethrough; a second accommodating groove is formed between the second central part and the second peripheral part and is used for accommodating the second magnetic core;
the plurality of second conductive elements are partially located in the second inner via hole, the remaining portions are located in the second outer via hole, and a portion of the second conductive elements located in the second inner via hole and a portion of the second conductive elements located in the second outer via hole are connected to the third line and the fourth line to form a coil for transmitting current around the second magnetic core.
7. The embedded electronic device according to claim 6, further comprising a center tap, the center tap connecting the first line and/or the second line and being grounded; and/or
The center tap connects the third line and/or the fourth line and to ground.
8. The embedded electronic device according to claim 7, wherein the first shielding layer is an entire surface layer covering the first wiring, and the second shielding layer is an entire surface layer covering the third wiring; and/or
The first shielding layer covers the first circuit and is matched with the first circuit in shape, and the second shielding layer covers the third circuit and is matched with the third circuit in shape; and/or
The first shielding layer is an annular layer which exposes the first central part and covers the first line, and the second shielding layer is an annular layer which exposes the second central part and covers the third line;
the first shielding layer and the second shielding layer are made of copper.
9. The embedded electronic device according to claim 8, further comprising an insulating layer between the first line and the first shielding layer and between the third line and the second shielding layer, wherein via holes are disposed on the insulating layer and the first shielding layer and the second shielding layer at corresponding positions, and the first shielding layer and the second shielding layer are connected to the center tap through the via holes and grounded; or the like, or, alternatively,
and the first shielding layer and the second shielding layer are provided with grounding wires so as to ground the first shielding layer and the second shielding layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020250172.5U CN212324448U (en) | 2020-03-03 | 2020-03-03 | Embedded electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020250172.5U CN212324448U (en) | 2020-03-03 | 2020-03-03 | Embedded electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212324448U true CN212324448U (en) | 2021-01-08 |
Family
ID=74017985
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020250172.5U Active CN212324448U (en) | 2020-03-03 | 2020-03-03 | Embedded electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212324448U (en) |
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2020
- 2020-03-03 CN CN202020250172.5U patent/CN212324448U/en active Active
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