CN212305305U - Discrete adjustable point frequency source with ultralow phase noise - Google Patents
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Abstract
The utility model discloses a discrete adjustable point frequency source with ultra-low phase noise, relating to the technical field of frequency synthesis, the output end of the crystal oscillator in the discrete adjustable point frequency source is connected with the sampling phase-locked frequency synthesizer to generate a high-frequency reference frequency as a high-frequency reference point, then the high-frequency reference frequency is divided by a plurality of frequency dividers connected with the output end of the sampling phase-locked frequency synthesizer to generate one or a plurality of discrete adjustable point frequency signals to provide local oscillation or frequency standard signals for a large frequency source system, and signals required in the subsequent frequency conversion process are generated by frequency division and frequency mixing of the high-frequency reference frequency, so that the additional change of phase noise can be reduced to the maximum extent, and the phase noise index is excellent, and because the advantage of frequency division technology has reduced the demand to the wave filter, therefore whole circuit function is very simple, the product size is little, is the innovation utility model on the direct frequency synthesis technique.
Description
Technical Field
The utility model belongs to the technical field of the frequency synthesis technique and specifically relates to a discrete adjustable point frequency source of ultralow looks making an uproar.
Background
The frequency source is a signal generating source of the radar system, provides local oscillation signals and transmits excitation signals for the radar, and is known as the heart of the radar system. Through years of research and development, China has great breakthrough in frequency synthesis technology, and the frequency synthesis technology is mainly divided into direct frequency synthesis technology and indirect frequency synthesis technology (PLL).
With the upgrading and popularization of the PLL technology, the bandwidth can be wider and wider, and the product size is smaller and smaller. The direct frequency synthesis technology is generally complex, and due to the limitation of the size of a filter, a frequency source module applying the direct frequency synthesis technology is often large in size and high in cost, but the direct frequency synthesis technology has incomparable advantages compared with a PLL (phase locked loop) technology in terms of phase noise indexes and frequency hopping speed, so that the direct frequency synthesis technology is seriously depended on in certain specific fields such as military airborne radar, meteorological radar and the like.
When a system needs a series of discrete dot frequency signals, the system generally needs to combine comb spectrum generator, PLL or mixing filter, however, comb spectrum generator and mixing function need many filters, the circuit is complex, the size is large, the cost is high, PLL can simply generate frequency, but the phase noise index is obviously not as direct synthesis, and when the dot frequency needed is more, the cost accumulation of PLL is also considerable, and the economy is poor. Therefore, in order to optimize indexes, reduce size, reduce cost, develop a more simplified direct frequency synthesis method, and develop a more general ultra-low phase noise discrete adjustable point frequency source, are urgent needs in the current direct frequency synthesis technical field.
SUMMERY OF THE UTILITY MODEL
The inventor of the present invention has proposed a discrete adjustable point frequency source of ultralow phase noise to above-mentioned problem and technical demand, the technical scheme of the utility model as follows:
an ultra-low phase noise discretely-tunable dot-frequency source, comprising: the output end of the crystal oscillator is connected with a sampling phase-locked frequency synthesizer, the output end of the sampling phase-locked frequency synthesizer is connected with the input end of a first switch frequency mixing filtering group and a first three-frequency divider through a first power divider, the output end of the first three-frequency divider is respectively connected with a first filter and a second three-frequency divider, the first filter is connected with a first DDS and a first two-frequency divider through a second power divider, the first two-frequency divider is connected with the input ends of a second two-frequency divider and a second switch frequency mixing filtering group through a third power divider, the second two-frequency divider is connected with a fourth frequency divider and the frequency mixing end of the first switch frequency mixing filtering group through a fourth power divider, the fourth frequency divider is connected with the frequency mixing end of the second switch frequency mixing filtering group through a fifth power divider, the output end of the second switch frequency mixing filtering group is connected with the first frequency mixer, the first DDS is also connected with the first frequency mixer, the output end of the first frequency mixer is connected with a frequency doubler through a first switch filter, the output end of the frequency doubler is connected with a second frequency mixer, the output end of the first switch frequency mixing filtering group is also connected with the second frequency mixer, and the second frequency mixer is connected with the first local oscillator output end through a second switch filter;
the second third frequency divider is connected with the second filter and the third filter through a sixth power divider, the output end of the third filter is connected with a third mixer, the fifth power divider is also connected with the third mixer, and the output end of the third mixer is connected with a second local oscillator output end through a fourth filter and an amplifier; the second filter is connected with the input end of the second DDS, and the output end of the second DDS is connected with the output end of the linear frequency modulation intermediate frequency signal.
The circuit structure of the first switch frequency mixing filtering group is the same as that of the second switch frequency mixing filtering group, the first switch frequency mixing filtering group comprises a first switch, a second switch, a fourth frequency mixer and a fifth filter, the fixed end of the first switch is used as the input end of the first switch frequency mixing filtering group, the first movable end of the first switch is connected with the first movable end of the second switch, the second movable end of the first switch is connected with the second movable end of the second switch through the fourth frequency mixer and the fifth filter in sequence, the other end of the fourth frequency mixer is used as the frequency mixing end of the first switch frequency mixing filtering group, and the fixed end of the second switch is used as the output end of the first switch frequency mixing filtering group.
The circuit structure of the first switch filter is the same as that of the second switch filter, the first switch filter comprises a third switch, a fourth switch, a sixth filter and a seventh filter, the fixed end of the third switch is used as the input end of the first switch filter, one movable end of the third switch is connected with one movable end of the fourth switch through the sixth filter, the other movable end of the third switch is connected with the other movable end of the fourth switch through the seventh filter, and the fixed end of the fourth switch is used as the output end of the first switch filter.
The further technical scheme is that each dot frequency signal in the discrete adjustable dot frequency source is obtained by frequency division of a high-frequency reference frequency output by the sampling phase-locked frequency synthesizer.
The further technical scheme is that the high-frequency reference frequency output by the sampling phase-locked frequency synthesizer is any one of 14.4GHz, 10GHz, 9.6GHz and 18 GHz.
The further technical proposal is that the sampling phase-locked frequency synthesizer outputs 14.4GHz high-frequency reference frequency, the first filter is a 3.6GHz low-pass filter, the first DDS outputs 275-500 MHz signals with 5MGHz/10MHz step, the second filter is a 1.2GHz low-pass filter, the fourth filter is a 2625MHz filter, the first switch frequency mixing filter group comprises a 15.3GHz filter, the second switch frequency mixing filter group comprises a 2025MHz filter, the first switch filter comprises two filter channels of 1.3-1.52 GHz and 1.53-1.75 GHz, the second switch filter comprises two filter channels of 11-11.8 GHz and 11.8-12.7 GHz, the first local oscillator output end outputs a local oscillator signal of 11-12.7 GHz stepped by 10MHz, the second local oscillator output end outputs a local oscillator signal of 2625MHz, and the linear frequency modulation intermediate frequency signal output end outputs a linear frequency modulation intermediate frequency signal of 125 MHz.
The further technical scheme is that the phase noise of the discrete adjustable point frequency source is less than or equal to-110 dBc/Hz @1 kHz.
The further technical scheme is that the size of the discrete adjustable point frequency source does not exceed 250mm multiplied by 150mm multiplied by 25 mm.
The utility model has the beneficial technical effects that:
the application discloses a discrete adjustable point frequency source of ultra-low phase noise, this discrete adjustable point frequency source uses numerical control frequency division technology, carry out frequency division output one or multichannel discrete adjustable point frequency signal as a high-frequency reference point with high frequency reference frequency and provide local oscillator or frequency standard signal for large-scale frequency source system, the signal that follow-up frequency conversion in-process needs all is produced by high-frequency reference frequency division, mixing, consequently can the extra change of furthest reduction phase noise, can accord with 20 lgN's theoretical formula basically, phase noise index is outstanding. And because of the advantages of the frequency division technology, the requirement on the filter is reduced, the phase noise and spurious suppression of the frequency division signal relative to the main signal are optimized generally, only some harmonics are needed, and the frequency division signal can not be processed generally if not necessary (an LTCC or MMIC low-pass filter can be arranged to complete the filtering function if necessary). Therefore, the whole circuit has extremely simple function, small product size and low cost. Is an innovative utility model in the direct frequency synthesis technology.
Although the frequency generated by the structure beneficial to the frequency division technology is relatively discrete, the coverage frequency band is wide, and the output dot frequency signal can be 150MHz or even lower frequency or Ku signal up to 14.4GHz according to different frequency division ratios, so that the application range is wide.
Drawings
Fig. 1 is a circuit block diagram of an ultra-low phase noise discretely tunable point-frequency source disclosed in the present application.
Detailed Description
The following describes the embodiments of the present invention with reference to the accompanying drawings.
The application discloses a discrete adjustable point frequency source of ultra-low phase noise, please refer to fig. 1, the discrete adjustable point frequency source includes: the output end of the crystal oscillator is connected with a sampling phase-locked frequency synthesizer (PDRO), the output end of the sampling phase-locked frequency synthesizer PDRO is connected with the input end of a first switch frequency mixing filtering group and a first three-frequency divider 2 through a first power divider 1, the output end of the first three-frequency divider 2 is respectively connected with a first filter 3 and a second three-frequency divider 4, the first filter 3 is connected with a first DDS and a first two-frequency divider 6 through a second power divider 5, and the first two-frequency divider 6 is connected with a second frequency divider 8 and the input end of the second switch frequency mixing filtering group through a third power divider 7. The second frequency divider 8 is connected to the fourth frequency divider 10 and the mixing end of the first switch mixing filter group through the fourth power divider 9. The fourth frequency divider 10 is connected to the frequency mixing end of the second switching frequency mixing filtering group through the fifth power divider 11, and the output end of the second switching frequency mixing filtering group is connected to the first frequency mixer 12. The first DDS is also connected to the first mixer 12, the output of the first mixer 12 is connected to the frequency doubler 13 through the first switch filter, the output of the frequency doubler 13 is connected to the second mixer 14, the output of the first switch frequency mixing filtering set is also connected to the second mixer 14, and the second mixer 14 is connected to the first local oscillation output LO1 through the second switch filter.
The second third frequency divider 4 is connected to the second filter 16 and the third filter 17 through the sixth power divider 15, the output terminal of the third filter 17 is connected to the third mixer 18, the fifth power divider 11 is also connected to the third mixer 18, and the output terminal of the third mixer 18 is connected to the second local oscillator output LO2 through the fourth filter 19 and the amplifier 20. The second filter 16 is connected to the input of the second DDS, and the output of the second DDS is connected to the chirp IF signal output IF.
The first switch frequency mixing filtering group comprises a first switch, a second switch, a fourth frequency mixer 21 and a fifth filter 22, a fixed end of the first switch is used as an input end of the first switch frequency mixing filtering group, a first movable end of the first switch is connected with a first movable end of the second switch, a second movable end of the first switch is connected with a second movable end of the second switch sequentially through the fourth frequency mixer 21 and the fifth filter 22, and the other end of the fourth frequency mixer 21 is used as a frequency mixing end of the first switch frequency mixing filtering group and is connected with the fourth power divider 9. The fixed end of the second switch is used as the output end of the first switch frequency mixing filtering group. The circuit structure of the second switch frequency mixing filtering group is the same as that of the first switch frequency mixing filtering group, and the description is omitted in the application.
The first switch filter comprises a third switch, a fourth switch, a sixth filter 23 and a seventh filter 24, a fixed end of the third switch is used as an input end of the first switch filter, one movable end of the third switch is connected with one movable end of the fourth switch through the sixth filter 23, the other movable end of the third switch is connected with the other movable end of the fourth switch through the seventh filter 24, and the fixed end of the fourth switch is used as an output end of the first switch filter. The circuit structure of the second switch filter is the same as the first switch filter and the circuit structure, and the description is omitted in the present application.
In the application, a crystal oscillator of 100MHz directly drives a sampling phase-locked frequency synthesizer PDRO to generate a high-frequency reference frequency, in the application, PDRO may be actually replaced by a low-noise frequency multiplier, the high-frequency reference frequency is used as a main reference signal for subsequent frequency conversion, and other dot frequency signals in the discrete adjustable dot frequency source are obtained by frequency division of the high-frequency reference frequency. Therefore, in practical applications, the value of the high-frequency reference frequency is a value that can be divided by natural numbers, for example, the high-frequency reference frequency is any one of 14.4GHz, 10GHz, 9.6GHz, and 18 GHz.
In the present application, a 100MHz crystal oscillator directly drives PDRO to generate a high frequency reference frequency of 14.4GHz, since 14400 can be evenly divided by many natural numbers such as 2, 3, 4, 6, 8, 9, 12, 18, 24, 36, 48, 72, etc., it means that 14.4GHz can generate a series of dot frequency signals with low phase noise and high spurious suppression such as 7.2GHz, 4.8GHz, 3.6GHz, 2.4GHz, 1.8GHz, 1.6GHz, 1.2GHz, 900MHz, 800MHz, 600MHz, 450MHz, 400MHz, 300MHz, 225MHz, 200MHz, 150MHz, etc., by frequency division. In the structure shown in fig. 1 of the present application, a 14.4GHz signal is divided by the first third frequency divider 2 to obtain a 4.8GHz signal, the first filter 3 is a 3.6GHz low-pass filter, the 4.8GHz signal is filtered and power-divided by the second power divider 5 to excite the first DDS, and the first DDS outputs a signal of 275-500 MHz and 5MGHz/10MHz step-by-step to the first mixer 12. The 3.6GHz signal is divided by the power of the second power divider 5 and the frequency of the first frequency divider 6 to generate a 1.8GHz signal, and the signal is divided by the third power divider 7 and enters the second switch frequency mixing filter group and the second frequency divider 8. The second frequency divider 8 continues to divide the frequency to generate 900MHz signal, which enters the fourth mixer 21 of the first switch frequency mixing filtering group through the fourth power divider 9 and enters the fourth frequency divider 10 to perform frequency division to generate 225MHz signal, and the 225MHz signal enters the fourth mixer of the second switch frequency mixing filtering group to be mixed with 1.8GHz signal and is filtered by the fifth filter of 2025 MHz. The signal output by the second switch frequency mixing filter group enters the first frequency mixer 12 to be mixed with the signal output by the first DDS, and then enters the first switch filter. A sixth filter in the first switch filter forms one filtering channel for a filter with 1.3-1.52 GHz, and a seventh filter forms the other filtering channel for a filter with 1.53-1.75 GHz. The output of the first switch filter enters a second mixer 14 after passing through a frequency doubler 13 of 2.6 to 3.5 GHz. On the other path, 14.4GHz output by the first power divider 1 enters the first switch frequency mixing filtering group, one path is directly transmitted to the output end, and the other path enters the fourth frequency mixer in the first switch frequency mixing filtering group, is subjected to frequency mixing with 900MHz and then is filtered by the fifth filter of 15.3 GHz. The signals output by the first switch mixing filter bank enter the second mixer 14 for mixing and then enter the second switch filter. A sixth filter in the second switch filter forms one filtering channel for a filter of 11-11.8 GHz, and a seventh filter forms the other filtering channel for a filter of 11.8-12.7 GHz, so that local oscillation signals of 11-12.7 GHz and 10MHz step are output through the first local oscillation output end LO 1. The 14.4GHz signal is divided by the first three-frequency divider 2 and the second three-frequency divider 4 to generate a 1.6GHz signal, which is then divided by the sixth power divider 15 and enters the second filter 16 and the third filter 17. The second filter 16 is a 1.2GHz low pass filter, and after filtering, excites the second DDS to output a 125MHz chirp intermediate frequency signal via a chirp intermediate frequency signal output IF. The third filter 17 filters the local oscillation signal and then enters the third mixer 18, mixes the local oscillation signal with the 225MHz signal output by the fifth power divider 11, and then enters the fourth filter 19, where the fourth filter 19 is an 2625MHz filter, and finally outputs an 2625MHz local oscillation signal at the second local oscillation output terminal LO 2.
It should be noted that the application is only exemplified by 14.4GHz, in this example, the specific control manner of each component outputting the corresponding frequency and step signal is also the conventional technical means in the field, and is the conventional control manner of the corresponding device, so that the application does not relate to the specific modification of the computer program.
The phase noise of the PDRO can be calculated according to the formula of 20lgN strictly, and almost no additional deterioration exists, and the phase noise of the 14.4GHz signal is less than or equal to-110 dBc/Hz @1kHz, and can reach-112 dBc/Hz @1 kHz. The circuit scheme of the discrete adjustable point frequency source is simple, only 7 band-pass filters are adopted, the product size is small, the size after application does not exceed 250mm multiplied by 150mm multiplied by 25mm, and the index conditions of other products are as follows:
what has been described above is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiments. It is to be understood that other modifications and variations directly derivable or suggested by those skilled in the art without departing from the spirit and scope of the present invention are to be considered as included within the scope of the present invention.
Claims (8)
1. An ultra-low phase noise discretely-tunable dot frequency source, comprising: the output end of the crystal oscillator is connected with a sampling phase-locked frequency synthesizer, the output end of the sampling phase-locked frequency synthesizer is connected with the input end of a first switch frequency mixing filtering group and a first three-frequency divider through a first power divider, the output end of the first three-frequency divider is respectively connected with a first filter and a second three-frequency divider, the first filter is connected with a first DDS and a first two-frequency divider through a second power divider, the first two-frequency divider is connected with the input ends of a second two-frequency divider and a second switch frequency mixing filtering group through a third power divider, the second two-frequency divider is connected with a fourth frequency divider and the frequency mixing end of the first switch frequency mixing filtering group through a fourth power divider, the fourth frequency divider is connected with the frequency mixing end of the second switch frequency mixing filtering group through a fifth power divider, the output end of the second switch frequency mixing filtering group is connected with a first frequency mixer, and the first DDS is also connected with the first frequency mixer, the output end of the first frequency mixer is connected with a frequency doubler through a first switch filter, the output end of the frequency doubler is connected with a second frequency mixer, the output end of the first switch frequency mixing filtering group is also connected with the second frequency mixer, and the second frequency mixer is connected with a first local oscillator output end through a second switch filter;
the second third frequency divider is connected with a second filter and a third filter through a sixth power divider, the output end of the third filter is connected with a third mixer, the fifth power divider is also connected with the third mixer, and the output end of the third mixer is connected with a second local oscillator output end through a fourth filter and an amplifier; the second filter is connected with the input end of the second DDS, and the output end of the second DDS is connected with the output end of the linear frequency modulation intermediate frequency signal.
2. The discrete tunable point-frequency source according to claim 1, wherein the first and second switching frequency-mixing filtering groups have the same circuit structure, the first switching frequency-mixing filtering group includes a first switch, a second switch, a fourth mixer and a fifth filter, a fixed end of the first switch is used as an input end of the first switching frequency-mixing filtering group, a first movable end of the first switch is connected to a first movable end of the second switch, a second movable end of the first switch is connected to a second movable end of the second switch sequentially through the fourth mixer and the fifth filter, another end of the fourth mixer is used as a frequency-mixing end of the first switching frequency-mixing filtering group, and a fixed end of the second switch is used as an output end of the first switching frequency-mixing filtering group.
3. The discrete tunable point-frequency source according to claim 1, wherein the first switch filter and the second switch filter have the same circuit structure, the first switch filter includes a third switch, a fourth switch, a sixth filter and a seventh filter, a fixed end of the third switch is used as an input end of the first switch filter, one movable end of the third switch is connected to one movable end of the fourth switch through the sixth filter, the other movable end of the third switch is connected to the other movable end of the fourth switch through the seventh filter, and a fixed end of the fourth switch is used as an output end of the first switch filter.
4. The discrete adjustable point-frequency source according to any one of claims 1-3, wherein each point-frequency signal in the discrete adjustable point-frequency source is obtained by dividing the frequency of the high-frequency reference frequency output by the sampling phase-locked frequency synthesizer.
5. The discretely adjustable dot frequency source according to claim 4, wherein the high frequency reference frequency output by the sample-locked frequency synthesizer is any one of 14.4GHz, 10GHz, 9.6GHz and 18 GHz.
6. The discretely adjustable point-frequency source according to any one of claims 1 to 3, wherein the sampling phase-locked frequency synthesizer outputs a high-frequency reference frequency of 14.4GHz, the first filter is a 3.6GHz low-pass filter, the first DDS outputs a signal of 275 to 500MHz and stepped 5MGHz/10MHz, the second filter is a 1.2GHz low-pass filter, the fourth filter is an 2625MHz filter, the first switch frequency-mixing filtering set comprises a 15.3GHz filter, the second switch frequency-mixing filtering set comprises a 2025MHz filter, the first switch filter comprises 1.3 to 1.52GHz and 1.53 to 1.75GHz filtering channels, the second switch filter comprises 11 to 11.8GHz and 11.8 to 12.7GHz filtering channels, the first local oscillator output terminal outputs a local oscillator signal of 11 to 12.7GHz and stepped 10MHz, and the second local oscillator output terminal outputs a local oscillator signal of 2625MHz, and the linear frequency modulation intermediate frequency signal output end outputs a 125MHz linear frequency modulation intermediate frequency signal.
7. The discretely adjustable point-frequency source according to claim 6, characterized in that the discretely adjustable point-frequency source has a phase noise of less than or equal to-110 dBc/Hz @1 kHz.
8. The discrete adjustable point frequency source of claim 1, wherein the discrete adjustable point frequency source has a size of no more than 250mm x 150mm x 25 mm.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111654284A (en) * | 2020-07-20 | 2020-09-11 | 无锡华测电子***有限公司 | Discrete adjustable point frequency source with ultralow phase noise |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111654284A (en) * | 2020-07-20 | 2020-09-11 | 无锡华测电子***有限公司 | Discrete adjustable point frequency source with ultralow phase noise |
| CN111654284B (en) * | 2020-07-20 | 2024-06-25 | 无锡华测电子***有限公司 | Discrete adjustable point frequency source with ultralow phase noise |
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